Supporting Information. A General Route towards Complete Room Temperature Processing of Printed and High Performance Oxide Electronics

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1 Supporting Information A General Route towards Complete Room Temperature Processing of Printed and High Performance Oxide Electronics Tessy T. Baby,, Suresh K. Garlapati,, Simone Dehm, Marc Häming, Robert Kruk, Horst Hahn,,, and Subho Dasgupta *, Institute for Nanotechnology, Karlsruhe Institute of Technology (KIT), Hermann-von- Helmholtz Platz 1, Eggenstein-Leopoldshafen, Germany Helmholtz Institute Ulm (HIU), Albert-Einstein-Allee 11, Ulm, Germany KIT-TUD Joint Research Laboratory Nanomaterials, Technische Universität Darmstadt (TUD), Institute of Materials Science, Jovanka-Bontschits-Str. 2, Darmstadt, Germany Institute for Photon Science and Synchrotron Radiation, Karlsruhe Institute of Technology (KIT), Hermann-von-Helmholtz Platz 1, Eggenstein-Leopoldshafen, Germany * subho.dasgupta@kit.edu Content: A. Nanoparticle characterization B. Surface profile of printed In 2 O 3 droplet C. Calculation of electrical double layer capacitance D. Additional electrical data E. Cu 2 O nanoink characterizations F. CMOS inverter characteristics 1

2 A. Nanoparticle characterization. The printable grade of semiconducting nanoparticulate inks were prepared from commercially available indium oxide (In 2 O 3 ) nanoparticles (Plasmachem GmbH) and asprepared (not sintered) homemade Cu 2 O nanoparticles. The crystallinity of the nanoparticles was examined using powder X-ray diffraction (XRD). In order to calculate the crystallite size, first the instrumental broadening has been estimated using a standard corundum (Al 2 O 3 ) sample. The volume weighted average crystallite size of the In 2 O 3 nanoparticles (Figure S1a) is calculated using equation S1 and S2 and found to be around 11 nm. S1 The XRD pattern of the copper oxide nanoparticles (Figure S1b) suggests that the prepared nanopowders are single phase Cu 2 O and the calculated average crystallite size in this case is about 12 nm. 2 calc (S1) 2 meas 2 inst where,, calc and meas inst are the calculated, measured and instrumental broadening values, respectively. 0.9 d (S2) cos calc where, d, and are the volume average of crystallite size, the wavelength of the radiation in angstrom and the diffraction peak position in radian, respectively. Figure S1. XRD pattern of the (a) as-received In 2 O 3 nanoparticles used to prepare NMOS transistors and (b) as-prepared Cu 2 O nanoparticles used to prepare the PMOS transistors, respectively. B. Surface profile of printed In 2 O 3 droplet. The surface profile and thickness of the printed droplets of the In 2 O 3 ink with 20 mm NaCl has been analyzed using stylus profilometer. Figure S2a shows the optical image of the printed droplet along with position of the line profiles. From the line profiles (Figure S2b), the average thickness of the printed droplet can be calculated as around 180 nm. In addition, the printed droplet appears to be significantly homogeneous also at a macroscopic level, and no distinguishable coffee-ring pattern can be noticed. 2

3 Figure S2. (a) Optical image of a typical, printed In 2 O 3 droplet from nanoink containing 20 mm NaCl and (b) line profiles obtained at different places. C. Calculation of electrical double layer capacitance. To ensure an accurate estimation of the field effect mobility (µ FET ), a precise calculation of specific capacitance (C) of the electrolytic gate insulator is necessary. Here, we calculate the electric double layer capacitance (C DL ) from the FET device itself. S2,S3 The displacement/charging current (which is in fact the gate current (I G )) of the transistor device has been recorded at various gate voltage (V G ) scan rates, as shown in Figure 3c. An accurate measurement of C DL following this process is only possible when the displacement current is primarily resulting from the semiconducting active material and not from the high conducting passive structures (i.e. source/drain electrodes). Next, the current density can be obtained by dividing the observed displacement current with the area of the printed channel. A simple parallel plate capacitor model gives charge (Q) proportional to the voltage drop (V) across the capacitor, i.e. Q CV (S3) Differentiating equation (S3) with respect to t gives, dq dv C (S4) dt dt dq where is the said current density, i.e. the displacement current resulting from the unit area dt dv of the semiconductor and is the voltage scan rate, υ. dt Therefore, i Cv (S5) Following equation (S5), the slope of Figure 3d gives the specific capacitance of the channel. D. Additional electrical data. Before electrolyte printing, two-probe I-V measurement was performed on the printed nanoparticulate transistor channel in order to evaluate the nature of electrical transport through the nanoparticle layer. The printed droplet was found conducting even without the chemical curing agent, i.e. with the stabilizer PAANa being present in between the nanoparticles (Figure S3a). The electronic transport across the channel in this case is possible due to the fact that the used polymer stabilizer is partially conducting. However, it shows a clear Schottky contact with the Pt electrodes (Figure S3b). In contrast, a completely Ohmic 3

4 metal-semiconductor contact and nearly 40-fold increase in the current and 20 fold increase in conductivity was noticed for a printed channel layer when 20 mm NaCl was added to the ink. This result corroborates the positives of the chemical curing process in terms of removal of the polymer stabilizer and densification of the nanoparticulate channel layer which was then clearly reflected in an improved electronic transport. A representative schematic of the in-plane FET geometry is presented in Figure S4. Figure S3. (a) Two-probe I-V measurement of the printed In 2 O 3 nanoparticulate transistor channel without and with 20 mm NaCl in the nanoinks, the circle and the triangle correspond to nanoparticle flims without and with NaCl, respectively. The red curves in Fig. S3a correspond to the calculated sheet resistance of nanoparticle films; (b) shows the measured two-probe currents in the logarithmic scale. Figure S4. Schematic representation of the in-plane transistor geometry. 4

5 Figure S5. Estimated field-effect mobility values at different gate voltages in the saturation regime, calculated for the In 2 O 3 FET prepared from the nanoink with 20 mm NaCl and processed completely at room temperature. Figure S5 shows the estimated field-effect mobility of the room temperature processed In 2 O 3 channel FET, at different gate voltages in the saturation regime. Estimation is for the same device which is shown in Figure 3; the channel consists of In 2 O 3 semiconductor nanoink with 20 mm NaCl. In order to calculate, field-effect mobility at each gate potential, the individual double layer capacitance and transconductance values have been estimated at each point; notably, the calculated FET mobility value has been found fairly constant over the entire region. The transfer and I-V characteristics of a typical FET device from In 2 O 3 nanoink without the chemical curing agent, NaCl is shown in Figure S6. Although a FET behavior can still be obtained due to the partial conducting nature of the stabilizer physically separating the particles, the performance is significantly inferior compared to the devices with NaCl, which is characterized by low ON-current, low FET mobility, higher subthreshold slope etc. (see Table S1) A prominent negative differential resistance in the I-V curves also reflects s strong sign of the presence of charge traps (due to stabilizer molecules). The transfer and current-voltage characteristics of a typical transistor fabricated from ink containing 20 mm NaCl, and then subsequently heated at 100 ºC is presented in Figure S7. The important performance parameters of FETs prepared using different nanoinks and post treatments are summarized in Table S1. 5

6 Figure S6. (a) Transfer and (b) drain current (I D ) - drain voltage (V D ) characteristics of a representative FET device prepared from In 2 O 3 nanoink without NaCl. Figure S7. (a) Transfer and (b) drain current (I D ) - drain voltage (V D ) characteristics of a representative FET device prepared from In 2 O 3 nanoink with 20 mm NaCl and the printed channel has been annealed at 100 ºC, after printing. 6

7 Table S1. Comparison of the FET characteristics of devices that are prepared using nanoink without NaCl, containing 20 mm NaCl and with 20 mm NaCl and also a subsequent heat treatment at 100 C [S= subthreshold slope, µ FET = field-effect mobility, g m = specific transconductance, normalized to transistor width] Nanoparticle ink S (mv/decade) µ FET (cm 2 /Vs) g m (µs/µm) Without NaCl, RT With NaCl, RT With NaCl at 100 C E. Cu 2 O nanoink characterizations: SEM image of the as-prepared Cu 2 O nanoparticles and printed droplet of the Cu 2 O nanoparticle ink containing 20 mm NaCl is shown in Figure S8a,b, respectively. The as-made nanopowders show a mesoscopic structure with large (and possibly hard) agglomerates, in the range of 500 nm or more. Although, it was possible to break most of these big agglomerates during the ink preparation process and then filter out the remaining ones (as-described in the methods section), the average particle size and size distribution in the Cu 2 O nanoink must be much larger compared to the In 2 O 3 nanoink (Figure 2c). Moreover, a fraction of the remaining, unbroken agglomerates that has been removed during the filtration step leaves a relatively low particle loading in the Cu 2 O nanoink. Consequently, the printed layer shows less compactness and homogeneity which can be an additional reason for the limited performance of the p-type MOSFET. On the other hand, this infers possibility to improve the performance of PMOS and as a result CMOS devices further, just by optimizing the nanoparticle synthesis and the ink formulation processes. The strong effect of concentration of the chemical sintering agent (NaCl) on ink stability is shown in Figure S9. Irrespective of the oxide material (in this case Cu 2 O nanoparticle) the inks containing 20 mm NaCl (less than the critical concentration required for dislodging the PAANa molecules from the nanoparticle surface) were found stable even after 2 months (Figure S9a,c) of the ink preparation, however, an increase in the chloride ion concentration to 50 mm NaCl was definitely supercritical; consequently, the particles were found settling within an hour of ink preparation (Figure S9b). Dynamic light scattering (DLS) measurements performed on the 20 mm NaCl containing Cu 2 O nanoink over the period of a couple of months suggested relatively good stability for the nanoink (Figure S9c). However, as per expectation, the Cu 2 O nanoinks showed bigger particle size and size distribution compared to In 2 O 3 nanoink. 7

8 Figure S8. SEM image of (a) as synthesized Cu 2 O nanoparticle and (b) printed nanoparticulate ink with 20 mm NaCl. Figure S9. Cu 2 O nanoparticle ink with (a) 20 mm NaCl loading after 2 month of ink preparation and (b) 50 mm NaCl loading after 1 hr of ink preparation; (c) DLS measurements of the nanoink as a function of the elapsed time. F. CMOS inverter characteristics. Noise margin of the inverter for a supply voltage of 1.5 V was calculated using the following equations: Low noise margin, N V V (S6) ML IL OL High noise margin, N MH VOH VIH (S7) where, input low voltage (V IL ), input high voltage (V IH ), output low voltage (V OL ) and output high voltage (V OH ) were calculated from Figure S10. Accordingly the undefined signal region of a CMOS inverter is difference between V IH and V IL. 8

9 Figure S10. An exemplary noise margin calculation is shown. The inverter transfer curve at a supply voltage of 1.5 V is used to calculate noise margin in this case. Table S2. High (N MH ) and Low (N ML ) noise margins and corresponding undefined signal region of the CMOS inverter for each supply voltage is calculated and compared. V DD (V) Switching threshold voltage, V IN = V OUT (V) Voltage gain N MH (V) N ML (V) Undefined signal region (V) REFERENCES S1. Cullity, B. D.; Stock, S. R. Elements of X-Ray Diffraction, 3rd Ed., Prentice-Hall Inc., 2001, S2. Panzer, M. J.; Frisbie, C. D. Polymer Electrolyte Gate Dielectric Reveals Finite Windows of High Conductivity in Organic Thin Film Transistors at High Charge Carrier Densities. J. Am. Chem. Soc. 2005, 127, S3. Panzer, M. J.; Frisbie, C. D. Polymer Electrolyte-Gated Organic Field-Effect Transistors: Low-Voltage, High-Current Switches for Organic Electronics and Test beds for Probing Electrical Transport at High Charge Carrier Density. J. Am. Chem. Soc. 2007, 129,