MEMS prototyping using RF sputtered films

Transcription

1 Indian Journal of Pure & Applied Physics Vol. 45, April 2007, pp MEMS prototyping using RF sputtered films Sudhir Chandra, Vivekanand Bhatt, Ravindra Singh, Preeti Sharma & Prem Pal* Centre for Applied Research in Electronics, Indian Institute of Technology Delhi, Hauz-khas, New Delhi *Yonsei Microsystems Laboratory, Yonsei University, Seoul, South Korea Received 7 June 2006; accepted 7 February 2007 In the present work, the deposition and characterization of dielectric, piezoelectric, semiconductor and conductor films by RF diode / RF magnetron sputtering process for applications in MEMS fabrication have been reported. Thin films of silicon dioxide, silicon nitride, amorphous silicon, zinc oxide and lanthanum doped lead zirconate titanate (PLZT) were prepared by RF sputtering process and extensively characterized for their structural, optical, and electrical properties. Thin films of conducting materials which are commonly used in MEMS fabrication (Cr, Au, Ti, and Pt) were also prepared by the same process. A few applications of these films in MEMS are demonstrated. It has been concluded that RF sputtering can be advantageously used for rapid prototyping of MEMS and demonstrating new ideas especially by researchers who do not have access to a well-established MEMS foundry. Keywords: RF sputtering, Dielectric films, Piezoelectric films, Perfect convex corner, MEMS microstructures IPC Code: G01L 9/06, B81B7/02 1 Introduction Fabrication of silicon based sensors and actuators requires almost all the steps used in integrated circuit fabrication process. These include: oxidation, diffusion, photolithography, metal and dielectric film deposition, dry and wet etching etc. The integration of sensor/actuator with signal conditioning circuit on the same silicon chip results in a new class of devices commonly known as Micro-Electro-Mechanical- Systems (MEMS). Though the sensor/actuator fabrication requires almost the same materials, it is often a necessary requirement to first complete the IC chip fabrication, usually based on standard CMOS technology, followed by sensor /actuator fabrication steps. This approach enables optimization of sensor/actuator fabrication steps. Another important issue in MEMS fabrication is of compatibility with CMOS process line. The bulk micromachining process in MEMS fabrication sometimes uses anisotropic etchants such as KOH. Due to its adverse effect on MOS processing, the wafers are strictly prohibited to re-enter MOS fabrication area once these are exposed to KOH or other such chemicals. In many MEMS fabrication sequences, the deposition of materials such as SiO 2, Si 3 N 4 etc. is required after anisotropic etching and the CVD facility available in CMOS area cannot be used for such purpose. In addition, the CVD systems are very expensive and use toxic/corrosive gases such as silane, dichlorosilane etc. These factors restrict the prototyping of innovative ideas in MEMS, particularly to researchers who do not have access to elaborate wafer fabrication facilities. The present work is focused on demonstrating that low cost RF sputtering process can be advantageously used for a variety of applications for MEMS fabrication. In this work, we present RF sputter deposition and characterization of SiO 2, Si 3 N 4, ZnO, PLZT and amorphous silicon thin films for MEMS application. In addition, metallization layers of chrome, gold, titanium, and platinum have also been deposited by RF sputtering and used for sensors and actuators fabrication. Using sputtered silicon nitride as masking layer in LOCOS (LOCal Oxidation of Silicon) like process, a novel technique for realizing perfect convex corners in (100) Si using bulk micromachining has been demonstrated. Microstructures such as cantilever beams, microbridges and large-size diaphragms of SiO 2, Si 3 N 4 and amorphous Si have been fabricated using surface and/or bulk micromachining processes. The issues related to the choice of sacrificial layer have been addressed. ZnO films have been deposited and characterized as piezoelectric material and also as sacrificial layer. The PLZT films were deposited on Pt (0.3 µm) /Ti (30nm) /SiO 2 (1 µm) /Si (280 µm thickness, 2-inch diameter) substrates and the post-

2 CHANDRA et al. MEMS PROTOTYPING USING RF SPUTTERED FILMS 327 deposition annealing conditions were carefully optimized to obtain films in pure perovskite phase. Some results of microstructures realized by bulk and surface micromachining process using RF sputtered films been presented. Fabrication of a prototype microrelay is also presented. 2 Experimental Details 2.1 Film deposition All the depositions were carried out in RF diode or RF magnetron (13.56 MHz) sputtering system in sputter-up configuration in Ar or Ar-O 2 mixture. The sputtering was carried out using stoichiometric sputtering targets of 3-inch diameter except for Pt in which case a 2-inch diameter target was used. The substrates used were 2-inch diameter single or double side polished silicon wafers. The PLZT target was prepared in-house 1. The sputtering system had a provision to heat the substrates up to 250 C during the deposition process using halogen lamp. However, even if no external heating was used during the deposition process, the substrate temperature was found to increase up to 200 C (depending on the RF power used) due to self-heating 2. The effect of deposition parameters such as RF power, pressure, sputtering gas, and target-to-substrate spacing on the deposition rate, thickness uniformity and structural properties was investigated. 2.2 Characterization The film thickness was measured using α-step surface profiler (Alfa- step 100; Tencor Inc). The optical constants (n, k and thickness) were evaluated using spectroscopic measurements (Filmetrics, F20- UV thin film analyzer). The crystallographic properties were evaluated using XRD analysis (Bruker-AXS X- ray diffractometer, Model D8 Advance) using CuK α (λ = nm) radiation. The surface roughness was examined using SEM and also by AFM measurements. The electrical resistivity measurements were carried out using MIS structures. 2.3 Microstructure fabrication The microstructures such as microcantilevers, diaphragms, proof mass etc. were fabricated using bulk or surface micromachining techniques. In the bulk micromachining process, the suspended microstructures were formed using anisotropic etching either from the front side or the back side of the (100) oriented Si wafer. For the latter case, a double-side polished wafer was used and front-toback side alignment procedure was adapted for registration of mutually aligned patterns on the two sides of the wafer 3. 3 Results and Discussion 3.1 Silicon nitride Silicon nitride thin films were deposited at 300 W RF power and 5 mtorr pressure in argon atmosphere by RF diode sputtering process. Deposition rate profile of the silicon nitride films deposited at above mentioned parameter on a two-inch wafer (keeping target to substrate spacing fixed at 45 mm) is shown in Fig.1. Process parameters were optimized for getting MEMS compatible films 4. To illustrate the process for microstructures (such as cantilever beam, diaphragm) realization, the large-size suspended membranes for millimeter wave components were fabricated by bulk micromachining technology 5. Fig.2 shows the optical photograph of a part of the 4 mm 4 mm sputtered Si 3 N 4 (2 µm thick) Fig. 1 Si 3 N 4 film thickness profile on a two-inch diameter wafer, deposited at 300 W RF power and 5 mtorr pressure Fig. 2 Optical photograph showing a part of the 4 mm x 4 mm sputtered Si 3 N 4 (2 µm thick) membrane

3 328 INDIAN J PURE & APPL PHYS, VOL 45, APRIL 2007 Fig. 3 SEM photograph exhibits a close-up view of the convex corner. membrane. The micrographs were taken from the back-side of the wafer under combined reflected and transmitted illumination. Using LOCOS like process with sputter deposited Si 3 N 4 films, microstructures with perfect convex corner were fabricated on twoinch p-type (100)-silicon wafers of thickness 280±15 µm. The detailed process steps are presented elsewhere 6. Fig. 3 shows the SEM photograph of the structures having convex corners fabricated in (100) silicon wafer using LOCOS like process. The close up view clearly reveals the sharp convex corners obtained by the present process. Fig. 4 shows the tilted view of the recessed seismic mass supported by four symmetric P + -silicon beams obtained by this process Silicon dioxide Silicon dioxide films were deposited at 300 watt RF power and 5 mtorr pressure by RF diode sputtering technique in argon ambient. The target-tosubstrate spacing (d ts ) was kept constant at 45 mm. The etch rates of deposited silicon dioxide films in buffered hydrofluoric (BHF) acid were measured and the results were compared with that of thermally grown SiO 2 films using the same solution 8. Arrays of cantilever beams were fabricated by bulk micromachining technique using a single mask process. For this purpose, the deposition was carried out on (100) silicon wafer. After the deposition, the silicon dioxide was selectively etched in buffered hydrofluoric acid followed by anisotropic etching of silicon in ethylenediamine pyrocatechol water (EPW) solution. The mask must be accurately aligned with respect to wafer flat to obtain precise rectangular pit Fig. 4 SEM photographs: Tilted back-side view of recessed seismic mass supported by four symmetric P + -silicon beams below the suspended microstructure. The cantilever beams are released due to undercutting of convex corners. Fig 5(a) shows the SEM micrograph of array of cantilever beams, fabricated by wet anisotropic etching of silicon whereas Fig. 5 (b) shows the SEM micrograph of array of cantilever beams, fabricated by dry and wet etching of silicon. 3.3 Amorphous silicon To obtain amorphous silicon films, RF (diode) sputter deposition was carried out using silicon target on single crystal silicon substrates. The sputtering process was carried out at W RF power in the pressure range 5-20 mtorr in argon atmosphere. The target to substrate spacing for all depositions was kept constant at 50 mm. Deposition rate as a function of RF power at 5, 10 and 20 mtorr sputtering pressure is shown in Fig. 6. Maximum deposition rate is measured at the centre of the wafer as shown. Near the periphery of the wafer, the deposition rate falls by 10-15%. Fig. 7 shows the SEM photograph of α-soi diaphragm fabricated by bulk micromachining process using front to back alignment system Zinc oxide (ZnO) ZnO thin films were deposited on various substrates by RF magnetron sputtering in sputter-up configuration using a 75 mm diameter and 5 mm thick ZnO target (99.99% purity). In order to investigate the effect of target to substrate spacing, sputtering gas, RF power and deposition temperature on crystallographic orientation of ZnO, a number of films were prepared under different deposition conditions. Sputtering was carried out in (i) pure

4 CHANDRA et al. MEMS PROTOTYPING USING RF SPUTTERED FILMS 329 Fig. 6 Deposition rate versus RF power at different pressures Fig. 5 SEM photographs of the array of cantilever beams of RF sputtered silicon dioxide argon and (ii) mixture of oxygen and argon (1:1) by supplying W RF power. The flow rates of both the argon and oxygen were controlled by rotameters. The sputtering pressure was maintained at 10 mtorr for all the depositions. The distance between the target and the substrate was varied between mm. When the substrate was not externally heated, its temperature increased up to 110 C at 100 W RF power due to plasma heating. We have investigated whether this self-heating phenomenon can be exploited to obtain c-axis oriented ZnO growth. The films prepared without external heating of the substrate at 100 W RF power and 50 mm target-tosubstrate spacing in the mixture of oxygen and argon (1:1) were found to be highly c-axis oriented 10. Fig. 8 shows the XRD pattern of ZnO films prepared on various substrates at the above optimized parameters. All the films were highly c-axis oriented. These films exhibited high dc resistivity of the order of 10 8 Ω-cm Fig. 7 SEM photograph of α-soi diaphragm (film thickness 4 µm) Fig. 8 XRD patterns of ZnO films prepared on various substrates at 10 kv/cm electric field. Therefore, these films can be advantageously used in piezoelectric based MEMS devices e.g. SAW devices, pressure sensors, vibration

5 330 INDIAN J PURE & APPL PHYS, VOL 45, APRIL 2007 sensors etc. RF sputtered ZnO films were also explored as a sacrificial layer for surface micromachining process Lead lanthanum zirconate titanate (PLZT) Thin films of PLZT were prepared on Pt/Ti/SiO 2 /Si substrates by RF magnetron sputtering. For this purpose, a 75 mm diameter target of PLZT (8/60/40), which exhibits good ferroelectric properties, was prepared by conventional solid state reaction route 1. Sputtering of PLZT was carried out in argon by supplying 100 W RF power. The sputtering pressure was maintained at 5 mtorr for all the depositions. The substrate was not externally heated but due to selfheating in plasma, the temperature increased up to 155 C. In the present study, the target-substrate spacing was kept at 50 mm because the deposition rate and the uniformity of film were found good at this spacing. The films were rapid thermal annealed (RTA) in the temperature range C in order to obtain the perovskite phase. The thickness of the film was determined using surface profiler and found to be 0.6 µm. Fig. 9 shows the XRD pattern of RF sputtered PLZT film that was crystallized in pure perovskite phase 12. Other characterizations of these films are in progress. 3.6 Microswitch To demonstrate the application of RF sputtered films, a prototype micro-relay was fabricated by using bulk micromachining process. Fig. 10 shows the SEM photograph of the cantilever beam with a metal contacting electrode. The cantilever beam is recessed into the silicon substrate by10 micron using previously reported process 13. To electrostatically actuate the P + - silicon beam, a second wafer having an appropriate metallization pattern is bonded by a low temperature process to the chip containing the recessed structure as shown in Fig. 11. The actuation of the beam is observed by applying a dc voltage across the packaged device. The micro-relay was observed to switch at 75 V which is close to the value predicted for the geometrical parameters used in the present work (beam length: 500 µm, width: 400 µm, thickness: 4 µm and pit depth: 10 µm). 4 Conclusions We have investigated RF (diode/magnetron) sputtering process for preparing silicon dioxide, silicon nitride, amorphous silicon, zinc oxide, PLZT and metal films for applications in MEMS. Some Fig. 9 XRD pattern of RF sputtered pure perovskite PLZT film Fig. 10 SEM photograph of recessed P + -silicon cantilever beam with metal electrode for micro-relay Fig. 11 Schematic view of packaged micro-relay for electrostatic actuation applications of these films have been demonstrated. It is concluded that RF sputtering can be advantageously used for developing prototype MEMS and also for demonstrating new concepts in MEMS technology.

6 CHANDRA et al. MEMS PROTOTYPING USING RF SPUTTERED FILMS 331 References 1 Singh R, Chandra S, Sharma S, Tripathi A K & Goel T C, IEEE Tran. Diele. and Ele. Insu, 11 (2004) Maissel L, Glang R, Handbook of Thin Film Technology, Chap. 4, p. 15. McGraw- Hill, Pal Prem, Young-Jun Kim & Chandra Sudhir, Sensor Lett, 4 (2006)1. 4 Bhatt Vivekanand & Chandra Sudhir, Proceedings, Int Workshop on Phys. of Sem. Devices (IWPSD-2003), pp , Sharma Preeti, Koul S K & Chandra Sudhir, International Conference on Smart Materials, Chiang Mai, Thailand, December 1-3, 2004, pp , Pal Prem & Chandra Sudhir, J Micromechanics & Microengineering, 14 (2004) Pal Prem & Chandra Sudhir, Sensor Lett, 2 (2004) Chandra Sudhir, Bhatt Vivekanand & Jha S K, Int J Comput Engg. Sci., 4 (2003) Pal Prem & Chandra Sudhir, J Micromechanics & Microengineering, 15 (2005) Singh Ravindra, Kumar Mahesh & Chandra Sudhir, to appear in J of Mater Sci. 11 Bhatt Vivekanand, Pal Prem & Chandra Sudhir, Surface & Coating Tech, 198 (2005) Singh Ravindra, Chakarborty B R, Nahar Singh, Rashmi, Harish Bahadur, Goel T C & Chandra Sudhir, Int Workshop on Phys of Semiconductor Devices, NPL, New Delhi, (2005). 13 Pal Prem & Chandra Sudhir, Smart Materials and Structures, 13 (2004) 1424.