FABRICATION ENGINEERING MICRO- NANOSCALE ATTHE AND. Fourth Edition STEPHEN A. CAMPBELL. of Minnesota. University OXFORD UNIVERSITY PRESS

Size: px
Start display at page:

Download "FABRICATION ENGINEERING MICRO- NANOSCALE ATTHE AND. Fourth Edition STEPHEN A. CAMPBELL. of Minnesota. University OXFORD UNIVERSITY PRESS"

Transcription

1 AND FABRICATION ENGINEERING ATTHE MICRO- NANOSCALE Fourth Edition STEPHEN A. CAMPBELL University of Minnesota New York Oxford OXFORD UNIVERSITY PRESS

2 CONTENTS Preface xiii prrt i OVERVIEW AND MATERIALS CHRPTER AN INTRODUCTION TO MICROELECTRONIC FABRICATION Microelectronic Technologies: A Simple Example 5 Unit Processes and Technologies 7 A Roadmap Summary 9 for the Course 8 CHRPTER a SEMICONDUCTOR SUBSTRATES Phase Diagrams and Solid Solubility0 2.2 Crystallography and Crystal Structure0 2.3 Crystal Defects Czochralski Growth Bridgman Growth of GaAs Float Zone and Other Growth Wafer Preparation and Specifications 2.8 Summary and Future Trends Problems 36 References 38 prrt ii UNIT PROCESSES I: HOT PROCESSING AND ION IMPLANTATION 41 CHRPTER DIFFUSION 43 Fick's Diffusion Equation in One Dimension Atomistic Models of Diffusion 45 Analytic Solutions of Fick's Law 50 Diffusion Coefficients for Common Dopants Analysis of Diffused Profiles This section provides background material. V

3 * This section contains advanced material and can be omitted without loss of the basic content of the course. CONTENTS 3.6 Diffusion in Si Simulations of Diffusion Profiles Summary 70 Problems 70 References 72 CHRPTER THERMAL OXIDATION 75 The Deal-Grove Model of Oxidation 75 The Linear and Parabolic Rate Coefficients 78 The Initial Oxidation Regime 82 The Structure of Si02 85 Oxide Characterization 86 The Effects of Dopants During Oxidation and Polysilicon Oxidation Silicon Oxynitrides 96 Alternative Gate Insulators+ 97 Oxidation Systems 99 Numeric Oxidations+ 101 Summary 102 Problems 104 References CHRPTER 5 ION IMPLANTATION Idealized Ion Implantation Systems Coulomb Scattering Vertical Projected Range Channeling and Lateral Projected Range Implantation Damage Shallow Junction Formation Buried Dielectrics* Ion Implantation Systems: Problems and Concerns Numerical Implanted Profiles* Summary 139 Problems 140 References 142 CHRPTER B RAPID THERMAL PROCESSING Gray Body Radiation, Heat Exchange, and Optical Absorption High Intensity Optical Sources and Chamber Design Temperature Measurement Thermoplastic Stress" Rapid Thermal Activation of Impurities Rapid Thermal Processing of Dielectrics Silicidation and Contact Formation Alternative Rapid Thermal Processing Systems Summary 165 Problems 166 References 166

4 Contents vii prrtiii UNIT PROCESSES 2: PATTERN TRANSFER 173 CHHPTER 7 OPTICAL LITHOGRAPHY Lithography Overview Diffraction" The Modulation Transfer Function and Optical Exposures Source Systems and Spatial Coherence Contact/Proximity Printers 190 Projection Printers 194 Advanced Mask Concepts Surface Reflections and Standing Waves Alignment 206 Summary 207 Problems 208 References HRPTER B PHOTORESISTS Photoresist Types Organic Materials and Polymers Typical Reactions of DQN Positive Photoresist Contrast Curves The Critical Modulation Transfer Function Applying and Developing Photoresist Second-Order Exposure Effects Advanced Photoresists and Photoresist Processes* Summary 233 Problems 233 References 235 CHRPTER3 NONOPTICAL LITHOGRAPHIC TECHNIQUES Interactions of High Energy Beams with Matter Direct-Write Electron Beam Lithography Systems Direct-Write Electron Beam Lithography: Summary and Outlook X-ray and EUV Sources" Proximity X-ray Exposure Systems Membrane Masks for Proximity X-ray EUV Lithography Projection Electron Beam Lithography (SCALPEL) E-beam and X-ray Resists Radiation Damage in MOS Devices Soft Lithography and Nanoimprint Lithography Summary 265 Problems 265 References 266

5 CONTENTS CHRPTER ID VACUUM SCIENCE AND PLASMAS The Kinetic Theory of Gases" 271 Gas Flow and Conductance 274 Pressure Ranges and Vacuum Pumps 277 Vacuum Seals and Pressure Measurement 283 The DC Glow Discharge0 285 RF Discharges 287 High Density Plasmas 289 Summary 292 Problems 293 References CHRPTER 11 ETCHING Wet Etching Chemical Mechanical Polishing Basic Regimes of Plasma Etching High Pressure Plasma Etching Ion Milling Reactive Ion Etching Damage in Reactive Ion Etching"1" High Density Plasma (HDP) Etching Liftoff Summary 328 Problems 328 References 330 prrtiu UNIT PROCESSES 3: THIN FILMS 337 CHRPTER PHYSICAL DEPOSITION: EVAPORATION AND SPUTTERING Phase Diagrams: Sublimation and Evaporation0 340 Deposition Rates 341 Step Coverage 345 Evaporator Systems: Crucible Heating Techniques 348 Multicomponent Films 350 An Introduction to Sputtering 351 Physics of Sputtering0 352 Deposition Rate: Sputter Yield 354 High Density Plasma Sputtering 357 Morphology and Step Coverage 358 Sputtering Methods 361 Sputtering of Specific Materials 363 Stress in Deposited Layers 366 Summary 367 Problems 368 References

6 Contents ix CHRPTER CHEMICAL VAPOR DEPOSITION 374 A Simple CVD System for the Deposition of Silicon 375 Chemical Equilibrium and the Law of Mass Action" 376 Gas Flow and Boundary Layers0 380 Evaluation of the Simple CVD System 384 Atmospheric CVD of Dielectrics 385 Low Pressure CVD of Dielectrics and Semiconductors in Hot Wall Systems Plasma-enhanced CVD of Dielectrics 392 Metal CVD+ 395 Atomic Layer Deposition 398 Electroplating Copper 401 Summary 403 Problems 403 References CHRPTER EPITAXIAL GROWTH 410 Wafer Cleaning and Native Oxide Removal The Thermodynamics of Vapor Phase Growth Surface Reactions 420 Dopant Incorporation 421 Defects in Epitaxial Growth 422 Selective Growth Halide Transport GaAs Vapor Phase Epitaxy 425 Incommensurate and Strained Layer Heteroepitaxy Metal Organic Chemical Vapor Deposition (MOCVD) Advanced Silicon Vapor Phase Epitaxial Growth Techniques Molecular Beam Epitaxy Technology 438 BCF Theory"1" 443 Gas Source MBE and Chemical Beam Epitaxy+ 448 Summary 449 Problems 449 References phht u PROCESS INTEGRATION 457 CHRPTER IS DEVICE ISOLATION, CONTACTS, AND METALLIZATION Junction and Oxide Isolation LOCOS Methods Trench Isolation Silicon-on-Insulator Isolation Techniques Semi-insulating Substrates Schottky Contacts Implanted Ohmic Contacts Alloyed Contacts Multilevel Metallization Planarization and Advanced Interconnect 486

7 CONTENTS Summary Problems References CHRPTER IB CMOS TECHNOLOGIES 499 Basic Long-Channel Device Behavior 499 Early MOS Technologies 502 The Basic 3-u.m Technology 503 Device Scaling 507 Hot Carrier Effects and Drain Engineering 515 Latchup 518 Shallow Source/Drains and Tailored Channel Doping 521 The Universal Curve and Advanced CMOS 524 A Nanoscale CMOS Process 525 Nonplanar CMOS 527 Summary 529 Problems 529 References 532 CHAPTER 17 OTHER TRANSISTOR TECHNOLOGIES Basic MESFET Operation 538 Basic MESFET Technology 539 Digital Technologies 541 MMIC Technologies 545 MODFETs 547 Review of Bipolar Devices: Ideal and Quasi-ideal Behavior 549 Performance of BJTs 550 Early Bipolar Processes 553 Advanced Bipolar Processes 556 BiCMOS 563 Thin Film Transistors 565 Summary 568 Problems 569 References 572 CHAPTER IB OPTOELECTRONIC AND SOLAR TECHNOLOGIES Optoelectronic Devices Overview 578 Direct-Gap Inorganic LEDs 579 Polymer/Organic Light-Emitting Diodes 583 Lasers 585 Photovoltaic Devices Overview 586 Silicon Based Photovoltaic Device Fabrication 587 Other Photovoltaic Technologies 590 Summary 592 References CHRPTER13 MEMS Fundamentals of Mechanics Stress in Thin Films 598

8 Contents xi 19.3 Mechanical-to-Electrical Transduction Mechanics of Common MEMS Devices Bulk Micromachining Etching Techniques Bulk Micromachining Process Flow Surface Micromachining Basics Surface Micromachining Process Flow MEMS Actuators High Aspect Ratio Microsystems Technology (HARMST) Microfluidics Summary 638 Problems 640 References 642 APPENDIX I. ACRONYMS AND COMMON SYMBOLS 647 APPENDIX II. PROPERTIES OF SELECTED SEMICONDUCTOR MATERIALS 653 APPENDIX III. PHYSICAL CONSTANTS 654 APPENDIX IV CONVERSION FACTORS 656 APPENDIX V. SOME PROPERTIES OF THE ERROR FUNCTION 659 Index 663

Ajay Kumar Gautam [VLSI TECHNOLOGY] VLSI Technology for 3RD Year ECE/EEE Uttarakhand Technical University

Ajay Kumar Gautam [VLSI TECHNOLOGY] VLSI Technology for 3RD Year ECE/EEE Uttarakhand Technical University 2014 Ajay Kumar Gautam [VLSI TECHNOLOGY] VLSI Technology for 3RD Year ECE/EEE Uttarakhand Technical University Page1 Syllabus UNIT 1 Introduction to VLSI Technology: Classification of ICs, Scale of integration,

More information

Technology. Semiconductor Manufacturing. Hong Xiao INTRODUCTION TO SECOND EDITION SPIE PRESS

Technology. Semiconductor Manufacturing. Hong Xiao INTRODUCTION TO SECOND EDITION SPIE PRESS INTRODUCTION TO Semiconductor Manufacturing Technology SECOND EDITION Hong Xiao TECHNISCHE INFORMATIONSBiBUOTHEK UNIVERSITATSBIBLIOTHEK HANNOVER SPIE PRESS Bellingham,Washington USA Contents Preface to

More information

VLSI Technology. By: Ajay Kumar Gautam

VLSI Technology. By: Ajay Kumar Gautam By: Ajay Kumar Gautam Introduction to VLSI Technology, Crystal Growth, Oxidation, Epitaxial Process, Diffusion Process, Ion Implantation, Lithography, Etching, Metallization, VLSI Process Integration,

More information

Figure 2.3 (cont., p. 60) (e) Block diagram of Pentium 4 processor with 42 million transistors (2000). [Courtesy Intel Corporation.

Figure 2.3 (cont., p. 60) (e) Block diagram of Pentium 4 processor with 42 million transistors (2000). [Courtesy Intel Corporation. Figure 2.1 (p. 58) Basic fabrication steps in the silicon planar process: (a) oxide formation, (b) selective oxide removal, (c) deposition of dopant atoms on wafer, (d) diffusion of dopant atoms into exposed

More information

Metallization deposition and etching. Material mainly taken from Campbell, UCCS

Metallization deposition and etching. Material mainly taken from Campbell, UCCS Metallization deposition and etching Material mainly taken from Campbell, UCCS Application Metallization is back-end processing Metals used are aluminum and copper Mainly involves deposition and etching,

More information

Fabrication Technology

Fabrication Technology Fabrication Technology By B.G.Balagangadhar Department of Electronics and Communication Ghousia College of Engineering, Ramanagaram 1 OUTLINE Introduction Why Silicon The purity of Silicon Czochralski

More information

LANDOLT-BÖRNSTEIN. Zahlenwerte und Funktionen aus Naturwissenschaften und Technik. Neue Serie. Gesamtherausgabe: K.-H. Hellwege O.

LANDOLT-BÖRNSTEIN. Zahlenwerte und Funktionen aus Naturwissenschaften und Technik. Neue Serie. Gesamtherausgabe: K.-H. Hellwege O. LANDOLT-BÖRNSTEIN Zahlenwerte und Funktionen aus Naturwissenschaften und Technik Neue Serie Gesamtherausgabe: K.-H. Hellwege O. Madelung Gruppe III: Kristall- und Festkörperphysik Band 17 Halbleiter Herausgeber:

More information

Thermal Evaporation. Theory

Thermal Evaporation. Theory Thermal Evaporation Theory 1. Introduction Procedures for depositing films are a very important set of processes since all of the layers above the surface of the wafer must be deposited. We can classify

More information

EE40 Lec 22. IC Fabrication Technology. Prof. Nathan Cheung 11/19/2009

EE40 Lec 22. IC Fabrication Technology. Prof. Nathan Cheung 11/19/2009 Suggested Reading EE40 Lec 22 IC Fabrication Technology Prof. Nathan Cheung 11/19/2009 300mm Fab Tour http://www-03.ibm.com/technology/manufacturing/technology_tour_300mm_foundry.html Overview of IC Technology

More information

Lecture 12. Physical Vapor Deposition: Evaporation and Sputtering Reading: Chapter 12. ECE Dr. Alan Doolittle

Lecture 12. Physical Vapor Deposition: Evaporation and Sputtering Reading: Chapter 12. ECE Dr. Alan Doolittle Lecture 12 Physical Vapor Deposition: Evaporation and Sputtering Reading: Chapter 12 Evaporation and Sputtering (Metalization) Evaporation For all devices, there is a need to go from semiconductor to metal.

More information

Isolation Technology. Dr. Lynn Fuller

Isolation Technology. Dr. Lynn Fuller ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Isolation Technology Dr. Lynn Fuller Motorola Professor 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585) 475-2035 Fax (585) 475-5041

More information

Lecture 030 Integrated Circuit Technology - I (5/8/03) Page 030-1

Lecture 030 Integrated Circuit Technology - I (5/8/03) Page 030-1 Lecture 030 Integrated Circuit Technology - I (5/8/03) Page 030-1 LECTURE 030 INTEGRATED CIRCUIT TECHNOLOGY - I (References [7,8]) Objective The objective of this presentation is: 1.) Illustrate integrated

More information

Isolation of elements

Isolation of elements 1 In an IC, devices on the same substrate must be isolated from one another so that there is no current conduction between them. Isolation uses either the junction or dielectric technique or a combination

More information

Introduction to Micro/Nano Fabrication Techniques. Date: 2015/05/22 Dr. Yi-Chung Tung. Fabrication of Nanomaterials

Introduction to Micro/Nano Fabrication Techniques. Date: 2015/05/22 Dr. Yi-Chung Tung. Fabrication of Nanomaterials Introduction to Micro/Nano Fabrication Techniques Date: 2015/05/22 Dr. Yi-Chung Tung Fabrication of Nanomaterials Top-Down Approach Begin with bulk materials that are reduced into nanoscale materials Ex:

More information

VLSI Systems and Computer Architecture Lab

VLSI Systems and Computer Architecture Lab ΚΥΚΛΩΜΑΤΑ VLSI Πανεπιστήμιο Ιωαννίνων CMOS Technology Τμήμα Μηχανικών Η/Υ και Πληροφορικής 1 From the book: An Introduction ti to VLSI Process By: W. Maly ΚΥΚΛΩΜΑΤΑ VLSI Διάρθρωση 1. N well CMOS 2. Active

More information

Radiation Tolerant Isolation Technology

Radiation Tolerant Isolation Technology Radiation Tolerant Isolation Technology Background The following contains a brief description of isolation technologies used for radiation hardened integrated circuits. The technologies mentioned are junction

More information

ME 141B: The MEMS Class Introduction to MEMS and MEMS Design. Sumita Pennathur UCSB

ME 141B: The MEMS Class Introduction to MEMS and MEMS Design. Sumita Pennathur UCSB ME 141B: The MEMS Class Introduction to MEMS and MEMS Design Sumita Pennathur UCSB Outline today Introduction to thin films Oxidation Deal-grove model CVD Epitaxy Electrodeposition 10/6/10 2/45 Creating

More information

Semiconductor Manufacturing Technology. IC Fabrication Process Overview

Semiconductor Manufacturing Technology. IC Fabrication Process Overview Semiconductor Manufacturing Technology Michael Quirk & Julian Serda October 00 by Prentice Hall Chapter 9 IC Fabrication Process Overview /4 Objectives After studying the material in this chapter, you

More information

CMOS FABRICATION. n WELL PROCESS

CMOS FABRICATION. n WELL PROCESS CMOS FABRICATION n WELL PROCESS Step 1: Si Substrate Start with p- type substrate p substrate Step 2: Oxidation Exposing to high-purity oxygen and hydrogen at approx. 1000 o C in oxidation furnace SiO

More information

Silicon Wafer Processing PAKAGING AND TEST

Silicon Wafer Processing PAKAGING AND TEST Silicon Wafer Processing PAKAGING AND TEST Parametrical test using test structures regularly distributed in the wafer Wafer die test marking defective dies dies separation die fixing (not marked as defective)

More information

Lecture 19 Microfabrication 4/1/03 Prof. Andy Neureuther

Lecture 19 Microfabrication 4/1/03 Prof. Andy Neureuther EECS 40 Spring 2003 Lecture 19 Microfabrication 4/1/03 Prof. ndy Neureuther How are Integrated Circuits made? Silicon wafers Oxide formation by growth or deposition Other films Pattern transfer by lithography

More information

Dr. Priyabrat Dash Office: BM-406, Mob: Webpage: MB: 205

Dr. Priyabrat Dash   Office: BM-406, Mob: Webpage:  MB: 205 Email: dashp@nitrkl.ac.in Office: BM-406, Mob: 8895121141 Webpage: http://homepage.usask.ca/~prd822/ MB: 205 Nonmanufacturing In continuation from last class... 2 Top-Down methods Mechanical-energy methods

More information

PROCESSING OF INTEGRATED CIRCUITS

PROCESSING OF INTEGRATED CIRCUITS PROCESSING OF INTEGRATED CIRCUITS Overview of IC Processing (Part I) Silicon Processing Lithography Layer Processes Use in IC Fabrication (Part II) Integrating the Fabrication Steps IC Packaging (Part

More information

Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 6: New Materials, Processes, and Equipment

Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 6: New Materials, Processes, and Equipment Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 6: New Materials, Processes, and Equipment Editors: E. P. Gusev Qualcomm MEMS Technologies San Jose, California, USA D-L. Kwong

More information

3.155J / 6.152J Micro/Nano Processing Technology TAKE-HOME QUIZ FALL TERM 2005

3.155J / 6.152J Micro/Nano Processing Technology TAKE-HOME QUIZ FALL TERM 2005 3.155J / 6.152J Micro/Nano Processing Technology TAKE-HOME QUIZ FALL TERM 2005 1) This is an open book, take-home quiz. You are not to consult with other class members or anyone else. You may discuss the

More information

VLSI Technology Dr. Nandita Dasgupta Department of Electrical Engineering Indian Institute of Technology, Madras

VLSI Technology Dr. Nandita Dasgupta Department of Electrical Engineering Indian Institute of Technology, Madras VLSI Technology Dr. Nandita Dasgupta Department of Electrical Engineering Indian Institute of Technology, Madras Lecture - 33 Problems in LOCOS + Trench Isolation and Selective Epitaxy So, we are discussing

More information

Historical Development. Babbage s second computer. Before the digital age

Historical Development. Babbage s second computer. Before the digital age Historical Development To fully appreciate the computers of today, it is helpful to understand how things got the way they are The evolution of computing machinery has taken place over several centuries

More information

Lecture 4. Oxidation (applies to Si and SiC only) Reading: Chapter 4

Lecture 4. Oxidation (applies to Si and SiC only) Reading: Chapter 4 Lecture 4 Oxidation (applies to Si and SiC only) Reading: Chapter 4 Introduction discussion: Oxidation: Si (and SiC) Only The ability to grow a high quality thermal oxide has propelled Si into the forefront

More information

Thin Films: Sputtering Systems (Jaeger Ch 6 & Ruska Ch 7,) Can deposit any material on any substrate (in principal) Start with pumping down to high

Thin Films: Sputtering Systems (Jaeger Ch 6 & Ruska Ch 7,) Can deposit any material on any substrate (in principal) Start with pumping down to high Thin Films: Sputtering Systems (Jaeger Ch 6 & Ruska Ch 7,) Can deposit any material on any substrate (in principal) Start with pumping down to high vacuum ~10-7 torr Removes residual gases eg oxygen from

More information

1. Introduction. What is implantation? Advantages

1. Introduction. What is implantation? Advantages Ion implantation Contents 1. Introduction 2. Ion range 3. implantation profiles 4. ion channeling 5. ion implantation-induced damage 6. annealing behavior of the damage 7. process consideration 8. comparison

More information

Lecture 5. SOI Micromachining. SOI MUMPs. SOI Micromachining. Silicon-on-Insulator Microstructures. Agenda:

Lecture 5. SOI Micromachining. SOI MUMPs. SOI Micromachining. Silicon-on-Insulator Microstructures. Agenda: EEL6935 Advanced MEMS (Spring 2005) Instructor: Dr. Huikai Xie SOI Micromachining Agenda: SOI Micromachining SOI MUMPs Multi-level structures Lecture 5 Silicon-on-Insulator Microstructures Single-crystal

More information

ME 189 Microsystems Design and Manufacture. Chapter 9. Micromanufacturing

ME 189 Microsystems Design and Manufacture. Chapter 9. Micromanufacturing ME 189 Microsystems Design and Manufacture Chapter 9 Micromanufacturing This chapter will offer an overview of the application of the various fabrication techniques described in Chapter 8 in the manufacturing

More information

CMOS Manufacturing process. Circuit designer. Design rule set. Process engineer. Set of optical masks. Fabrication process.

CMOS Manufacturing process. Circuit designer. Design rule set. Process engineer. Set of optical masks. Fabrication process. CMOS Manufacturing process Circuit design Set of optical masks Fabrication process Circuit designer Design rule set Process engineer All material: Chap. 2 of J. Rabaey, A. Chandrakasan, B. Nikolic, Digital

More information

Lecture Day 2 Deposition

Lecture Day 2 Deposition Deposition Lecture Day 2 Deposition PVD - Physical Vapor Deposition E-beam Evaporation Thermal Evaporation (wire feed vs boat) Sputtering CVD - Chemical Vapor Deposition PECVD LPCVD MVD ALD MBE Plating

More information

Amorphous Silicon Solar Cells

Amorphous Silicon Solar Cells The Birnie Group solar class and website were created with much-appreciated support from the NSF CRCD Program under grants 0203504 and 0509886. Continuing Support from the McLaren Endowment is also greatly

More information

Surface micromachining and Process flow part 1

Surface micromachining and Process flow part 1 Surface micromachining and Process flow part 1 Identify the basic steps of a generic surface micromachining process Identify the critical requirements needed to create a MEMS using surface micromachining

More information

National Semiconductor LM2672 Simple Switcher Voltage Regulator

National Semiconductor LM2672 Simple Switcher Voltage Regulator Construction Analysis National Semiconductor LM2672 Simple Switcher Voltage Regulator Report Number: SCA 9712-570 Global Semiconductor Industry the Serving Since 1964 17350 N. Hartford Drive Scottsdale,

More information

Contents. 1. Introduction to Materials Processing Starting Materials 21. Acknowledgements

Contents. 1. Introduction to Materials Processing Starting Materials 21. Acknowledgements Preface Acknowledgements xiii xv 1. Introduction to Materials Processing 1 1.1 Materials Processing: Definition and Scope 1 1.2 Three Approaches to Materials Processing 4 1.3 Materials Processing Steps

More information

CMOS Manufacturing Process

CMOS Manufacturing Process CMOS Manufacturing Process CMOS Process A Modern CMOS Process gate-oxide TiSi 2 AlCu Tungsten SiO 2 n+ p-well p-epi poly n-well p+ SiO 2 p+ Dual-Well Trench-Isolated CMOS Process Circuit Under Design V

More information

Motorola PC603R Microprocessor

Motorola PC603R Microprocessor Construction Analysis Motorola PC603R Microprocessor Report Number: SCA 9709-551 Global Semiconductor Industry the Serving Since 1964 17350 N. Hartford Drive Scottsdale, AZ 85255 Phone: 602-515-9780 Fax:

More information

and Technology of Thin Films

and Technology of Thin Films An Introduction to Physics and Technology of Thin Films This page is intentionally left blank An Introduction to Physics and Technology of Thin Films Alfred Wagendriste1 Institute of Applied and Technical

More information

Plasma-Enhanced Chemical Vapor Deposition

Plasma-Enhanced Chemical Vapor Deposition Plasma-Enhanced Chemical Vapor Deposition Steven Glenn July 8, 2009 Thin Films Lab 4 ABSTRACT The objective of this lab was to explore lab and the Applied Materials P5000 from a different point of view.

More information

Thin Films: Sputtering Systems (Jaeger Ch 6 & Ruska Ch 7,) Sputtering: gas plasma transfers atoms from target to substrate Can deposit any material

Thin Films: Sputtering Systems (Jaeger Ch 6 & Ruska Ch 7,) Sputtering: gas plasma transfers atoms from target to substrate Can deposit any material Thin Films: Sputtering Systems (Jaeger Ch 6 & Ruska Ch 7,) Sputtering: gas plasma transfers atoms from target to substrate Can deposit any material on any substrate (in principal) Start with pumping down

More information

Metallization. Typical current density ~105 A/cm2 Wires introduce parasitic resistance and capacitance

Metallization. Typical current density ~105 A/cm2 Wires introduce parasitic resistance and capacitance Metallization Interconnects Typical current density ~105 A/cm2 Wires introduce parasitic resistance and capacitance RC time delay Inter-Metal Dielectric -Prefer low dielectric constant to reduce capacitance

More information

Photolithography I ( Part 2 )

Photolithography I ( Part 2 ) 1 Photolithography I ( Part 2 ) Chapter 13 : Semiconductor Manufacturing Technology by M. Quirk & J. Serda Bjørn-Ove Fimland, Department of Electronics and Telecommunication, Norwegian University of Science

More information

CHAPTER 1 HOW SEMICONDUCTOR CHIPS ARE MADE

CHAPTER 1 HOW SEMICONDUCTOR CHIPS ARE MADE CHAPTER 1 HOW SEMICONDUCTOR CHIPS ARE MADE Hwaiyu Geng Hewlett-Packard Company Palo Alto, California Lin Zhou Intel Corporation Hillsboro, Oregon 1.1 INTRODUCTION Over the past decades, an information

More information

p. 57 p. 89 p. 97 p. 119

p. 57 p. 89 p. 97 p. 119 Preface Program Committee Members Transistor Physics History John Bardeen and Transistor Physics p. 3 Challenges p. xiii p. xv Technology in the Internet Era p. 33 Metrology Needs and Challenges for the

More information

Semiconductor Technology

Semiconductor Technology Semiconductor Technology von A bis Z Metallization www.halbleiter.org Contents Contents List of Figures List of Tables II III 1 Metallization 1 1.1 Requirements on metallization........................

More information

Today s agenda (19-JAN-2010)

Today s agenda (19-JAN-2010) Today s agenda (19-JAN-2010) 1) Overview of Integrated Circuit technology 2) Managing Deadlines 3) A look @ Spring Schedule 4) Suggested milestones 5) Project concept presentations Action items from last

More information

Metallization. Typical current density ~10 5 A/cm 2 Wires introduce parasitic resistance and capacitance

Metallization. Typical current density ~10 5 A/cm 2 Wires introduce parasitic resistance and capacitance Metallization Interconnects Typical current density ~10 5 A/cm 2 Wires introduce parasitic resistance and capacitance RC time delay Inter-Metal Dielectric -Prefer low dielectric constant to reduce capacitance

More information

Plasma Etching Rates & Gases Gas ratios affects etch rate & etch ratios to resist/substrate

Plasma Etching Rates & Gases Gas ratios affects etch rate & etch ratios to resist/substrate Plasma Etching Rates & Gases Gas ratios affects etch rate & etch ratios to resist/substrate Development of Sidewalls Passivating Films Sidewalls get inert species deposited on them with plasma etch Creates

More information

Process steps for Field Emitter devices built on Silicon wafers And 3D Photovoltaics on Silicon wafers

Process steps for Field Emitter devices built on Silicon wafers And 3D Photovoltaics on Silicon wafers Process steps for Field Emitter devices built on Silicon wafers And 3D Photovoltaics on Silicon wafers David W. Stollberg, Ph.D., P.E. Research Engineer and Adjunct Faculty GTRI_B-1 Field Emitters GTRI_B-2

More information

Micro-Electro-Mechanical Systems (MEMS) Fabrication. Special Process Modules for MEMS. Principle of Sensing and Actuation

Micro-Electro-Mechanical Systems (MEMS) Fabrication. Special Process Modules for MEMS. Principle of Sensing and Actuation Micro-Electro-Mechanical Systems (MEMS) Fabrication Fabrication Considerations Stress-Strain, Thin-film Stress, Stiction Special Process Modules for MEMS Bonding, Cavity Sealing, Deep RIE, Spatial forming

More information

Microstructures using RF sputtered PSG film as a sacrificial layer in surface micromachining

Microstructures using RF sputtered PSG film as a sacrificial layer in surface micromachining Sādhanā Vol. 34, Part 4, August 2009, pp. 557 562. Printed in India Microstructures using RF sputtered PSG film as a sacrificial layer in surface micromachining VIVEKANAND BHATT 1,, SUDHIR CHANDRA 1 and

More information

Rapid Thermal Processing (RTP) Dr. Lynn Fuller

Rapid Thermal Processing (RTP) Dr. Lynn Fuller ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Rapid Thermal Processing (RTP) Dr. Lynn Fuller Webpage: http://people.rit.edu/lffeee 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585)

More information

Process Flow in Cross Sections

Process Flow in Cross Sections Process Flow in Cross Sections Process (simplified) 0. Clean wafer in nasty acids (HF, HNO 3, H 2 SO 4,...) --> wear gloves! 1. Grow 500 nm of SiO 2 (by putting the wafer in a furnace with O 2 2. Coat

More information

Lecture 8. Deposition of dielectrics and metal gate stacks (CVD, ALD)

Lecture 8. Deposition of dielectrics and metal gate stacks (CVD, ALD) Lecture 8 Deposition of dielectrics and metal gate stacks (CVD, ALD) Thin Film Deposition Requirements Many films, made of many different materials are deposited during a standard CMS process. Gate Electrodes

More information

8. Epitaxy. - Extended single-crystal film formation on top of a crystalline substrate

8. Epitaxy. - Extended single-crystal film formation on top of a crystalline substrate 8. Epitaxy 1. Introduction επι(epi placed or resting upon) ταξιζ(taxis arrangement) - Extended single-crystal film formation on top of a crystalline substrate - Homoepitaxy : Film and substrate are the

More information

Schottky-Barrier-Height Modulation of Ni Silicide/Si Contacts by Insertion of Thin Er or Pt Layers

Schottky-Barrier-Height Modulation of Ni Silicide/Si Contacts by Insertion of Thin Er or Pt Layers Schottky-Barrier-Height Modulation of Ni Silicide/Si Contacts by Insertion of Thin Er or Pt Layers Yoshihisa Ohishi 1, Kohei Noguchi 1, Kuniyuki Kakushima 2, Parhat Ahmet 1, Kazuo Tsutsui 2, Nobuyuki Sugii

More information

Oxide Growth. 1. Introduction

Oxide Growth. 1. Introduction Oxide Growth 1. Introduction Development of high-quality silicon dioxide (SiO2) has helped to establish the dominance of silicon in the production of commercial integrated circuits. Among all the various

More information

ME 141B: The MEMS Class Introduction to MEMS and MEMS Design. Sumita Pennathur UCSB

ME 141B: The MEMS Class Introduction to MEMS and MEMS Design. Sumita Pennathur UCSB ME 141B: The MEMS Class Introduction to MEMS and MEMS Design Sumita Pennathur UCSB Outline Class odds and ends Intro to Your Device Process Flow for Your Device Microfabrication Outline Suggested groups

More information

CMOS VLSI Design M.Tech. First semester VTU Anil V. Nandi, ECE department, BVBCET, Hubli

CMOS VLSI Design M.Tech. First semester VTU Anil V. Nandi, ECE department, BVBCET, Hubli CMOS VLSI Design M.Tech. First semester VTU Anil V. Nandi, ECE department, BVBCET, Hubli-580031. Contents: Semiconductor Technology overview Silicon Growth/Processing,Oxidation, Diffusion, Epitaxy, deposition,

More information

Chapter 2. Density 2.65 g/cm 3 Melting point Young s modulus Tensile strength Thermal conductivity Dielectric constant 3.

Chapter 2. Density 2.65 g/cm 3 Melting point Young s modulus Tensile strength Thermal conductivity Dielectric constant 3. Chapter 2 Thin Film Materials Thin films of Silicon dioxide, Silicon nitride and Polysilicon have been utilized in the fabrication of absolute micro pressure sensor. These materials are studied and discussed

More information

Modeling of Local Oxidation Processes

Modeling of Local Oxidation Processes Introduction Isolation Processes in the VLSI Technology Main Aspects of LOCOS simulation Athena Oxidation Models Several Examples of LOCOS structures Calibration of LOCOS effects using VWF Field Oxide

More information

Nonplanar Metallization. Planar Metallization. Professor N Cheung, U.C. Berkeley

Nonplanar Metallization. Planar Metallization. Professor N Cheung, U.C. Berkeley Nonplanar Metallization Planar Metallization Passivation Metal 5 (copper) Metal 3 (copper) Interlevel dielectric (ILD) Via (tungsten) Metal 1 (copper) Tungsten Plug to Si Silicon Caps and Plugs oxide oxide

More information

ENG/PHYS3320 Microsystems Technology Chapter 2 Fabrication of Microsystems

ENG/PHYS3320 Microsystems Technology Chapter 2 Fabrication of Microsystems ENG/PHYS3320 Microsystems Technology Chapter 2 Fabrication of Microsystems ENG/PHYS3320: R.I. Hornsey Fab: 1 Fabrication Many of the new transducers are based on a technology known as micromachining a

More information

From microelectronics down to nanotechnology.

From microelectronics down to nanotechnology. From microelectronics down to nanotechnology sami.franssila@tkk.fi Contents Lithography: scaling x- and y-dimensions MOS transistor physics Scaling oxide thickness (z-dimension) CNT transistors Conducting

More information

Cost of Integrated Circuits

Cost of Integrated Circuits Cost of IC Design 1 Cost of Integrated Circuits NRE (Non-Recurrent Engineering) costs fixed design time and effort, mask generation independent of sales volume / number of products one-time cost factor

More information

Advanced CMOS Process Technology Part 3 Dr. Lynn Fuller

Advanced CMOS Process Technology Part 3 Dr. Lynn Fuller MICROELECTRONIC ENGINEERING ROCHESTER INSTITUTE OF TECHNOLOGY Part 3 Dr. Lynn Fuller Webpage: http://people.rit.edu/lffeee Electrical and Microelectronic Engineering Rochester Institute of Technology 82

More information

Applications of High-Performance MEMS Pressure Sensors Based on Dissolved Wafer Process

Applications of High-Performance MEMS Pressure Sensors Based on Dissolved Wafer Process Applications of High-Performance MEMS Pressure Sensors Based on Dissolved Wafer Process Srinivas Tadigadapa and Sonbol Massoud-Ansari Integrated Sensing Systems (ISSYS) Inc., 387 Airport Industrial Drive,

More information

Section 4: Thermal Oxidation. Jaeger Chapter 3. EE143 - Ali Javey

Section 4: Thermal Oxidation. Jaeger Chapter 3. EE143 - Ali Javey Section 4: Thermal Oxidation Jaeger Chapter 3 Properties of O Thermal O is amorphous. Weight Density =.0 gm/cm 3 Molecular Density =.3E molecules/cm 3 O Crystalline O [Quartz] =.65 gm/cm 3 (1) Excellent

More information

THE IMPACT OF 3D DEVICES ON THE FUTURE OF PROCESS MATERIALS TRENDS & OPPORTUNITIES

THE IMPACT OF 3D DEVICES ON THE FUTURE OF PROCESS MATERIALS TRENDS & OPPORTUNITIES THE IMPACT OF 3D DEVICES ON THE FUTURE OF PROCESS MATERIALS TRENDS & OPPORTUNITIES L. Shon Roy K. Holland, PhD. October 2014 Materials Examples Process materials used to make semiconductor devices Gases

More information

Atomic Layer Deposition(ALD)

Atomic Layer Deposition(ALD) Atomic Layer Deposition(ALD) AlO x for diffusion barriers OLED displays http://en.wikipedia.org/wiki/atomic_layer_deposition#/media/file:ald_schematics.jpg Lam s market-leading ALTUS systems combine CVD

More information

Surface Micromachining

Surface Micromachining Surface Micromachining Outline Introduction Material often used in surface micromachining Material selection criteria in surface micromachining Case study: Fabrication of electrostatic motor Major issues

More information

SEMATECH Symposium Korea 2012 Practical Analysis Techniques of Nanostructured Semiconductors by Electron Microscopy

SEMATECH Symposium Korea 2012 Practical Analysis Techniques of Nanostructured Semiconductors by Electron Microscopy SEMATECH Symposium Korea 2012 Practical Analysis Techniques of Nanostructured Semiconductors by Electron Microscopy Jun-Mo Yang, Ph.D. Measurement & Analysis Team National NanoFab Center, Korea Introduction

More information

Lecture 10: MultiUser MEMS Process (MUMPS)

Lecture 10: MultiUser MEMS Process (MUMPS) MEMS: Fabrication Lecture 10: MultiUser MEMS Process (MUMPS) Prasanna S. Gandhi Assistant Professor, Department of Mechanical Engineering, Indian Institute of Technology, Bombay, 1 Recap Various VLSI based

More information

Gaetano L Episcopo. Introduction to MEMS

Gaetano L Episcopo. Introduction to MEMS Gaetano L Episcopo Introduction to MEMS What are MEMS? Micro Electro Mechanichal Systems MEMS are integrated devices, or systems of devices, with microscopic parts, such as: Mechanical Parts Electrical

More information

Rockwell R RF to IF Down Converter

Rockwell R RF to IF Down Converter Construction Analysis Rockwell R6732-13 RF to IF Down Converter Report Number: SCA 9709-552 Global Semiconductor Industry the Serving Since 1964 17350 N. Hartford Drive Scottsdale, AZ 85255 Phone: 602-515-9780

More information

Alternative Methods of Yttria Deposition For Semiconductor Applications. Rajan Bamola Paul Robinson

Alternative Methods of Yttria Deposition For Semiconductor Applications. Rajan Bamola Paul Robinson Alternative Methods of Yttria Deposition For Semiconductor Applications Rajan Bamola Paul Robinson Origin of Productivity Losses in Etch Process Aggressive corrosive/erosive plasma used for etch Corrosion/erosion

More information

Some Aspects of Sublimation Growth of SiC Ingots p. 41 Growth of Highly Aluminum-Doped p-type 6H-SiC Single Crystals by the Modified Lely Method

Some Aspects of Sublimation Growth of SiC Ingots p. 41 Growth of Highly Aluminum-Doped p-type 6H-SiC Single Crystals by the Modified Lely Method SiC Bulk Growth Large Diameter, Low Defect Silicon Carbide Boule Growth p. 3 SiC Single Crystal Growth by Sublimation: Experimental and Numerical Results p. 7 Impact of SiC Source Material on Temperature

More information

5.8 Diaphragm Uniaxial Optical Accelerometer

5.8 Diaphragm Uniaxial Optical Accelerometer 5.8 Diaphragm Uniaxial Optical Accelerometer Optical accelerometers are based on the BESOI (Bond and Etch back Silicon On Insulator) wafers, supplied by Shin-Etsu with (100) orientation, 4 diameter and

More information

NON-PLANAR SILICON OXIDATION: AN EXTENSION OF THE DEAL-GROVE MODEL BRIAN D. LEMME. B.S., University of Nebraska-Lincoln, 2000 A REPORT

NON-PLANAR SILICON OXIDATION: AN EXTENSION OF THE DEAL-GROVE MODEL BRIAN D. LEMME. B.S., University of Nebraska-Lincoln, 2000 A REPORT NON-PLANAR SILICON OXIDATION: AN EXTENSION OF THE DEAL-GROVE MODEL by BRIAN D. LEMME B.S., University of Nebraska-Lincoln, 2000 A REPORT submitted in partial fulfillment of the requirements for the degree

More information

Electrical Properties of Ultra Shallow p Junction on n type Si Wafer Using Decaborane Ion Implantation

Electrical Properties of Ultra Shallow p Junction on n type Si Wafer Using Decaborane Ion Implantation Mat. Res. Soc. Symp. Proc. Vol. 686 2002 Materials Research Society Electrical Properties of Ultra Shallow p Junction on n type Si Wafer Using Decaborane Ion Implantation Jae-Hoon Song, Duck-Kyun Choi

More information

III-V Integrated Circuit Fabrication Technology

III-V Integrated Circuit Fabrication Technology III-V Integrated Circuit Fabrication Technology Shiban Tiku Dhrubes Biswas III-V Integrated Circuit Fabrication Technology III-V Integrated Circuit Fabrication Technology Shiban Tiku Dhrubes Biswas Published

More information

Intel Pentium Processor W/MMX

Intel Pentium Processor W/MMX Construction Analysis Intel Pentium Processor W/MMX Report Number: SCA 9706-540 Global Semiconductor Industry the Serving Since 1964 15022 N. 75th Street Scottsdale, AZ 85260-2476 Phone: 602-998-9780 Fax:

More information

EPITAXY extended single-crystal film formation on top of a crystalline substrate. Homoepitaxy (Si on Si) Heteroepitaxy (AlAs on GaAs)

EPITAXY extended single-crystal film formation on top of a crystalline substrate. Homoepitaxy (Si on Si) Heteroepitaxy (AlAs on GaAs) extended single-crystal film formation on top of a crystalline substrate Homoepitaxy (Si on Si) Heteroepitaxy (AlAs on GaAs) optoelectronic devices (GaInN) high-frequency wireless communication devices

More information

enabling tomorrow s technologies CVD Production Systems for Industrial Coatings powered by

enabling tomorrow s technologies CVD Production Systems for Industrial Coatings powered by enabling tomorrow s technologies CVD Production Systems for Industrial Coatings powered by www.cvdequipment.com Equipment Design, Engineering, and Manufacturing Thin film deposition systems for industrial

More information

Section 4: Thermal Oxidation. Jaeger Chapter 3

Section 4: Thermal Oxidation. Jaeger Chapter 3 Section 4: Thermal Oxidation Jaeger Chapter 3 Properties of O Thermal O is amorphous. Weight Density =.0 gm/cm 3 Molecular Density =.3E molecules/cm 3 O Crystalline O [Quartz] =.65 gm/cm 3 (1) Excellent

More information

200mm Next Generation MEMS Technology update. Florent Ducrot

200mm Next Generation MEMS Technology update. Florent Ducrot 200mm Next Generation MEMS Technology update Florent Ducrot The Most Exciting Industries on Earth Semiconductor Display Solar 20,000,000x reduction in COST PER TRANSISTOR in 30 years 1 20x reduction in

More information

Etching Etching Definitions Isotropic Etching: same in all direction Anisotropic Etching: direction sensitive Selectivity: etch rate difference

Etching Etching Definitions Isotropic Etching: same in all direction Anisotropic Etching: direction sensitive Selectivity: etch rate difference Etching Etching Definitions Isotropic Etching: same in all direction Anisotropic Etching: direction sensitive Selectivity: etch rate difference between 2 materials Need strong selectivity from masking

More information

KGC SCIENTIFIC Making of a Chip

KGC SCIENTIFIC  Making of a Chip KGC SCIENTIFIC www.kgcscientific.com Making of a Chip FROM THE SAND TO THE PACKAGE, A DIAGRAM TO UNDERSTAND HOW CPU IS MADE? Sand CPU CHAIN ANALYSIS OF SEMICONDUCTOR Material for manufacturing process

More information

Supporting Information

Supporting Information Supporting Information Fast-Response, Sensitivitive and Low-Powered Chemosensors by Fusing Nanostructured Porous Thin Film and IDEs-Microheater Chip Zhengfei Dai,, Lei Xu,#,, Guotao Duan *,, Tie Li *,,

More information

2006 UPDATE METROLOGY

2006 UPDATE METROLOGY INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS METROLOGY THE ITRS DEVED AND INTENDED FOR TECHNOLOGY ASSESSMENT ONLY AND WITHOUT REGARD TO ANY COMMERCIAL CONSIDERATIONS PERTAINING TO INDIVIDUAL PRODUCTS

More information

Lecture 6. Through-Wafer Interconnect. Agenda: Through-wafer Interconnect Polymer MEMS. Through-Wafer Interconnect -1. Through-Wafer Interconnect -2

Lecture 6. Through-Wafer Interconnect. Agenda: Through-wafer Interconnect Polymer MEMS. Through-Wafer Interconnect -1. Through-Wafer Interconnect -2 Agenda: EEL6935 Advanced MEMS (Spring 2005) Instructor: Dr. Huikai Xie Lecture 6 Through-wafer Interconnect EEL6935 Advanced MEMS 2005 H. Xie 1/21/2005 1 Motivations: Wafer-level packaging CMOS 3D Integration

More information

EE-612: Lecture 28: Overview of SOI Technology

EE-612: Lecture 28: Overview of SOI Technology EE-612: Lecture 28: Overview of SOI Technology Mark Lundstrom Electrical and Computer Engineering Purdue University West Lafayette, IN USA Fall 2006 NCN www.nanohub.org Lundstrom EE-612 F06 1 outline 1)

More information

How To Write A Flowchart

How To Write A Flowchart 1 Learning Objectives To learn how you transfer a device concept into a process flow to fabricate the device in the EKL labs You learn the different components that makes up a flowchart; process blocks,

More information

EE C245 ME C218 Introduction to MEMS Design Fall 2011

EE C245 ME C218 Introduction to MEMS Design Fall 2011 Lecture Outline EE C245 ME C218 Introduction to MEMS Design Fall 2011 Prof. Clark T.-C. Nguyen Dept. of Electrical Engineering & Computer Sciences University of California at Berkeley Berkeley, CA 94720

More information

Visit

Visit Practical Applications for Nano- Electronics by Vimal Gopee E-mail: Vimal.gopee@npl.co.uk 10/10/12 Your Delegate Webinar Control Panel Open and close your panel Full screen view Raise hand for Q&A at the

More information

Modules offered by MSE

Modules offered by MSE s offered by MSE Code MLE1101 Title Introductory Materials Science And Engineering Description Introductory aspects of materials science and engineering (i.e. structure, properties and function). Structure

More information

Interconnects. Outline. Interconnect scaling issues Aluminum technology Copper technology. Properties of Interconnect Materials

Interconnects. Outline. Interconnect scaling issues Aluminum technology Copper technology. Properties of Interconnect Materials Interconnects Outline Interconnect scaling issues Aluminum technology Copper technology 1 Properties of Interconnect Materials Metals Silicides Barriers Material Thin film Melting resistivity point ( C)

More information