Complementary Metal-Oxide-Semiconductor Very Large-Scale Integrated Circuit Design

Transcription

1 Complementary Metal-Oxide-Semiconductor Very Large-Scale Integrated Circuit Design Bradley A. Minch Mixed Analog-Digital VLSI Circuits and Systems Lab Cornell University Ithaca, NY October 18, 2003

2 1 Simplified Periodic Table of the Elements H Li Na K Rb Cs Be Mg Ca Sr Ba B Al Ga In Tl C Si Ge Sn Pb N P As Sb Bl O S Se Te Po F Cl Br I At Ne Ar Kr Xe Rn He Hydrogen Lithium Sodium Potassium Rubidium Cesium Beryllium Magnesium Calcium Strontium Barium Boron Aluminum Gallium Indium Thallium Carbon Silicon Germanium Tin Lead Nitrogen Phosphorus Arsenic Antimony Bismuth Oxygen Sulfur Selenium Tellurium Polonium Flourine Chlorine Bromine Iodine Astatine Neon Argon Krypton Xenon Radon Helium I II III IV V VI VII VIII

3 Schematic Representation of a Silicon Crystal 2 covalent bond valence electron Si Si Si Si silicon atom Si Si Si Si Si Si intrinsic silicon crystal

4 Electrons and Holes in the Silicon Crystal 3 Si silicon atom (conduction) electron Si Si Si hole Si Si Si Si Si Si intrinsic silicon crystal

5 Electrons and Holes in the Silicon Crystal 3 Si Si Si Si silicon atom electron hole Si Si Si Si Si Si intrinsic silicon crystal

6 Silicon Crystal Doped with Donor Impurities 4 donor atom extra electron (loosely bound) Si P Si P phosphorus atom (donor for silicon) Si Si Si Si Si Si doped silicon crystal: n-type

7 Silicon Crystal Doped with Donor Impurities 4 ionized donor + Si P Si extra proton (space charge) P phosphorus atom (donor for silicon) Si Si Si Si Si Si electron doped silicon crystal: n-type

8 Silicon Crystal Doped with Acceptor Impurities 5 acceptor atom extra hole (easy to fill) Si B Si B boron atom (acceptor for silicon) Si Si Si Si Si Si doped silicon crystal: p-type

9 Silicon Crystal Doped with Acceptor Impurities 5 ionized acceptor extra electron (space charge) B boron atom (acceptor for silicon) Si B Si Si Si Si Si Si Si hole doped silicon crystal: p-type

10 N-Channel Metal-Oxide-Semiconductor Transistor 6 n + drain ionized acceptor gate bulk oxide depletion region ionized donor source n + p -

11 N-Channel Metal-Oxide-Semiconductor Transistor 6 n + n + p -

12 N-Channel Metal-Oxide-Semiconductor Transistor 6 n + n + p -

13 N-Channel Metal-Oxide-Semiconductor Transistor 6 n + n + p -

14 N-Channel Metal-Oxide-Semiconductor Transistor 6 n + n + p -

15 N-Channel Metal-Oxide-Semiconductor Transistor 6 n + n + p -

16 N-Channel Metal-Oxide-Semiconductor Transistor 6 n + n + p -

17 photoresist SiO 2 Oxidize silicon surface and coat with photoresist

18 ultraviolet light mask Pattern and selectively etch oxide layer

19 ion implant photoresist SiO 2 Ion implant for n-well regions

20 n - well SiO 2 Anneal n-well implant and grow oxide

21 nitride n - well SiO 2 Remove all oxide, regrow thin oxide, and deposit nitride layer

22 nitride SiO 2 n - well Pattern and selectively etch oxide and nitride layers

23 nitride n - well SiO 2 Grow field oxide in areas without nitride

24 polysilicon gate oxide n - well field oxide Remove nitride and thin oxide, grow gate oxide, and deposit poly

25 polysilicon n - well Pattern and selectively etch polysilicon

26 photoresist n - well Conformally coat entire surface with photoresist

27 n - well Remove photoresist to expose regions for n + implant

28 n + implant n - well Ion implant for n + regions and remove all photoresist

29 photoresist n - well Conformally coat entire surface with photoresist

30 n - well Remove photoresist to expose regions for p + implant

31 p + implant n - well Ion implant for p + regions and remove all photoresist

32 n - well SiO 2 Deposit thick oxide layer over entire surface

33 p + n + p + n - well SiO 2 n + Anneal and drive in both implants

34 n - well SiO 2 Planarize surface by chemical-mechanical polishing

35 contact holes n - well Open contact windows in the oxide

36 metal1 n - well Fill contact holes with metal and deposit metal1

37 metal1 n - well Pattern and selectively etch metal1

38 SiO 2 metal1 n - well Deposit thick oxide layer over entire surface

39 SiO 2 metal1 n - well Planarize surface by chemical-mechanical polishing

40 via holes n - well Open via windows in the oxide

41 metal2 n - well Fill via holes with metal and deposit metal2

42 metal2 n - well Pattern and selectively remove metal2

43 metal2 SiO 2 n - well Deposit thick oxide layer over entire surface

44 MOS Transistor Circuit Symbols 8 D S G G S nmos transistor D pmos transistor

45 MOS Transistor Switch Networks 9 If we represent a logical 0 by 0V and a logical 1 by V DD, then points X and Y are connected electrically if A X X A X X A B A B B Y Y A B A B A B A B Transistors connected in series implement a logical AND function while transistors connected in parallel implement a logical OR function! B Y Y

46 Simple CMOS Logic Gates: NOT (Z = A) 10 A Z A Z A Z

47 Simple CMOS Logic Gates: NOR (Z = (A B)) 10 A A B Z B Z A B Z

48 Simple CMOS Logic Gates: NAND (Z = (A B)) 10 A B Z B A Z A B Z