Physics and Material Science of Semiconductor Nanostructures

Transcription

1 Physics and Material Science of Semiconductor Nanostructures PHYS 570P Prof. Oana Malis

2 Lecture 6 Bulk semiconductor growth Single crystal techniques Nanostructure fabrication Epitaxial growth MBE, MOCVD Bottom up approaches: self assembly Fabrication techniques Ref. Ihn Chapter 2, 6

3 Self-assembly of nanostructures

4 Simple example: Quantum wire growth on periodically-facetted surfaces

5 Quantum wire growth on periodically facetted surfaces The first self-assembly route for semiconductor nanostructure we will consider is the growth of quantum wires on periodically facetted surfaces. To motivate our discussion, we begin with an example: AFM image of self-assembled InGaAs quantum wires grown on a facetted GaAs surface. Quantum wires of this type were incorporated into a semiconductor laser which exhibited linear polarisation of its light output due to the anisotropy of the active region. Ohno et al. J. Vac. Sci. Technol. B, 22, (2004)

6 Reminder: Crystal habit planes The shapes of natural minerals often reflect their underlying crystal symmetry to some extent This is often because the crystals grow with low energy facets forming large areas What happens if we deliberately produce a crystal surface which is at an angle to these low energy facets?

7 Formation of periodically faceted surfaces When the crystal is sliced through at a random angle, many of the atoms are in positions where they cannot fulfill their bonding By reorganising the atoms to form low energy facets, many atoms are now in more energetically favorable positions

8 Example of a periodically facetted surface These STM images shows a TaC(110) surface which has broken up into an array of facets following annealing. The period of the structure along [1-10] is 6a (Image from Zuo et al. Surf. Sci. 301, 233 (1994))

9 Vicinal surfaces and macroscopic step bunching A vicinal surface occurs when a crystal surface is at a small angle to a low Miller index plane. It ideally consists of flat terraces with low Miller indices, with neighbouring terraces separated by equallyspaced steps of monolayer height As with the faceted surfaces we have already discussed, there is an energy associated with each step edge. Hence, it is possible to reduce the overall energy of the system by forming step bunches. However, the contribution of elastic stress to the total energy will again increase as the step bunches get further apart, so again an optimum step spacing exists which minimises the total energy.

10 Vicinal surfaces and macroscopic step bunching: possible configurations Here, the step bunches form 2 facets: the original low index facet and another facet at 90 to that Here, the steps form an array of alternating singular facets (terraces) and vicinal facets. The vicinal facets may reconstruct (i.e. rearrange the atoms) to reduce the local surface energy further.

11 Vicinal surfaces and macroscopic step bunching: Example 200 nm 200 nm STM image of a vicinal Si(111) surface. The net surface orientation is 4 off (111) towards (-211). (7 7) reconstructed terraces and unreconstructed step bunches 10 steps high are observed. From: Williams et al. Surf. Sci. 294, 219 (1993).

12 Heteroepitaxial growth on facetted surfaces The formation of surfaces with nanoscale separation is all very good but to form quantum wires, we need to have regions of a lower bandgap material surrounded by a higher bandgap material. So what happens when we deposit a second material (heteroepitaxy) on our faceted surface? It could cover the surface homogeneously It could form isolated large islands It could form lots of small islands

13 Heteroepitaxial growth on facetted surfaces: quantum wires Often, the periodic facets provide a template for the shape of the islands which are deposited. Hence, quantum wires are formed. Isolated large wire Smaller wires, with a distribution of lengths

14 Influence of interface energy on heteroepitaxial growth mode So, what controls whether we get a homogenous surface layer or the growth of islands? A key factor is the energy of the interface(s) between the periodically faceted substrate surface and the epitaxial layer. If the interface energy is low, the deposited material will tend to wet the substrate i.e. we will get a homogenous coverage. If the interface energy is high, the deposited material will tend to form islands. To derive the equilibrium island shape, we would also need to consider the lattice mismatch between the cluster and the island and the resulting strain energy. In a real system, kinetic effects will also play a role. For instance if diffusion over the surface is slow, this will tend to favour the formation of lots of small clusters, rather than isolated large clusters.

15 Example of quantum wire formation on a periodically facetted surface Efremov et al. (Physica E 23 (2004) ) grew a GaAs quantum wire superlattice on a periodically facetted AlAs(311) surface. Following the growth of an initial layer of GaAs wires, more AlAs is deposited and reforms the originally facetted surface, allowing more layers of wires to be deposited. The left hand image is a high resolution TEM image of the quantum wire array. The right hand image is a simulation of an HRTEM image for an ideal array.

16 Self-assembled quantum dots

17 Formation of InAs quantum dots (S-K mode) InAs (a 0 =6.06 Å) GaAs (a 0 =5.65 Å) (i) (ii) 2D layer growth 2D-3D transition Ripening phase Elastic strain energy stable 2D (i) metastable 2D (ii) S-K morphology 2D + 3D E a (i) Strain exists but lattice matched (ii) Coherently strained defect-free 3D island Growth time W. Seifert et al., J. Crystal. Growth (1997)

18 Typical characteristics of self-assembled In x Ga 1-x As quantum dots formed on GaAs (100) substrate (100) 240K PL Intensity (a. u.) 200K 150K QD 100K ev QW 17K ev Photon Energy (ev) 1.3 Monolayers of InAs, T sub : 500 O C N QD : 3.4 X /cm 2, QD Size : ~ 40 nm => Resulting in irregular positioning and distribution

19 Typical structures of multi-stacked InAs QDs/GaAs S 15 periods (Volcano-like defect) Vertically aligned QDs [001] [110] 6 periods Well aligned

20 Multi-stacked InAs QDs grown by MBE GaAs AlGaAs GaAs InAs Q.D. GaAs Well aligned QD array Large strain high In mole fraction ~ 30 nm Small strain Large strain ~ 55 nm 1.7 ML InAs at 470 C GaAs/AlGaAs at 510 C ~ 6 nm

21 The Structure of QD VCSEL 1.3 m Intermixed QD oxide layer oxide layer top DBR bottom DBR GaAs/Al(Ga)As DBR GaAs/Al(Ga)As DBR GaAs

22 Infra-red Photodetector Using Quantum Dots A maximum responsivity of 4.7 A/W has been recorded at 10 K and bias-voltage 9 V. High responsivity has been seen up to 190 K. Tokyo University, K. Hirakawa lab., Appl. Phys. Lett. 75(10), 1428 (1999)

23 InGaAs QDs Selectively Formed on the Patterned Oxide Layer QDs 0.1 um 0.3 um Ga 2 O 3 QDs GaAs substrate QDs Ga 2 O 3 mask layer

24 Schematic illustration for selective formation of QDs Sputtering or CVD GaAs (100) substrate Oxide layer PMMA Oxide layer Patterning of PMMA by E-beam Lithography Oxide Mask Electron-beam or laser holography Etching and Removing of PMMA Oxide layer Molecular beam epitaxy Selective growth of QDs (InGaAs) Etching Removal of oxide layer Wetting layer

25 Surface morphologies of the InAs QDs, QWRs (2 o -off (100) GaAs substrates, 1x1 m 2 AFM images ) Changing the thickness of GaAs buffer layer transformation of the terrace width Growing optimal thickness of InAs layer for wirelike QDs Control of interval between wirelike QDs InAs wirelike QDs GaAs buffer GaAs buffer GaAs Buffer 43 ML / 55 nm / 2.0 ML 70 ML / 75 nm / 2.3 ML 120 ML /91 nm / 2.5 ML The thickness of GaAs buffer layer / The terrace width / The optimal thickness of InAs layer

26 Single electron device using self-assembled QDs InAs quantum dots Al lever-arm T = 300 K 200 GaAs cap layer 4 nm InAs QD layer GaAs buffer layer 20 nm S.I. GaAs Substrate Al lever-arm Current (pa) di/dv (ns) InAs quantum dots nm Bias Voltage (V)

27 SET structures using In(Ga)As/GaAs wire-like SAQDs Source Drain Source Gate Drain Control Back Gate Upper Gates Back Gate

28 Synthesis of Nanowires Methods of Nanowire synthesis VLS (Vapour Liquid Solid) method Modification of VLS CVD (Chemical Vapour Deposition) LCG (Laser Ablation catalytic Growth) Low temperature VLS method FLS (Fluid Liquid Solid) mechanism SLS (Solution Liquid Solid) mechanism OAG (Oxide Assisted Growth)

29 Semiconductor nanowires Catalytic (VLS) crystal growth Key features: gold particle liquid Au-InP eutect vapor time nanowire nanoscale diameter (few to 100 nm) High aspect ratio (1-100 micron long) Versatility in composition

30 Possible nanowire structures heterojunctions hollow p-n junctions coaxial

31 Vapour Liquid Solid method Basics of phase diagrams Alloys have phase diagrams Lever rule: T liquid liquid and solid liquidus a l s g g s a l + a s = 1 g g tot l solidus mixed crystal A g l g tot g s B

32 Eutectic: Vapour Liquid Solid method - coexistence of 3 phases - lowest temperature where system is still totally liquid - minimum of liquidus curve - solid in solid + liquid phase consists of only one material T liquid liquidus Eutectic A + liquid B+ liquid Mixed crystal A solidus B

33 Vapour Liquid Solid method - mix of semiconductor and metal - eutectic - melting point of Semiconductor with metal lower - growth of one pure material metal as catalyst T A + l l B+ l Mixed crystal Growth procedure: A B reactant vapor reactant vapor reactant vapor reactant vapor metal metal +Sc metal +Sc metal +Sc Sc Liquid catalytic nanocluster supersaturating Nanowire nucleation Nanowire growth

34 Vapour Liquid Solid method Synthesis of multicomponent semiconductor, like binary III-V materials (GaAs, GaP,InAs, InP) ternary III-V materials (GaAs/P, InAs/P) binary II-VI materials ( ZnS, ZnSe, CdS, CdSe) binary Si Ge alloys Pseudobinary phase diagram E.g. Au - GaAs pseudobinary phase diagram T Au + liquid liquid GaAs+ liquid Au + GaAs Au GaAs

35 Vapour Liquid Solid method - critical diameter, so that the liquid catalyst clusters are stable in equilibrium d c 4 RTln C C = surface free energy = molar Volume R = gas constant T = absolute temperature C = concentration of semiconductor component in liquid alloy C equilibrium concentration Problem: in fluid at according temperature critical diameter about d = 0.2 m Goal: finding methods to get smaller metal clusters to start NW growth

36 Chemical Vapour Deposition Example: growth of GaN nanowires in CVD reactor - Ni catalyst on Si substrate with 0.5 M Ni(NO 3 ) 2 6H 2 O drying in oven - formation of Ni islands on Si substrate - Ga or GaN powder in inner reactor - Hydrogen in outer tube to minimize side reactions until 700 C - Ammonia gas into inner reactor start of nanowire growth - Nitrogen gas during cooling phase

37 CVD reactor Chemical Vapour Deposition 1. Vertical tubular furnance 2. Gas inlet line 3. Ni-coated Si substrate 4. Gas outlet line 5. Outer reactor tube 6. Inner reactor tube

38 Laser Ablation Catalytic Growth nanometer sized cluster with laser ablation h SC SC M SC M, SC M SC SC SC SC Laser ablation Vapour condenses in cluster Supersaturation until start of wire growth Transport from growth zone

39 LCG reactor Laser Ablation Catalytic Growth Focus Tube furnace Cold finger Laser Gas: in Target in quartz tube Gas: out

40 Laser Ablation Catalytic Growth Results with LCG: with Si: - uniform Diameter down to 3 nm. - Amorphous coating, consisting of SiO 2 - Nanocluster at the end of the wire, consisting of metal and Si (e.g. FeSi 2 ) - [111] growth direction Nanowire diameter depends on nanocluster catalyst diameter: Nanocluster nm 4.9 +/ / / /- 3.0 Nanowire nm 6.4 +/ / / /- 2.7

41 Applications - Nanowire heterostructures + axial heterostructures, e.g GaP-GaAs heterojunction + radial heterostructures, e.g. Si-Ge + Nanowire superlattices

42 Applications - Sensors + ph sensors + gas sensors (e.g. Ammonia, Water) Gas in Gas out - Single mode optical wave guides

43 Applications - Nanophotonics + nanoleds (p and n type nanowires in crossed nanowire device light from crossing point at forward bias) - Nanoprobes + Tips for Atomic Force Microscopy - High temperature, high current superconductors - Lasers (electrically driven) - nanofets etc.