Qualification Report June, 1994, QTP# 92361 Version 1.1 CY7C46X/47X, MINNESOTA FAB MARKETING PART NUMBER CY7C460 CY7C462 CY7C464 CY7C470 CY7C472 CY7C474 DEVICE DESCRIPTION Cascadable 8K x 9 FIFO Cascadable 16K x 9 FIFO Cascadable 32K x 9 FIFO 8K x 9 FIFO 16K x 9 FIFO 32K x 9 FIFO
PRODUCT DESCRIPTION (for qualification) Information provided in this document is intended for generic qualification and technically describes the Cypress part supplied: Marketing Part #: Device Description: Cypress Division: CY7C464/CY7C474 32K x 9 Cascadable FIFO / 32K x 9 FIFO Cypress Semiconductor Corporation Overall Die (or Mask) REV Level (pre-requisite for qualification): Rev. A/B Die Size (stepping): 275 mils x 343 mils What ID markings on Die: 7C470A Cypress Qualification completion/marketing Availability Dates (Current REV): June/1994 Now TECHNOLOGY/FAB PROCESS DESCRIPTION Number of Metal Layers: 1 Metal Composition: TiW, 1% SiAl, Ti Passivation Type and Materials: 4K A 2%P LTO + 15K A Oxynitride Free Phosphorus contents in top glass layer(%): None Die Coating(s), if used: Polyimide Generic Process Technology/Design Rule (µ-drawn): CMOS, Doble Poly, Single Metal /0.8µm Gate Oxide Material/Thickness (MOS): SiO2 / 195 A Name/Location of Die Fab (prime) Facility: Cypress Semiconductor, Bloomington, MN Die Fab Line ID/Wafer Process ID: Fab3 / R21
PAGE 3 PLASTIC PACKAGE/ASSEMBLY DESCRIPTION Package Outline, Type, or Name: 28-pin, 600-mil PDIP Die to Package edge clearance: 127 mils per side Mold Compound Name/Manufacturer: Sumitomo EME-6300H(R) Lead Frame material: Copper Lead Finish, composition: Solder Plated, 85%Sn, 15%Pb Die Attach Area Plating: Silver Spot Die Attach Pad Dim: 320 mils x 390 mils Die Attach Method: Paste Die Attach Material: Silver Epoxy Wire Bond Method: Thermosonic Wire Material/Size: Gold / 1.3 mil Name/Location of Assembly (prime) facility: Assembly Line ID and Process ID: INDNS-O / P2868 PLASTIC PACKAGE/ASSEMBLY DESCRIPTION Package Outline, Type, or Name: 28L Plastic Leaded Chip Carrier Die to Package edge clearance: 66 mils per side Mold Compound Name/Manufacturer: Sumitomo EME-6300H(R) Lead Frame material: Copper Lead Finish, composition: Solder Plated, 85%Sn, 15%Pb Die Attach Area Plating: Silver Spot Die Attach Pad Dim: 302 mils x 365 mils Die Attach Method: Paste Die Attach Material: Silver Epoxy Wire Bond Method: Thermosonic Wire Material/Size: Gold / 1.3 mil Name/Location of Assembly (prime) facility: Assembly Line ID and Process ID: KOREA-A / J32R
PAGE 4 HERMETIC PACKAGE/ASSEMBLY DESCRIPTION Package Outline, Type, or Name: 28-pin, 600-mil CerDIP Die to Package edge clearance: 115 mils per side Mold Compound Name/Manufacturer: N/A Lead Frame material: Alloy 42 Lead Finish, composition: Solder Dipped, 63%Sn, 37%Pb Die Attach Area Plating: None Die Attach Pad Dim: 360 mils x 400 mils Die Attach Method: Paste Die Attach Material: Silver Glass Wire Bond Method: Ultrasonic Wire Material/Size: Aluminum / 1.25 mil Name/Location of Assembly (prime) facility: Assembly Line ID and Process ID: ALPHA-X/D286L HERMETIC PACKAGE/ASSEMBLY DESCRIPTION Package Outline, Type, or Name: 32-pin Rectangular Leadless Chip Carrier Die to Package edge clearance: 83 mils per side Mold Compound Name/Manufacturer: N/A Lead Frame material: Alloy 42 Lead Finish, composition: Solder Dipped, 63%Sn, 37%Pb Die Attach Area Plating: None Die Attach Pad Dim: 320 mils x 410 mils Die Attach Method: Paste Die Attach Material: Silver Glass Wire Bond Method: Ultrasonic Wire Material/Size: Aluminum / 1.25 mil Name/Location of Assembly (prime) facility: Assembly Line ID and Process ID: ALPHA-X/L32RU
PAGE 5 OTHER INFORMATION For approval by similarity, identify other devices using the same basic die with bonding or metal mask options or test selections and explain: CY7C460/CY7C462/CY7C464/CY7C470/CY7C472/CY7C474 If Cypress is planning any changes in the near future, identify change (Qtr/Yr) in: Die Design Rev./Shrink: Fab/Assembly site change: Other Devices to be qualified in this technology: Other Packages to be qualified for this device: ESD Voltage Rating (per MIL STD-008, Method 3018): Flammability Classification (UL-94V): Die Process Change: Cross Licensee/Licensor: 1/8 or None Alternate Fab/Assembly Locations: Assembly : >2,000V Please attach the following Qualification / Reliability data for the die revision and Package type, for the fab and assembly sites identified above (mark [X] if included): 1 X HAST (5.5V, 130 C, 85%RH, 15psig) 7 X Operating Life at (temp): 150 C/125 C 2 X Temperature Cycles (-65 C to 150 C) 8 X Steady State Life (HTSSL, 5.75V, 150 C) 3 X Temperature Cycles (-40 C to 165 C) 9 Temperature Humidity Bias (5.5V, 85 C, 85%RH) 4 Data Retention Bake, Plastic (165 C) 10 X Latchup Testing 5 Data Retention Bake, Hermetic (250 C) 11 X ESD Tests (MIL-STD 883, method 3015) 6 X Autoclave (PCT, 121 C, 100%RH) 12 X Other: Current Density Input Capacitance Read & Record Life Test Internal Water Vapor
PAGE 6 Product Family: Mfg Division: FIFO Cypress Semiconductor PRODUCT INFORMATION FOR QUALIFICATION BY SIMILARITY Supplier's Part Number Rate Speed (ns) Pkg Size/ Type Die Rev. Die Size mil x mil (stepping) Design Rule (µ) Fabrication Process ID Line ID Passivation Type Mold Compound Assembly Line Location ESD Volt Rating Availa bility (mm/y y) CY7C460/ CY7C462/ CY7C464 -**JC/JI -**PC/PI -**DC/DMB -**LMB 15 ns to 40 ns 32R PLCC 28.6 PDIP 28.6 CDIP 32R LCC A 275 x 343 0.8µm CMOS 2 LTO + Oxynitride Sumitomo or Hysol CBI, Thailand CBI, Thailand >2000V HMB CY7C470/ CY7C472/ CY7C474 -**JC/JI -**PC/PI - **DC/DI/DMB -**LMB 15 ns to 40 ns 32R PLCC 28.6 PDIP 28.6 CDIP 32R LCC A 275 x 343 0.8µm CMOS 2 LTO + Oxynitride Sumitomo or Hysol CBI, Thailand CBI, Thailand >2000V HMB
PAGE 7 DEVICE RELIABILITY SUMMARY Marketing Part: CY7C464/CY7C470/CY7C474 Wafer Fab: Cypress Semiconductor Minnesota, MN Pkg Description: 28-pin,600-mil Cerdip 28-pin,600-mil Pdip 32L Rectangular LCC 32L Rectangular PLCC Assembly: High Temperature Dynamic Operating Life (HTOL, 5.75V, 150 C) - Early Failure Rate Device Assy Lot# Fab Lot # 36 Hours 96 Hours Cumulative CY7C464-JC 49401347 3353852B 0/410 0/410 0/410 High Temperature Dynamic Operating Life (HTOL, 5.75V, 125 C) - Early Failure Rate Device Assy Lot# Fab Lot # 72 Hours Cumulative CY7C474-JC 49401618 3353852 0/284 0/787 CY7C474-DC 219402112 3402992 0/503 High Temperature Dynamic Operating Life (HTOL, 5.75V, 150 C) - Latent Failure Rate Device Assy Lot# Fab Lot# 80 Hours 500 Hours 1000 Hours Cumulative CY7C474-DC 219402112 3402992 0/116 0/116 1 0/116 High Temperature Dynamic Operating Life (HTOL, 5.75V, 125 C) - Latent Failure Rate Device Assy Lot# Fab Lot# 80 Hours 500 Hours Cumulative CY7C474-JC 49401618 3353852 0/116 0/116 2 0/116 Group C, Subgroup 1, Life Test (HTOL, 5.75V, 125 C) Device Assy Lot# Fab Lot# 184 Hours Cumulative CY7C474-DMB 93628 3243199 0/80 0/80 DEVICE RELIABILITY SUMMARY 1 1 EOS 2 7 EOS
PAGE 8 Marketing Part: CY7C464/CY7C470/CY7C474 Wafer Fab: Cypress Semiconductor Minnesota, MN Pkg Description: 28-pin,600-mil Cerdip 28-pin,600-mil Pdip 32L Rectangular LCC 32L Rectangular PLCC Assembly: High Temperature Steady State Life Test (HTSSL, 5.75V, 150 C) Device Assy Lot# Fab Lot# 80 Hours 168 Hours Cumulative CY7C464-JC 49401347 3353852B 0/78 0/78 0/154 CY7C474-DC 219402112 3402992 0/76 0/76 3 Temperature Cycle (Condition C, -65 C to 150 C) Device Assy Lot# Fab Lot# 100 Cycles 1000 Cycles Cumulative CY7C474-DC 219402112 3402992 0/92 0 /46 0/92 Temperature Cycle (JEDEC22, -40 C to 125 C) Device Assy Lot# Fab Lot# 300 Cycles 1000 Cycles Cumulative CY7C464-PC 92190 3237982 0/45 0/45 0/93 CY7C474-JC 49400839 3352805 0/48 0/48 Autoclave (PCT, No bias, 121 C, 100%RH) Device Assy Lot# Fab Lot# 168 Hours Cumulative CY7C474-JC 49400839 3352805 0/49 0/49 High Accelerated Saturation Test (HAST, 5.5V, 140 C, 85%RH) Device Assy Lot# Fab Lot# 128 Hours Cumulative CY7C464-PC 92190 3237982 0/45 0/90 CY7C464-PC 49400573 3340159 0/45 3 2 EOS
PAGE 9 DEVICE RELIABILITY SUMMARY CY7C46x/CY7C47x Minnesota FAB CY7C460/462/464/470/472/474 Electrostatic Discharge Human Body Model Circuit per Mil Std 883, Method 3015 >+2,000V Unit 1 >-2,000V >+2,000V Unit 2 >-2,000V >+2,000V Unit 3 >-2,000V (Highest passing voltage, +10% Guard banded) Latchup Testing to Cypress Internal Latch-up Procedure Current Injection = 200mA Trigger Hot Socket = VCC 0-8V Temp = 150 C Other miscellaneous tests Current Density Input Capacitance Internal Water Vapor Pass Pass Pass