Optimizing spray coater process parameters

Similar documents
EE 527 MICROFABRICATION. Lecture 15 Tai-Chang Chen University of Washington EE-527 M4 MASK SET: NPN BJT. C (sub) A E = 40 µm x 40 µm

Photolithography I ( Part 2 )

Lab #2 Wafer Cleaning (RCA cleaning)

Investigation of ProTEX PSB Thin Film as Photosensitive Layer for MEMS capacitive pressure sensor diaphragm based Si/SiC Wafer

Dr. Priyabrat Dash Office: BM-406, Mob: Webpage: MB: 205

micro resist technology

ACS300 Gen2. The coat develop solution from pilot to high volume production

PHYS 534 (Fall 2008) Process Integration OUTLINE. Examples of PROCESS FLOW SEQUENCES. >Surface-Micromachined Beam

Lithography Tool Package

Czochralski Crystal Growth

Investigation and Development of Air Bridges

AZ BARLi II Solvent Compatible Bottom Antireflective Coating for i-line Process. Data Package

TSV Processing and Wafer Stacking. Kathy Cook and Maggie Zoberbier, 3D Business Development

Via etching in BCB for HBT technology

ALD Film Characterization Rachel Brown 5/13/14

PROCESS FLOW AN INSIGHT INTO CMOS FABRICATION PROCESS

Mater. Res. Soc. Symp. Proc. Vol Materials Research Society

Advanced Polymers And Resists For Nanoimprint Lithography

4. Thermal Oxidation. a) Equipment Atmospheric Furnace

Screen Printing of Highly Loaded Silver Inks on. Plastic Substrates Using Silicon Stencils

ELEC 3908, Physical Electronics, Lecture 4. Basic Integrated Circuit Processing

AZ BARLi II Solvent Compatible Bottom Antireflective Coating for i-line Process Data Package

Chapter 2 Manufacturing Process

CAPITAL MARKETS DAY - STERNENFELS

Microelectronics. Integrated circuits. Introduction to the IC technology M.Rencz 11 September, Expected decrease in line width

SUSS MICROTEC - SEMI MEMS TECH SEMINAR Mailand, 23. September Margarete Zoberbier, Product Manager Bonder

Schematic creation of MOS field effect transistor.

Test Patterns for Chemical Mechanical Polish Characterization

Introduction to Lithography

SUPPLEMENTAL INFORMATION: 1. Supplemental methods 2. Supplemental figure legends 3. Supplemental figures

In-situ Metrology for Deep Ultraviolet Lithography Process Control

Processing guidelines

Lecture 22: Integrated circuit fabrication

Filling and Planarizing Deep Trenches with Polymeric Material for Through-Silicon Via Technology

Chapter 4 Fabrication Process of Silicon Carrier and. Gold-Gold Thermocompression Bonding

BONDING OF MULTIPLE WAFERS FOR HIGH THROUGHPUT LED PRODUCTION. S. Sood and A. Wong

Lithography options for the 32nm half pitch node. imec

Technical Data Sheet Technisches Datenblatt

HYPRES. Hypres MCM Process Design Rules 04/12/2016

CMOS Manufacturing process. Design rule set

MCC. PMGI Resists NANO PMGI RESISTS OFFER RANGE OF PRODUCTS

Laboratory for Sensors, Department of Microsystems Engineering - IMTEK, University of Freiburg, Freiburg, Germany

EE40 Lec 22. IC Fabrication Technology. Prof. Nathan Cheung 11/19/2009

Introduction to Nanoscience and Nanotechnology

Lecture 1A: Manufacturing& Layout

Plasma for Underfill Process in Flip Chip Packaging

Figure 6. Rare-gas atom-beam diffraction patterns. These results were obtained by Wieland Schöllkopf and Peter Toennies at the Max-Planck Institute

Temperature Scales. Questions. Temperature Conversions 7/21/2010. EE580 Solar Cells Todd J. Kaiser. Thermally Activated Processes

Microelectronic Device Instructional Laboratory. Table of Contents

CLEANING TECHNOLOGY OPTIONS FOR EUV MASK LIFETIME EXTENSION

Hybrid BARC approaches for FEOL and BEOL integration

UV15: For Fabrication of Polymer Optical Waveguides

Fabrication Process. Crystal Growth Doping Deposition Patterning Lithography Oxidation Ion Implementation CONCORDIA VLSI DESIGN LAB

Processing guidelines. Negative Tone Photoresist Series ma-n 2400

Processing guidelines. Negative Tone Photoresists mr-ebl 6000

Metallization deposition and etching. Material mainly taken from Campbell, UCCS

Nanoscale Imaging, Material Removal and Deposition for Fabrication of Cutting-edge Semiconductor Devices

EE 330 Lecture 8. IC Fabrication Technology Part II. - Masking - Photolithography - Deposition - Etching - Diffusion

Supporting Information: Model Based Design of a Microfluidic. Mixer Driven by Induced Charge Electroosmosis

RIE lag in diffractive optical element etching

125nXT Series. EMD PeRFoRmaNce MaTeRIaLs. technical datasheet. Photopolymer Negative Tone Photoresists APPLICATION TYPICAL PROCESS THICKNESS GRADES

A Functional Micro-Solid Oxide Fuel Cell with. Nanometer Freestanding Electrolyte

Wafer Scale Packaging of MEMS by Using Plasma-Activated Wafer Bonding

Nanoimprinting in Polymers and Applications in Cell Studies. Albert F. YEE Chemical Engineering & Materials Science UC Irvine

Leveraging the Precision of Electroforming over Alternative Processes When Developing Nano-scale Structures

micro resist technology

Improving material-specific dispense processes for low-defect coatings

ULTRA-SMALL VIA-TECHNOLOGY OF THINFILM POLYMERS USING ADVANCED SCANNING LASER ABLATION

Lithography Independent Fabrication of Nano-MOS-Transistors with W = 25 nm and L = 25 nm

300 mm Lithography and Bonding Technologies for TSV Applications in Image Sensor and Memory Products

Cu electroplating in advanced packaging

Chemical Vapor Deposition

Nanotechnology makes brighter LED s. Michael P.C. Watts

Flip Chip - Integrated In A Standard SMT Process

3. Monodomain porous alumina obtained by nanoimprint lithography

Selective-Area Atomic Layer Deposition (SA-ALD) of Titanium Dioxide (TiO 2) using Poly(methyl methacrylate) (PMMA) Michael Tu 5/12/2016

4/10/2012. Introduction to Microfabrication. Fabrication

Tanaka Precious Metals and SUSS MicroTec to Jointly Develop Sub-micron Gold Particle Pattern Transfer and Bonding Technology

5.8 Diaphragm Uniaxial Optical Accelerometer

Fabrication Technology, Part I

Fabrication and Layout

Performance Improvement on Water-cooled Cold-Plate

EVG 100 Series. Resist Processing Systems

Alternative Methods of Yttria Deposition For Semiconductor Applications. Rajan Bamola Paul Robinson

Innovation Creativity customer-specific solutions. Product information PHOTORESISTS

NanoSystemsEngineering: NanoNose Final Status, March 2011

Micro- and Nano-Technology... for Optics

The Physical Structure (NMOS)

Understanding the Use of Atomizing Gas to Shape and Adjust Velocity of Ultrasonic Atomizer Spray

A discussion of crystal growth, lithography, etching, doping, and device structures is presented in

TI 35ES image reversal resist

Journal of Advanced Mechanical Design, Systems, and Manufacturing

Advanced developer-soluble gap-fill materials and applications

Photolithography Process Technology

NANOMETER AND HIGH ASPECT RATIO PATTERNING BY ELECTRON BEAM LITHOGRAPHY USING A SIMPLE DUV NEGATIVE TONE RESIST

Packaging Commercial CMOS Chips for Lab on a Chip Integration

EELE408 Photovoltaics Lecture 02: Silicon Processing

Conductive Adhesive Applications to Imprint Circuitry

Advanced STI CMP Solutions for New Device Technologies

Process Flow in Cross Sections

Transcription:

Optimizing spray coater process parameters Dr. Eleonora Storace, Florian Palitschka, Dr. Dietrich Tönnies SUSS MicroTec Lithography GmbH Germany Published in the SUSS report 01/2014 E-mail: info@suss.com www.suss.com

Optimizing spray coater process parameters Dr. Eleonora Storace, Florian Palitschka, Dr. Dietrich Tönnies SUSS MicroTec Lithography GmbH, Schleissheimer Str. 90, 85748 Garching, Germany Spray coating technology is known for being affected by many different process parameters that, combined together in an ensemble, would lead to a variety of different coating outcomes. In the present article, a systematic analysis on how to optimize spray coating processes, based on the chemical and physical origin of the behaviour of the resist over high topography structures will be discussed. Figure 1. a) Layout of test wafer with 36 dices per 200 mm wafer b) Design of individual test dice. Dark lines indicate the KOH etched areas. From the set of measurements shown, it will become clear that two stronger players would be the resist surface tension and the complex dynamics of the resist particles inside the spray cone. In the following, the effect of those parameters and the ways to control them within the SUSS Altaspray technology will be clarified. New SUSS Test Wafers for Evaluating Conformal Coating Processes Since such an important effect on the coating results is given by the topography of the substrates, an ad-hoc design for the test wafers was optimized, in order to allow a systematic study of the spray coating properties. Figure 1a depicts the layout of the 9-inch test wafer masks. It contains a total of 36 test dice, each having a size of 28 mm x 22.5 mm. The dark lines in the image indicate deep etched areas. Figure 1b shows more details of the die layout of the test dice. The test dice offers a variety of square cavities and trenches of different sizes for evaluating and optimizing conformal coating processes. The data discussed in the present article refers to KOH etched wafers (typical etch angle of 54.7 ), with an etching depth of 100 µm. In each die there are: 1. 5 large cavities (1 mm x 1 mm, 2 mm x 2 mm, 3 mm x 3 mm, 4 mm x 4 mm, 5 mm x 5 mm) 2. 8 trenches, each of them 5 mm long (width: 25 μm, 50 μm, 100 μm, 200 μm, 400 μm, 600 μm, 800 μm, 1000 μm), and 3. 8 sets of smaller square vias (25 μm, 50 μm, 100 μm, 200 μm, 400 μm, 600 μm, 800 μm, 1000 μm) 2 More information: www.suss.com/tec_library

Figure 2: a) The nozzle setup parameters, defining the shape and the intensity of the resist spray cone. b) The meander setup, defining the movement of the nozzle relative to the substrate. General process setup SUSS MicroTec s spray coating technology uses binary spray nozzles that atomize the photoresist by pressurized nitrogen. Figure 2a depicts the parameters that control the operation of the spray nozzle. The spray nozzle scans across the wafer area, as shown in Figure 2b. The spray arm scans the wafer by a succession of linear scans with constant pitch. During this scan the wafer chuck remains stationary. There are seven important process parameters that can be adjusted for best performance of the spray coater: The flow rate Q spray controls the total amount of resist that is sprayed onto the wafer within a certain period of time. The nitrogen pressure p N : The nitrogen atomizes the resist to form the spray cone. The nozzle distance D N gives additional means to tune the air flow inside topographic structures. The pitch D defines the distance of adjacent scanning lines. The speed v s of the spray arm, together with the flow rate Q spray, defines the amount of resist deposited locally during one scan. The number N of full wafer scans defines how often the full wafer scan is repeated and thus how many resist layers are deposited. By setting temperature T c of the wafer chuck the user has means to stabilize the resist film immediately after droplet deposition. For all the data shown in the following, a positivetone DNQ/Novolak based resist has been sprayed, the AZ4999, developed by AZ Electronic Materials specifically for the SUSS spray coating technology. Even though each specific process might have different coverage requirements, depending on the whole lithographic process, for the sake of simplicity here we will focus mostly on the resist conformality, defined as the ratio between the minimum and the maximum resist thickness across the substrate topography. The resist coverage across each pattern will be measured by optical microscopy of its cross-section, typically at five distinct locations: The top plateau (T1), the top corner (T2), the side wall (T3, eventually split in T3 min and T3 max ), the bottom corner (T4) and the bottom plateau (T5). Optimization of the coating parameters set Starting from the SUSS standard baseline coating recipe, several parameters can be singularly tuned, in order to extract which physical and chemical resist properties have the stronger effect on the coating results and how to control them. Two aspects would arise as particularly significant: The resist surface tension and the complex dynamics of the resist particles inside the spray cone. By increasing the temperature, the resist mixture becomes more liquid and the resist film is allowed to minimize its surface energy by pulling the resist away from the top corners. Simultaneously, the solvent component of the resist mixture evaporates and the coated layer hardens in the shape, defined by the minimized surface energy. An example of this behaviour is shown in Figure 3: (a) is a cross section of a sample coated at a chuck temperature of 60 C; one can notice that the resist easily covers the whole profile, giving a More information: www.suss.com/tec_library 3

Figure 3. Cross sectional views of spray coated samples (Tc: 60 C) before (a) and after (b) the soft bake step at 90 C for 90s conformality as high as 52 %. When a sample coated with the same recipe as (a) undergoes the soft bake step (90 seconds at 90 C), the resist starts flowing again and the result is shown in (b): The conformality is now down to 19 %. Spraying a drier resist mixture, i.e. a less liquid material, significantly minimizes the surface tension effect. The high tuneability of process parameters offered by the SUSS Altaspray technology allows for several different methods to achieve a dry resist coating; most effective have been proven to be: 1.using a chuck temperature, during the coating, as close as possible to the soft bake temperature, as shown in the left side of Figure 4, where conformality is plotted as a function of the chuck temperature for different cavity sizes, and 2.decreasing the volume of the dispensed resist, while increasing the number of full wafer scans (right side of Figure 4, where the points corresponding to the 16-scans recipe lie at a higher position as the ones from the 8-scans recipe, that, in their turn, are higher than the ones from the 4-scans recipe). The first method accelerates thermally the solvent evaporation, while the second one achieves its aim by slowing down the overall process and therefore leaving more time to the solvent to evaporate between consecutively coated layers. Depending on the specific process requirements (soft bake temperature, overall throughput, resist chemistry, ) either one, the other, or both methods could be selected. A second important player in the spray coating technology is the dynamic of the resist particle inside the spray cone: The turbulent motion of those particles would in fact define where the resist will accumulate over the substrate topography. Process parameters that can be Figure 4. Left: Conformality of spray coated AZ4999 resist film for various 100 μm deep etched square cavities as a function of chuck temperature. After spray deposition the wafers were softbaked for 90 s at 90 C. Right: Conformality of resist film versus cavity size (100 μm deep KOH etched) for three different resist flow rates: 0.7 ml/min (16 x scan), 1.6 ml/min (8 x scan) and 3.2 ml/min (4 x scan). 4 More information: www.suss.com/tec_library

utilized to tune the aerodynamic of the spray cone are: 1. The nitrogen flow, that atomizes the resist into a spray, gives higher kinetic force to the particles and affects the solvent content of the resist - acetone mixture, and 2. The nozzle height that regulates the area of the cone cross section and the strength of the spray. A typical case is reported in Figure 5, where the resist conformality is plotted as a function of the trenches width for different nitrogen flows: higher nitrogen pressure, by adding kinetic energy to the resist particles, increases the turbulence within the spray cone. The resist, therefore, is scattered around within the topography cavity and, instead of depositing on the bottom, accumulates on the upper part, namely the top corner and the upper portion of the side wall. Since the conformality is, in most cases, a ratio between the resist thickness at the top corner and the one at the bottom of the cavity, the overall conformality is then increased. The aerodynamics of the resist particles is also affected by topological effects, i.e. the shape, the size and the depth of the substrate structures will contribute to the achievable conformality. When the spray cone, for example, moves across a narrow and deep cavity, a large amount of the resist will not succeed in reaching the very bottom of the topography, because there it will find an air cushion that will make it scatter back upwards. On the contrary, shallower and wider features will accumulate a large amount of the resist on the bottom corner, since the spray cone can fill the whole area and push the resist particles towards the (lower regions of the) side walls. Conclusions In spray coating many different aspects will affect the resist coverage and a process recipe has to take all of them into account by tuning the set of parameters as in an ensemble. For this reason Figure 5. Conformality of resist films spray coated across 100 µm deep KOH trenches as a function of structure size and nitrogen pressure. For large structures best conformality is achieved with high nitrogen pressure settings. it is then crucial to understand the chemical and physical reasons underlying the general coating results, to be able to constructively combine the several recipe parameters into an effective set. From results as the ones shown in the present article, we can clearly define that particularly important are the resist surface tension and the aerodynamic of the particles in the spray cone and we can systematically outline how those could be controlled via the SUSS Altaspray technology. The AuthorS Dr Eleonora Storace is Lead Technologist for Imprint and Spray Coat at SUSS MicroTec Lithography in Garching, Germany. After her graduation in Solid State Physics at the Università degli Studi dell Insubria (Como, Italy), she completed her PhD at the Max Planck Institute for Solid State Research (Stuttgart, Germany) with an experimental work on magneto-transport through low-dimensional systems. In October 2010, she joined the Application Department of SMTL and she is based in Garching, Germany. Florian Palitschka graduated in Physics at the Ludwigs- Maximilians- Universität München in 2008. Afterwards he has worked as a Research Assistant at the Physics Department of the Universität der Bundeswehr in the field of advanced and novel semiconductor devices. Since 2013 he works as Application Engineer for SUSS MicroTec in Garching, focused on Spray Coating technology. Dr. Dietrich Tönnies is head of the Applications Department and Demo Lab at SUSS MicroTec s headquarter in Garching, Germany. He joined SUSS in 1997 as Product Manager for Mask Aligners and for many years, was responsible for developing the company s Advanced Packaging market. More information: www.suss.com/tec_library 5