The Effects of Sapphire Substrates Processes to the LED Efficiency Hua Yang*, Yu Chen, Libin Wang, Xiaoyan Yi, Jingmei Fan, Zhiqiang Liu, Fuhua Yang, Liangchen Wang, Guohong Wang, Yiping Zeng, Jinmin Li R&D Center for Semiconductor Lighting, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, P. R. China ABSTRACT We investigate the relation between the thickness of substrates and the extraction efficiency of LED. The increasing about 5% was observed in the simulations and experiments when the thickness changed from 100um to 200um. But the output power increasing is inconspicuous when the thickness is more than 200um. The structure on bottom face of substrates can enhance the extraction efficiency of GaN-based LED, too. The difference of output power between the flip-chip LED with smooth bottom surface and the LED with roughness bottom surface is about 50%, where only a common grinding process is used. But for those LEDs grown on patterned substrate the difference is only about 10%. Another kind of periodic pattern on the bottom of is fabricated by the dry etch method, and the output of the back-etched LEDs is improved about 50% than a common case. Keywords: GaN-based LED, Grinding, Ray tracing. 1. INTRODUCTION Recently, GaN-based blue and near-uv LEDs are extensively studied in the emerging solid-state lighting industry as a key technology. The light extraction efficiency (LEE) is very important factor in fabricating high brightness, high efficiency GaN-based light-emitting diode (LED). As well known, the large difference in the refractive index between the GaN(2.40) and air(1) caused a narrow escape cone for the light in GaN crystal. One most used method is roughness or texture on interfaces, such as the patterned substrate (PSS) recently [1],[2],[3],[4], and the increasing efficiency of PSS LED is considered as a consequence of the light scattering by the PSS. Huang, etc developed the side wall shaping and truncated inverted pyramid (TIP) shaping technology to increase the external quantum efficiency (EQE) of GaN LED [5],[6]. The flip-chip technology is also wildly studied because of its excellent performance in thermal conductivity and EQE these years [7]. But the influence of substrate processes in the back-end process is few considered. In this work, the relation between extraction efficiency of GaN-based LED and several parameters of the substrate is studied, including thickness, roughness and package method. Firstly, the thickness of substrate in the back-end processes is studied. After choose a better thickness, we develop the roughness method using just a grinding process and the bottom face periodic pattern by dry etching technique to improve the external quantum efficiency. The different surface structure on the bottom surface of substrates are analyzed basis on geometry ray tracing simulation, and compared with experiments. * huayang@semi.ac.cn; phone +86 010 8230 5147; fax +86 010 8230 5245; www.semi.ac.cn. Solid State Lighting and Solar Energy Technologies, edited by Jinmin Li, Yubo Fan, Ling Wu, Yong-Hang Zhang, Michael E. Coltrin, Yuwen Zhao, Nuofu Chen, Vladimir M. Andreev, Jai Singh, Proc. of SPIE Vol. 6841, 68410M, (2007) 0277-786X/07/$18 doi: 10.1117/12.759280 Proc. of SPIE Vol. 6841 68410M-1
LED Chip-on-wafer LED Chip-on-wafer Sapphire LED Chip Si Submount (1) Mask (2) (3) Sapphire LED Chip-on-wafer LED Chip-on-wafer LED Chip Si Submount (4) (5) (6) Fig1. the fabrication process of the GaN LED structure with textured bottom surface. (1)the chip-on-wafer; (2)grinding or polishing to different thickness; (3)scribe the grinded chips and flip-chip on the Si-submount; (4)PECVD SiO 2 as mask on the bottom of polished chips; (5)ICP on the bottom surface of substrate for the periodical pattern; (6)scribe the chip and flip-chip on Si-submount. 2. EXPERIMENTS The GaN samples used in this work were grown using metal organic chemical vapor deposition (MOCVD) onto the c-plane substrates. The common structure of GaN-based LED is used. It consists of a low-temperature GaN buffer layer about 200um, then a 1um undoped GaN layer, a 2um conductive n-type GaN layer, a InGaN/GaN multiple-quantum-well (MQW) active layer, and about 0.5um p-type GaN layer on the top. A schematic process of the device making is shown in Fig. 1. Firstly, we make the chip-on-wafer by the common method, which include common GaN LEDs fabricating steps. Photolithograph and dry etching was performed in an Oxford Plasmalab 100 inductively coupled plasma (ICP) reactor to expose the n-type GaN, then standard lift-off process for Ni-Au (5nm/5nm) as p-gan ohmic contact material, Ti/Al/Ti/Au as n-type ohmic contact by electron-beam evaporation. After annealing, the Ni-Ag is deposited and lift-off as the pads to finish the making process of chip-on-wafer. Secondly, we grind and polish those wafers to 100um, 200um and 400um separately. After study of the thickness influence, the 200um samples are selected to make bottom texture samples. Parts of the samples are to just grind the bottom and make an irregular roughness bottom surface. Other parts of the samples are to make SiO 2 mask on the bottom of wafer by the plasma enhanced chemical vapor deposition (PECVD). And then dry etching was performed in an Oxford Plasmalab 100 ICP reactor, in which the ICP source operated at power (1300W). At last the samples are scribed by laser scriber and flip-chip to the Si-submount to form the flip-chip LED. The luminance intensity is detected by the up-side photodetectors. 3. RESULTS AND DISCUSSIONS In the conventional LED processes, the will be grinding and polishing to less than 100um to minimize the thermal resistance between the device and environment. But for the flip-chip LED, a more thick is better to EQE than a thin one and no more thermal resistance set in. We simulate the relation between EQE and thickness of Proc. of SPIE Vol. 6841 68410M-2
substrate by the geometry ray-tracing method. As the Fig.2 shown, when the thickness of substrate change from 0um(such as GaN-based LEDs by laser assistant lift-off technology) ~ 400um, the LED EQE is improved from 8.5% to the 13.4%, the improved part is more than 50%. When the thickness of substrate changes from 100um to 400um, we can observe that the top luminance intensity is improved about 6%, which is very fit for the simulation result 5.5%. The reason is show in Fig.3, when the light transmit in the chip, before the light extract form chip or be absorbed, the number of reflection in crystal is important for the attenuation process because of the low loss of blue light in material. If the is thick, this number will be much smaller than in a thin one. When the thickness of substrate is small, this effect is noticeable more. Considering the substrate strength needed in next steps, a 200um will be a good enough parameter. 14 1.70 Light Extraction % 12 10 1.68 1.66 1.64 1.62 1.60 1.58 1.56 1.54 1.52 Luminance Intensity arb. units 8 1.50 0 50 100 150 200 250 300 350 400 450 500 550 Thickness of Sapphire substrate Fig.2. Light extraction efficiency.vs. thickness of substrate Fig.3. the light trace schematic diagrams of different thickness substrate Proc. of SPIE Vol. 6841 68410M-3
Sapphire Subumount Fig.4. the schematic diagrams of a bottom textured GaN LED structures Patterned substrate is wildly used to improve EQE in GaN LED, but for the flip-chip LED the bottom surface is few considered. The schematic diagram of flip-chip LED is shown in the Fig.4. The difference is the flat or grinded substrate bottom surface. The device with non-pss wafer and grinded bottom surface is simulated by the geometry ray-tracing method. As Fig.5 shown, the EQE of devices with or without bottom roughness is 10.5% and 18.4%. And after resin package process, that number is 19.8% and 23.5% separately. These simulations indicate that the roughness flip-chip LED can provide better EQE than a conventional flip-chip one. The LEDs with grinding bottom surface are fabricated and tested. Because all the GaN LED grown on will be grinding and polish, so this process do not change the electrical characters of LEDs. The results in Fig.6 show the luminance intensity versus injection current characteristics. The Fig. 6(a) shows the luminance intensity of grinded chips about 50% higher than those common chips. Those results suggest that the roughness bottom surface make the light in chips easily to escape, so it is help for the EQE. But we notice that this mechanism in PSS samples is not as good as in the conventional one. As the results shown in Fig. 6(b), the improvement is about 10% only. It seemly implies that there is some limit of the method of surface roughness. When the chips are packaged by resin, because of the small difference between the (1.7) and epoxy resin (1.5), as the simulations above, the improvement is decreased to less than 20%. Proc. of SPIE Vol. 6841 68410M-4
(a) (b) (c) T (d) Fig.5. light trace diagrams of the textured and conventional LED. (a) before package- common flip-chip LED η 10.5%; (b) before package bottom roughness flip-chip LED roughnessη 18.4%; (c) after package- common flip-chip LED η 19.8%; (d) after package - bottom roughness flip-chip LEDη 23.5%. 14 12 Common Substrate Flip-chip 22 20 Patterned Sapphire Substrate structure chip Luminance Intensity arb.unit 10 8 6 4 2 0 20 40 60 80 100 Current(mA) conventional flip-chip bottomroughness flip-chip Luminance intensity arb. units 18 16 14 12 10 8 6 4 20 40 60 80 100 current (ma) conventional flip-chip bottom roughness flip-chip Fig.6. Luminous intensity versus injection current characteristics of conventional flip-chip, bottom textured LED and bottom roughness LED. (a) common substrate chips, (b) patterned substrate chips. Furthermore, we fabricated a texture on the bottom of substrate by the ICP dry etch. The period is 12um, and the cell is 6um, as the Fig.7 shown. And before the package, the luminance intensity improve is about 50%, too. It maybe suggest that a random pattern may work as good as a periodical one. Proc. of SPIE Vol. 6841 68410M-5
4. CONCLUSIONS Fig.7. The microscope photo of bottom textured substrate. The relation of substrate thickness and extraction efficiency of LED was studied, and the thickness of 200um was recommended to improve about 5% of LEE. We fabricated the bottom texture and bottom roughness flip-chip GaN LEDs with the ICP etch and grinding method separately. The EQE improvement about 50% was achieved by the surface changing on the bottom of the chip. But for PSS structure LED, the improvement from bottom roughness method is reducing to about 10%. REFERENCES [1] Tsung-Xian Lee, Chao-Ying Lin, Shih-Hsin Ma and Ching-Cherng Sun, Analysis of position-dependent light extraction of GaN based LEDs,Optics Express, Vol.13, No.11, 4175, May 2005. [2] Shyi-Ming Pan, Ru-Chin Tu, Yu-Mei Fan, Ruey-Chyn Yeh, and Jung-Tsung Hsu, Improvement of InGaN-GaN Light-Emitting Diodes With Surface-Textured Indium-Tin-Oxide Transparent Ohmic Contacts, Vol.15, No.5, IEEE Photonics Technology Letters, May 2003. [3] T. Fujii, Y. Gao, R. Sharma, E. L. Hu, S. P. Denbaars, and S. Nakamura, Increase in the extraction efficiency of GaN-based light-emitting diodes via surface roughening, Vol.84, No.6, Applied Physics Letters, Feb 2004. [4] C.H. Liu, R.W. Chuang, S.J. Chang, Y.K. Su, L.W. Wu, C.C. Lin, Improved light output power of InGaN/GaN MQW LEDs by lower temperature p-gan rough surface, Materials Science & Engineer B 112, Oct, 2004. [5] Chih-Chiang Kao, Hao-Chung Kuo, etc, Light-output Enhancement in a Nitride-Based Light-Emitting Diode with 220 Undercut sidewalls, Vol.17, No.1, IEEE Photonics Technology Letters, Jan. 2005. [6] Th.Gessmann, E.F. Schubert, High efficiency AlGaInP light-emitting diodes for solid-state lighting applications, Vol.95, No.5, Journal of Applied Physics, Mar 2004. [7] F.K. Yam, Z. Hassan, Innovative advances in LED technology, Microelectronics Journal 36, 2005. Proc. of SPIE Vol. 6841 68410M-6