LITHOGRAPHY MATERIAL READINESS FOR HVM EUV TECHNOLOGY DANILO DE SIMONE
EUV HISTORY AT IMEC OVER 10 YEARS OF EUV EXPOSURE TOOLS AT IMEC 2006-2011 2011-2015 2014 - present ASML Alpha-Demo tool 40nm 27nm LS 0.25 NA ASML NXE:3100 27nm, 22nm,18nm LS 0.25 NA ASML NXE:3300 22nm, 16nm, 13nm LS 0.33 NA 2
EUV ACTIVITIES AT IMEC: LAB-TO-FAB Typical imec focus: LAB-to-FAB Concept and Explore Fundamental understanding Manufacturi ng Compatibilit y Patterning Developmen t Integration in a Module Towards Manufacturi ng Complexity, Maturity and Time TODAY s FOCUS 3
OUTLINE IMEC TECH. NODEs MATERIAL LANDSCAPE IN EUVL EUV RESIST PATTERNING Line-space (LS) Contact holes (CH) Pillars (PL) EUV SUBSTRATE FOR EUV RESIST 4
IMEC TECH. NODES
IMEC TECH.NODEs - PATTERNING ASSUMPTIONS DIMENSIONS INVOLVED 6
PATTERNING
in7 BEOL CURRENT LITHOGRAPHIC PERFORMANCE 8
in7 BEOL WHAT ARE THE CHALLENGES TODAY? DtS and LWR/LCDU reduction at same performance with no added defects 9
MATERIAL LANDSCAPE IN EUVL
EUV MATERIAL LANDSCAPE TODAY SOG CAR Tone reversal material Organic UL Metal Nano Particles Molecular resist TMAH dev. SOC RESISTS Ancillary materials Metal oxide Metal sensitizer CAR Solventbased dev. CVD layer Metal Hard Mask Sensitizer UL CAR = Chemically Amplified Resist MCR = Metal containing Resist PTD = Positive Tone Developer NTD = Negative Tone Developer SOC = Spin On Carbon SOG = Spin On Glass UL = underlayer Traditional materials Not traditional materials 11
EUV PATTERNING
LOW EXPOSURE DOSE EUV RESIST SCREENING BEST SAMPLE PER SUPPLIER 16nm dense lines space PITCH 32nm 13
BUT, MORE IMPORTANT ARE THE NANO FAILURES 16NM LS PITCH 32NM ken line CAR = Chemically Amplified Resist MOR = Metal Oxide Resist nano-bridge CAR MOR nano-bridge >To get rid of nano failures is more urgent than reduce LWR < 14
LOW EXPOSURE DOSE EUV RESIST SCREENING BEST SAMPLE PER SUPPLIER Dense regular contact holes - Pitch 36nm 15
BUT, (AGAIN) NANO FAILURES ARE MORE IMPORTANT DENSE REGULAR CONTACT HOLES PITCH 36NM CHs with tendency to merge CH with tendency to close >To get rid of nano failures is more urgent than reduce LCDU < 16
AVAILABLE EUV RESISTS VS APPLICATION OPPORTUNITIES tate-of-the-art today for dense features Pitch 38-36nm Dark field mask Positive Tone Process CONTACTS PTD-CAR PTD-CAR with sensitizer Novel PTD NCAR Negative Tone Process PILLARS Metal Oxide resist Bright field mask TONE REVERSAL PROCESS FROM PTD-CAR (as promising approach) Dark field is the preferred mask tonality because of defectivity, flare NTD-CAR & NCAR metal and non metal containing (molecular resist, Nano Particles, etc..) are not ready for P38/P36 yet 17
METAL OXIDE RESIST REGULAR DENSE PILLARS PITCH 38NM CD 20.5nm 30 mj/cm 2 Low exposure dose resist 18
TONE REVERSAL PROCESS (TRP) FROM CONTACTS PILLARS TRP can be an alternative scheme to single exposure to make pillars from contacts 19
SUBSTRATES FOR EUV RESISTS
SUBSTRATES CAN BE TUNABLE FOR EUV RESIST SENSITIVITY IMPROVEMENT, PENALTY IS ON THE LWR 21
SUBSTRATES CAN BE TUNABLE FOR EUV RESIST SENSITIVITY IMPROVEMENT, LCDU STILL OK A ~ 22
EUV SUBSTRATES VS PHOTOEMISSION PROPERTY OF THE SUBSTRATE B photoemission DoF seems to correlate with photoemission of substrates Dose doesn t correlate Substrate design can play a role in the resist design development 23
FROM THE LAB TO THE FAB INPRIA CASE
METAL *1E10 (AT/CM2) METAL CROSS CONTAMINATION TEST - MOx RESIST OPTIMIZED PATH FOR A NON X-CONTAMINATING PROCESS contamination SPEC metal < : 1E10 at/cm 2 0,05 0,04 0,03 0,024 0,022 0,019 0,02 0,01 0,008 0,002 0 Front-side Front-Side - SB Back-side Back-Side - SB detection limit PRE process after 200 wfs Contamination 1.5x order of magnitude less w.r.t. to the spec De Simone et al. ICPST33 2016 25
DRY ETCH ETCH RATE INVESTIGATION OF MOx Etch step type BARC opening UL opening SOG opening SOC opening e Etch chemistry Cl2/O2 CF4/O2/CH2F2 Cl2/O2/N2 SF6/N2/CH2F2/H The etch selectivity of MCR vs SOC is 1:40. Simplified litho-etch process scheme can be designed to integrate MOx resist on advanced process modules of new technology devices De Simone et al. ICPST32 2015 26
ETCHER CONTAMINATION MARATHON OF MOx RESIST Pre etch ICP-MS Etch Rates Particles SnOx wafer etch WDC 24wafers/cycle Post etch ICP-MS Etch Rates Particles TEM metal-oxide removal Spec < 1E10 at/cm 2 95 processed wafers Wafer front side and backside metal contamination trended below spec level < 1E10 at/cm2 Etch rates are stable thermal oxide and i-line Resist De Simone et al. SPIE 2017 27
DETECTABILITY OF PROGRAMMED DEFECTS AFTER LITHO 22nm dense LS patterning MOx resist successful defect counting rate % Programmed defect size (nm) successful defect capturing rate % Programmed defect size (nm) Critical Point Inspection (SEM inspection) SEM inspection and review Pattern litho sensitivity on MOx resist shows some limitations on the inspection tool to detect the target programmed defects and defectivity inspection after etch is necessary at this stage De Simone et al. SPIE 2017 28
Pitch 175nm Pitch 60nm Pitch 42nm MOx RESIST: ETCH DEVELOPMENT FOR in7 BLOCK LAYER SPIN-ON-CARBON OPENING after development Spin-On-Carbon opening CD: 25.5 nm Height : 12nm CD: 22.2 nm Height : 69.8nm High Resist-SOC etch selectivity CD: 25.6 nm Height : 11nm CD: 22.7 nm Height: 67.1nm Straight SOC pillar profile CD: 25.5 nm Height : 12nm De Simone et al. SPIE 2016 29 CD: 23.2 nm Height : 66.5nm Constant litho-etch CD bias through pitch for these structures
INTEGRATION FOR EUV in7 BLOCK LAYER Bright mask Dark mask EUV block mask Dark Tone Mask combined with Negative Tone Resist NT resist ArFi Core SAQP direct PT resist tone reversal Higher CoO Dark field is the preferred mask tonality because of defectivity, flare De Simone et al. SPIE 2016 30
32P METAL (FOUNDRY N5) OPTION: SAQP + MOx RESIST EUV BLOCK P32 spacers on TiN Block litho on SOC SOC etch TiN etch Low-k etch Industry first assessment of SAQP + EUV single expose block with metal oxide (inpria) resist Integration into BEOL electrical test vehicle Joost Bekaert, SPIE 2017 SAQP = self-aligned quadrupole patterning 31
EXTENSION TO in5 (FOUNDRY N3) Development of options for ~20-24 nm pitch metal blocks using metal oxide resist i.e.: Litho-develop-litho-etch process (LDLE) Waikin Li, EUVL Symposium 2017 32
SUMMARY
SUMMARY Pitch 32nm LS and Pitch 36nm CH (in7 tech node): Low exposure dose is achieved but is limited by stochastics. Nano failures (bridges, broken lines, merging, close CHs) are becoming the 1 st priority to fix on top of LWR/LCDU reduction A new metric is needed to quantify the nano failures at early R&D phase LWR will require post processing smoothing approaches (litho & etch) More Negative Tone Systems (NTI or NTD) with high resolution are needed for pillar patterning. Tone Reversal Process from PTD-CAR can be an alternative approach for single pillar exposure Substrate plays a role in the EUV resist performance A dedicated substrate design could improve the resist sensitivity without a significant impact on LCDU The Lab-to-Fab path for advance patterning is in place at imec and through that, novel materials (as metal-oxide resists) can be enabled to reach the HVM grade for EUV lithography 34
ACKNOWLEDGEMENTS
Thank you for your attention 36