Mixed Attachment Technology Studies in RF & Optoelectronic Packages Requiring High Accuracy Placement

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Mixed Attachment Technology Studies in RF & Optoelectronic Packages Requiring High Accuracy Placement Daniel D. Evans and Zeger Bok Palomar Technologies, Inc. 2728 Loker Avenue West Carlsbad, CA 92010 Phone: (800) 854-3467 E-mail: info@bonders.com Abstract RF & Optoelectronic packages continue to shrink in size with less space for die. Power densities are increasing as well. Packaging engineers are exploring a switch from conductive adhesive to eutectic solder attachments on high power components. Lower power components still allow adhesive attachment but have their own challenges due to tight spacing. This paper explores a range of case studies that demonstrate both eutectic and adhesive assembly and the results for closely spaced components. An overview of the technology and the placement accuracy and attachment method is presented for eutectic and adhesive based attachment for components ranging from 0.18mm [7.1mil] x 0.18mm [7.1mil] x 0.20mm [7.9mil] Si die to 1.7mm [67mil] x 1.4mm [55mil] x 0.16mm [6.3mil] GaAs die. Component spacing of 60µm or less create challenges in keeping epoxy or solder from squeezing between die. A review of tools, guidelines, and actual results will be shared in this paper. Keywords: VCSEL, Laser, Eutectic Attach, AuSn, AuSi, GaAs, Capacitor Attach, 0402, 0603, 0804. Background This paper provides a general overview of mixed attachment technology capabilities and challenges in today s packaging applications. The increasingly densely populated and higher power levels of RF & Optoelectronic packages are creating unique challenges for assembly process engineers. Both eutectic and adhesive attachment processes are faced with smaller component sizes, more closely spaced components, and a need for lower voiding content. As a result, solder or epoxy outflow may affect the position and attachment quality of adjacent components, or it can contaminate the top surface of these components. Die attach equipment must be capable of handling these demanding requirements without compromise to quality or cycle time. The general outline of this paper is as follows: Adhesive Attach Options Overview Eutectic Attach Options Overview Case 1: Mixed Technology RF Assembly AuSn Preform and Ag-Filled Epoxy Attach of GaAs and Ceramic Components on Ceramic Substrate Case 2: Mixed Technology RF Assembly AuSi, AuSn Preform and Ag-Filled Epoxy Attach of Si, GaAs and SMD Components on Ceramic Substrate Case 3: VCSEL Optoelectronic Assembly Ag- Filled Epoxy Attach of GaAs VCSEL on Kovar Substrate Summary and Conclusions Adhesive Attach Options Adhesive attach is common in a large variety of packaging applications and relatively well supported in the industry. Adhesive is typically applied by means of screen printing, pin transfer, or dispensing. Pin transfer is usually performed directly on the die attach equipment and offers excellent control over adhesive volume. This method is preferred for

components below 0.25mm [10mil] x 0.25mm [10mil], particularly if placement accuracy and proximity to other components is critical. Similar to dispense patterns, pin transfer patterns can be optimized to ensure proper distribution of the adhesive for each component. Pins are offered in various sizes and geometries and range from a single pin to multipoint pins to improve throughput. Eutectic Attach Options Eutectic attach options vary depending on the material interface and part geometries. A pictorial view of the process options is shown in Figure 1. The top figures illustrate two or four-sided pick tools holding the die. It is important to note that some of the eutectic processes do not require two or four-sided pick tools. For these processes, surface pick tools may be selected depending on the configuration of the die. well with favorable results. Die attached with preforms require two pick-and-place operations per attachment. Eutectic solder volume is a critical parameter in the attachment quality as shown in Figure 2. The main measures of quality for solder attach include bondline thickness, voiding content under the chip, and solder outflow past the chip. Improper solder volume can lead to excessive outflow and higher voiding percentages as shown in Figure 2. The left and right images illustrate before and after solder volume and process optimization. Figure 2 Eutectic Solder Volume Selection Figure 1 Eutectic Attach Options AuSi The far left column shows a Au backside metalized Si die and Au metalized substrate. The AuSi solder is generally formed using a Steady Heater Stage (SHS) and a scrub tool. Scrub occurs when moving the XY axis of the die attach equipment while holding the die on the substrate. Although less common, AuSi preforms can be used as well. AuSn on Die The second column shows a AuSn pre-metalized die and Au metalized substrate. This process can occur using a SHS or Pulsed Heat Stage (PHS). AuSn on Substrate The third column shows a AuSn pre-metalized substrate. This process generally requires a PHS so that reflow occurs only when the die is placed. A SHS can be used as well although this causes the AuSn to melt and change composition before the die is placed. AuSn Preforms The last column shows AuSn preforms to provide the solder. This generally requires a PHS although a SHS can be used as Case Studies Three specific examples are provided below to highlight the primary challenges and solutions in mixed attachment technology assembly. Case 1: Mixed Technology RF Assembly AuSn Preform and Ag-Filled Epoxy Attach of GaAs and Ceramic Components on Ceramic Substrate Case 1 is a study that combines AuSn preforms and Ag-filled epoxy while using the same components as shown in Figure 3. Figure 3 Case 1 Assembly Details The main challenges are a direct result of the small 50µm gap between die 1 and 2, and die 2 and 3.

The gap between die 1 and 4 is even smaller at 25µm. These small gaps can cause solder or epoxy to interfere with adjacent positions or flow up between die and push die out of alignment. Voiding content and excess material must be closely managed through proper selection of preform and adhesive volume, pick tool type selection, and the assembly sequence. The pick tool type selection and assembly sequence for the eutectic portion of the package is shown in Figure 4. The order in which pick tools are used by the equipment is sequentially numbered from 1 to 6. one would expect based on preform volume selection, pick tool type selection and the assembly sequence. It should be noted that die that are not pre-metalized with AuSn require preforms to be placed prior to attachment. Also, the substrate must be properly secured on the PHS with vacuum or mechanical clamps to avoid movement during scrubbing. Figure 6 Case 1 Ag-Filled Epoxy Results Figure 4 Case 1 Pick Tool Selection and Assembly Sequence for Eutectic Attach The bare substrate is loaded into a PHS using a round surface pick tool in sequence step 1. Two different sizes of four-sided pick tools are then used for components 1 and 3 as numbered in Figure 3. This allows scrubbing in the XY direction for both components since components 2 and 4 are not yet placed. Component 2 is then placed and scrubbed in the Y direction using a two-sided pick tool in sequence step 4. Component 4 is then placed in sequence step 5 using a round surface pick tool. Solder reflow for this small component does not require scrub. Finally, the completed eutectic package is removed from the PHS using the same round surface pick tool in sequence step 6. The epoxy pattern and placement results for the epoxy portion of the package are shown in Figure 6. The epoxy pattern is created by means of pin transfer which addresses the same voiding content and excess material concerns as before. The pick tools listed in the eutectic portion of the package are used here as well although scrubbing is not always necessary to achieve low voiding content in case of epoxy attachment. However, some components have specific top surface areas that are easily damaged by surface pick tools and may require two or four-sided pick tools. Also, it is important to verify that the pick tools are compatible with the style of waffle packs in which the die are presented. Waffle pack pockets must be chamfered to allow the two or four-sided pick tools to engage with the die. Gel-Pak offers an alternative solution to this problem. Figure 5 Case 1 Eutectic AuSn Attach Results The results of the eutectic attachment are shown in Figure 5. The images show the three dimensional nature of the components and the typical outflow that Figure 7 Case 1 AuSn and Ag-Filled Epoxy Results

The completed substrate containing both eutectic and adhesive attachments is shown in Figure 7, where component spacing and material outflow can easily be compared. Case 2: Mixed Technologly RF Assembly AuSi, AuSn Preform and Ag-Filled Epoxy Attach of Si, GaAs and SMD Components on Ceramic Substrate Case 2 is a study that combines AuSi, AuSn preforms, and Ag-filled epoxy attachment into a single package. Figure 8 provides an overview of the components in this package along with their respective sizes and attachment methods. The assembly sequence is determined by the assembly temperature of each process, i.e. highest to lowest temperature. The AuSi attachment is completed at 420 C followed by the AuSn attachment at 320 C. The epoxy attachment is then performed at ambient temperature and completed in a cure cycle at 120 to 150 C. Figure 9 Case 2 Eutectic AuSi Attach of Small Size Si Components The main challenges in the AuSn attachment are the proximity of the medium size GaAs die (4.2mm [165mil] x 4.2mm [165mil] x 0.09mm [3.5mil]) to one another and to the edge of the substrate. A four-sided pick tool is selected to allow scrubbing in the XY direction as shown in Figure 10. Mechanical clamps are modified to accommodate all components of the entire package and to avoid movement of the substrate on the PHS during scrubbing. Preform solder volume is determined by the desired bond line thickness and solder outflow. Excellent voiding content (less than 5%) and high placement accuracy have been achieved as shown in Figure 10. Figure 8 Case 2 Assembly Details The main challenges in the AuSi attachment are the small size of the Si die (0.18mm [7.1mil] x 0.18mm [7.1mil] x 0.20mm [7.9mil]) and the quantity per package (12 each). These types of die are typically presented in Gel-Pak to ensure proper engagement by a four-sided pick tool. The small base and even taller stance tend to tip the die over during pick as well as during place and scrub. Pick tool force during scrub must be minimized to avoid damage to the die and substrate metallization. Time at temperature on the SHS readily consumes the Si die and a balance in solder quality must be established between the first and last die in the assembly sequence. Uniform wetting and high placement accuracy have been achieved as shown in Figure 9. Figure 10 Case 2 Eutectic AuSn Attach of Medium Size GaAs Components The main challenges in the Ag-filled epoxy attachment of the end-terminated SMD capacitors (0804, 0603, 0402) are the proximity to one another, the mechanical strength of the attachment, and the potential of epoxy bridging underneath the components. Ablestik 84-1LMISR4 electrically conductive die attach adhesive is applied by means of pin transfer in suitable patterns. Consistent epoxy volume and high placement accuracy have been achieved as shown in Figure 11.

Figure 12 Case 3 Assembly Details Figure 11 Case 2 Ag-Filled Epoxy Attach of SMD Capacitors It must be noted that electrically insulating die attach adhesive can be added to the package in case mechanical strength or epoxy bridging are of concern. Case 3: VCSEL Optoelectronic Assembly Ag- Filled Epoxy Attach of GaAs VCSEL on Kovar Substrate Case 3 is a study that evaluates Ag-filled epoxy attach of GaAs VCSEL die with a spacing tolerance requirement of ±3µm between VCSEL die apertures, after curing. The VCSEL die are typically presented in Gel-Pak. Other components that do not require ultra-high placement accuracy are attached to the package after the VCSEL die placements have been completed (not shown). The main challenges include the small base and tall stance of the VCSEL die (0.25mm [9.8mil] x 0.25mm [9.8mil] x 0.30mm [11.8mil]), the selection of a suitable surface pick tool, and the symmetry & accuracy of the transferred epoxy volume. Any change in planarity of the VCSEL die during curing will result in an equivalent XY shift of the emitting aperture of the laser. Ablestik 84-1LMISR4 electrically conductive die attach adhesive is applied directly on the ultra-high precision die attach equipment by means of pin transfer. The VCSEL die are placed relative to locating features on the Kovar substrate. Details of the VCSEL die are shown in Figure 12. The assembly sequence includes a Post-Placement Accuracy Check (PPAC) measurement step directly on the die attach equipment to provide in-process feedback. Final verification of the placement accuracy is performed on an independent measurement device. A Nikon VMR-3200 3D Coordinate Measuring System is used to generate placement accuracy data before and after curing. Consistent epoxy volume and a spacing tolerance of ±3µm between VCSEL die apertures after curing have been achieved. The chart in Figure 13 shows an example of the errors between VCSEL die apertures. Virtually no change in errors was observed after curing. Figure 13 Case 3 VCSEL Die Placement Error Results After Curing Summary and Conclusions A general overview of mixed attachment technology capabilities and challenges has been provided. Adhesive and eutectic attach options have been explained in more detail. Three specific examples of mixed attachment technology have been discussed and primary challenges as well as solutions have been offered.

References 1. Bok, Z. et al, Micron Level Placement Accuracy Case Studies for Optoelectronic Components, The 41st International Symposium on Microelectronics, Providence, RI, November 2008. 2. Evans, D. et al, Micron Level Placement Accuracy Case Studies for Optoelectronic Components, The 59st Electronic Components and Technology Conference, San Diego, California, May 26-29, 2009. 3. Evans, D. et al, Micron Level Placement Accuracy for Wafer Scale Packaging of P-Side Down Lasers in Optoelectronic Products, 42nd International Symposium on Microelectronics (IMAPS 2009), November 1-5, 2009; San Jose McEnery Convention Center, San Jose, California. ISBN 0-930815-89-2.