Quality requirements for wafers, cells and PV modules

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Outdoor test-site PI Berlin Quality requirements for wafers, cells and PV modules Intersolar 2008 in Munich, 12th of June 2008 Stefan Krauter, Paul Grunow, Sven Lehmann PI Photovoltaik-Institut Berlin AG Photovoltaic Module Technology Testing Consulting Research

PI Berlin Customers Module producers Cell producers Thin film start-ups & manufacturers PV retailers PV utility installers Product developers/ Investors Independent module testing lab (accreditation acc. to ISO 17025 in Q4 2008) Consulting R&D service provider in PV module technology

PI Berlin: PV Module testing and R&D services 4 founders in October 2006, 20 employees in June 2008 Testing equipment Class A Flasher for STC precision measurements + weak light performance 3 climate chambers 2.8m x 3.0m x 2.6m (damp-heat, thermal cycling, humidity-freeze) Steady state simulator class B (STC for thin film modules, hot spot, light soaking) Outdoor test-site: NOCT, yield comparison, max. 40 modules UV chamber, area: 2.0m x 3.6m x 2.0m Wet leakage electrical isolation test (up to 6000 V) Mechanical tests (load, hail, rip-off) Accelerated TCO corrosion tests EVA gel content test Equipment for Research and Development Module lamination service: Edge delete, contacting, lamination IR-thermography, Electroluminescence Spectral response measurement Fig.1: Outdoor test site in Berlin

Characterisation in PV manufacturing Expected benefits: Yield improvement = average efficiency x mechanical yield Continuous throughput increase Raw material supplier feed-back Safety & reliability and energy yield check (module) Prominent example: Cell or module binning in power classes -> mismatch reduction in the module or in the system e.g. Field&Gabor 29th IEEE PVSC, New Orleans 2002, p. 418

Which characterisation tools make it from the laboratory into the production? Needs: Fast: 1s Reliable and easy to interpret Relevance of revealed parameters Invest vs. potential yield improvements Investment and its return for the prominent example: Cell sorting in 0.2% steps for cells between 14%-17% with a sorter at 3% of total invest* + 3% in average module power** *=0.3 Mio for a 30MW/a cell +module, ** = +2 Mio /a -> i.e. already 0.1% yield improvement pays off the same invest

Wafer production Silicon specification: Impurity contents Oxygen/carbon contents poly-silicon Resistivity, e.g. eddy current Crystallization Ingot cutting Wafer cutting Resistivity, e.g. eddy current μ-pcd life time IR spectroscopy Visual inspection, balance: dimensions, mechanical defects Cleaning Sorting Wafer No electronic quality check, no micro-crack inspection at the final product!

Cell production Feedback to wafer supplier: Electronic quality Mechanical quality Wafer specification: Resistivity Dopant Dimensions, geometry Mechanical defects Impurity/oxygen content Minimum carrier life time wafer Visual: mechanical defects, dimensions Wet etch Diffusion Wet deoxidation & edge isolation SiNi x ARC Sheet resistivity Visual: colour Visual I-V curve: I op @V op * P max, I sc, V oc, FF, R series, R shunt Screen printing Firing Sorting *V op = 0.5 V as sorting criteria cell

New fast characterization of single wafers Photoluminescence Imaging using a self-consistent calibration method as introduced by T. Trupke et al., Applied Physics Letter, Vol 87, 184 (2005) The et al. 22nd EPVSEC 2007, Milan, p. 354 -> Cell efficiency prediction on the wafer level in terms of the cell s potential Isc, To do for as-cut wafers: Measurement in HF or iodine solution, corona charging??

Photoluminescence Imaging of raw wafers -> without passivation (such as cut): out-sorting of (EFG) wafers with low minority carrier lifetime possible Trupke et al. 22nd EPVSEC 2007, Milan, p. 22 In-Line Messungen Bruchrisiko Elektrolumineszenz Photolumineszenz

Micro crack inspection of wafers Photoluminescence Imaging History of luminescence Imaging: 2005: T. Fuyuki, et al., Applied Physics Letters 86 (26) (2005) p. 262108 2007: >20 papers at the 22nd PVSEC in Milano related to electro- and photoluminescence on wafers, cells and modules Trupke et al. 22nd EPVSEC 2007, Milan, p. 22 Remark: older papers exists about photo emission microscopy (PEM) for failure analysis in microelectronics

Electroluminescence on finished cells (modules) Finger interruptions cracks local shunts (artificial, by wire connect back to front) Vacuum suction cups (zoom) Firing furnace belt (zoom)

Hot spot risk test on cells Infrared Imaging at -10V W. Herrmann et al. 17th EPVSEC, Munich, 2001 Test criteria: Maximum temperature after 1s* < T critical after D. Schüren from Sunware, private communication 2005 * = cycle time

Cell production + Feedback to wafer supplier: Electronic quality Mechanical quality Wafer specifications: Resistivity Dopant Dimensions, geometry Mechanical defects Impurity/oxygen content Minimum carrier life time PL camera wafer Visual check I-V curve: I op @V op P max, I sc, V oc, FF, R series, R shunt Visual check: mechanical defects, dimensions Wet etching Diffusion Wet de-oxidation & edge isolation SiN x ARC Screen printing Firing PL PL PL PL PL Sheet resistivity Visual check: colour EL camera Finger interruptions, Homogeneity, Micro-cracks, Local shunts IR camera Hot spots Sorting cell Micro-crack alarm-system along the entire production process & software tool for visualisation of micro-crack attraction points

Module production Feedback to cell supplier: Electronic quality Mechanical quality PL camera String tester P max, R series EL camera Stringer check Cell specification: I@V op P max Dimensions, geometry Mechanical defects Cell String soldering Matrix soldering Lamination EL camera Check before lamination I-V-curve: P max, I sc, V oc, FF, R series, R shunt J-box & Framing Sun Simulator test Module low light I-V-curve: P max at 100-400 W/m2 EL camera Final check Energy yield issue

Elektroluminescence on finished modules - Local shunts - Finger interruptions - areas with low diffusion length -Micro cracks

Thin Film module production Visual: Laser pattern alignment EL/PL camera Glass Deposition & Patterning V oc check Energy yield issue low light I-V-curve: P max at 100-400 W/m2 Edge deletion Contacting Lamination Insulation test I-V-curve: P max, I sc, V oc, FF, R series, R shunt J-box (& Framing) Sun Simulator test EL camera TF Module / Laminate Insulation test Safety issue

Electroluminescence on thin film modules local shunt bad edge delete local shunt a-si/μ-si CdTe CIGS: with several local defects/shunts -> fast detection/imaging of local material defects or processing faults

Yield of module prediction via operation model Standard Test Conditions (STC) PV module power output at 25 C 1,000 W/m2, AM 1.5 g, normal incidence Typical measurement duration: 4-10 ms Real world is non-stc! Indoor test outdoor performance Non-perpendicular incidence Low irradiance levels Spectral effects Temperature effects Degradation and regeneration Electrical energy yield (kwh/a kw p ) is predictable for crystalline technologies, but more difficult for thin film technologies (degradation, change of parameters)

Conclusions 0.1% yield improvement justifies an invest of 0.3 Mio in a 30 MW combined c-si cell&module line at today s pricings Electro- and photoluminescence are powerful tools for fast in-line imaging of electronic and mechanical properties on wafers, cells and modules, minimum yield improvement: 1% Hereby, the highest benefit is expected for micro crack detection, especially for highly automated production lines Since CCD cameras are used, they can be combined with/ or replace conventional visual inspection stations Safety risks (i.e., hot spot and isolation) and energy yield potential of the finished modules are important product properties in the field and should to be covered with similar investment efforts (recommended product strategy) Hall B6, 410 Vielen Dank krauter@pi-berlin.com grunow@pi-berlin.com