Device Fabrication: CVD and Dielectric Thin Film

Similar documents
Chapter 3 Silicon Device Fabrication Technology

ME 141B: The MEMS Class Introduction to MEMS and MEMS Design. Sumita Pennathur UCSB

Plasma-Enhanced Chemical Vapor Deposition

EECS130 Integrated Circuit Devices

Lecture Day 2 Deposition

Semiconductor Technology

Metallization deposition and etching. Material mainly taken from Campbell, UCCS

Thermal Evaporation. Theory

Semiconductor Manufacturing Technology. IC Fabrication Process Overview

CSI G SYSTEMS CSI GAS DELIVERY SUPPORT. Chemical Vapor Deposition (CVD)

Semiconductor Manufacturing Technology. Semiconductor Manufacturing Technology

Technology. Semiconductor Manufacturing. Hong Xiao INTRODUCTION TO SECOND EDITION SPIE PRESS

Thin Films: Sputtering Systems (Jaeger Ch 6 & Ruska Ch 7,) Can deposit any material on any substrate (in principal) Start with pumping down to high

Microstructures using RF sputtered PSG film as a sacrificial layer in surface micromachining

Materials Characterization

Micro-Electro-Mechanical Systems (MEMS) Fabrication. Special Process Modules for MEMS. Principle of Sensing and Actuation

Oxide Growth. 1. Introduction

Lecture 12. Physical Vapor Deposition: Evaporation and Sputtering Reading: Chapter 12. ECE Dr. Alan Doolittle

Procese de depunere in sistemul Plasma Enhanced Chemical Vapor Deposition (PECVD)

Lecture 8. Deposition of dielectrics and metal gate stacks (CVD, ALD)

Lecture 22: Integrated circuit fabrication

Surface Micromachining

Device Fabrication: Metallization

Growth and Doping of SiC-Thin Films on Low-Stress, Amorphous Si 3 N 4 /Si Substrates for Robust Microelectromechanical Systems Applications

EXCIMER LASER ANNEALING FOR LOW- TEMPERATURE POLYSILICON THIN FILM TRANSISTOR FABRICATION ON PLASTIC SUBSTRATES

Low temperature deposition of thin passivation layers by plasma ALD

Etching Etching Definitions Isotropic Etching: same in all direction Anisotropic Etching: direction sensitive Selectivity: etch rate difference

Thin Films: Sputtering Systems (Jaeger Ch 6 & Ruska Ch 7,) Sputtering: gas plasma transfers atoms from target to substrate Can deposit any material

"Plasma CVD passivation; Key to high efficiency silicon solar cells",

Fabrication Technology

Visualization and Control of Particulate Contamination Phenomena in a Plasma Enhanced CVD Reactor

Figure 2.3 (cont., p. 60) (e) Block diagram of Pentium 4 processor with 42 million transistors (2000). [Courtesy Intel Corporation.

Metallization. Typical current density ~105 A/cm2 Wires introduce parasitic resistance and capacitance

Interconnects. Outline. Interconnect scaling issues Aluminum technology Copper technology. Properties of Interconnect Materials

Metallization. Typical current density ~10 5 A/cm 2 Wires introduce parasitic resistance and capacitance

UTILIZATION OF ATMOSPHERIC PLASMA SURFACE PREPARATION TO IMPROVE COPPER PLATING PROCESSES.

Fabrication and Layout

Section 4: Thermal Oxidation. Jaeger Chapter 3. EE143 - Ali Javey

Process Flow in Cross Sections

Chapter 2 Additive Processes for Semiconductors and Dielectric Materials

A Deep Silicon RIE Primer Bosch Etching of Deep Structures in Silicon

Amorphous silicon waveguides for microphotonics

EE 330 Lecture 9. IC Fabrication Technology Part II. -Oxidation -Epitaxy -Polysilicon -Planarization -Resistance and Capacitance in Interconnects

SURFACE AND GAS PHASE REACTIONS FOR FLUOROCARBON PLASMA ETCHING OF SiO 2

Alternative Methods of Yttria Deposition For Semiconductor Applications. Rajan Bamola Paul Robinson

Ultra High Barrier Coatings by PECVD

Visit

Lab #2 Wafer Cleaning (RCA cleaning)

Lecture 19 Microfabrication 4/1/03 Prof. Andy Neureuther

Microwave Plasma Processing

Surface micromachining and Process flow part 1

University of Minnesota Nano Center Standard Operating Procedure

ALD systems and SENTECH Instruments GmbH

Semiconductor Technology

11:30 AM - C4.4 Chemical Vapor Deposition of Cobalt Nitride and Its Application as an Adhesion-enhancing Layer for Advanced Copper Interconnects

CMOS FABRICATION. n WELL PROCESS

Chapter 5 Epitaxial Growth of Si 1-y C y Alloys

LOT. Contents. Introduction to Thin Film Technology. Chair of Surface and Materials Technology

Atomic Layer Deposition(ALD)

Silicon Wafer Processing PAKAGING AND TEST

3.155J / 6.152J Micro/Nano Processing Technology TAKE-HOME QUIZ FALL TERM 2005

200mm Next Generation MEMS Technology update. Florent Ducrot

Amorphous Silicon Solar Cells

ELEC 3908, Physical Electronics, Lecture 4. Basic Integrated Circuit Processing

Chapter 2. Density 2.65 g/cm 3 Melting point Young s modulus Tensile strength Thermal conductivity Dielectric constant 3.

HOMEWORK 4 and 5. March 15, Homework is due on Monday March 30, 2009 in Class. Answer the following questions from the Course Textbook:

FABRICATION ENGINEERING MICRO- NANOSCALE ATTHE AND. Fourth Edition STEPHEN A. CAMPBELL. of Minnesota. University OXFORD UNIVERSITY PRESS

Section 4: Thermal Oxidation. Jaeger Chapter 3

Temperature Scales. Questions. Temperature Conversions 7/21/2010. EE580 Solar Cells Todd J. Kaiser. Thermally Activated Processes

4. Thermal Oxidation. a) Equipment Atmospheric Furnace

A New Liquid Precursor for Pure Ruthenium Depositions. J. Gatineau, C. Dussarrat

Method to obtain TEOS PECVD Silicon Oxide Thick Layers for Optoelectronics devices Application

ME 189 Microsystems Design and Manufacture. Chapter 9. Micromanufacturing

Capital / MRKT CAP \6.14B / \280.6B (as of May 12 th ) Chugeri, Yangji myun, Cheoin gu, Yongin, Kyunggi do, Korea

COMPATIBILITY OF THE ALTERNATIVE SEED LAYER (ASL) PROCESS WITH MONO- Si AND POLY-Si SUBSTRATES PATTERNED BY LASER OR WET ETCHING

Ion-assist applications of broad-beam ion sources

Process steps for Field Emitter devices built on Silicon wafers And 3D Photovoltaics on Silicon wafers

Vacuum deposition of TiN

VLSI Technology. By: Ajay Kumar Gautam

Lecture 5. SOI Micromachining. SOI MUMPs. SOI Micromachining. Silicon-on-Insulator Microstructures. Agenda:

Chemical Vapor Deposition

EE40 Lec 22. IC Fabrication Technology. Prof. Nathan Cheung 11/19/2009

Ion Implantation Most modern devices doped using ion implanters Ionize gas sources (single +, 2+ or 3+ ionization) Accelerate dopant ions to very

Research Article Synthesis and Characterization of LPCVD Polysilicon and Silicon Nitride Thin Films for MEMS Applications

VLSI INTRODUCTION P.VIDYA SAGAR ( ASSOCIATE PROFESSOR) Department of Electronics and Communication Engineering, VBIT

6.777J/2.732J Design and Fabrication of Microelectromechanical Devices Spring Term Solution to Problem Set 2 (16 pts)

Overview. Silicon Microfabrication Part 2. Introduction to BioMEMS & Medical Microdevices

Silicon Microfabrication Part 2

enabling tomorrow s technologies CVD Production Systems for Industrial Coatings powered by

Lecture 030 Integrated Circuit Technology - I (5/8/03) Page 030-1

5.8 Diaphragm Uniaxial Optical Accelerometer

3. Overview of Microfabrication Techniques

Drytech Quad Etch Recipes Dr. Lynn Fuller Mike Aquilino Microelectronic Engineering

In-Situ Characterization During MOVPE Growth of III-Nitrides using Reflectrometry

O2 Plasma Damage and Dielectric Recoveries to Patterned CDO Low-k Dielectrics

Silicon Manufacturing

Precursors with Metal-Nitrogen Bonds for ALD of Metals, Nitrides and Oxides

Dow Corning WL-5150 Photodefinable Spin-On Silicone

From Vacuum to Atmosphere and back an in-house Process Chain for Different Products

3D technologies for integration of MEMS

Transcription:

Device Fabrication: CVD and Dielectric Thin Film 1

Objectives Identify at least four CVD applications Describe CVD process sequence List the two deposition regimes and describe their relation to temperature List two dielectric thin films Name the two most commonly used silicon precursors for dielectric CVD 2

CVD Oxide vs. Grown Oxide SiO 2 SiO 2 Si Si Si Grown film Bare silicon Deposited film 3

CVD Chemical Vapor Deposition Chemical gases or vapors react on the surface of solid, produce solid byproduct on the surface in the form of thin film. Other byproducts are volatile and leave the surface. 4

CVD Applications FILMS PRECURSORS LPCVD SiH 4, O 2 SiO 2 (glass) PECVD SiH 4, N 2 O Dielectrics PECVD Si(OC 2 H 5 ) 4 (TEOS), O 2 LPCVD TEOS APCVD&SACVD TM Oxynitride SiH 4, N 2 O, N 2, NH 3 TEOS, O 3 (ozone) PECVD SiH 4, N 2, NH 3 Si 3 N 4 LPCVD SiH 4, N 2, NH 3 LPCVD C 8 H 22 N 2 Si (BTBAS) W (Tungsten) WF 6 (Tungsten hexafluoride), SiH 4, H 2 WSi 2 WF 6 (Tungsten hexafluoride), SiH 4, H 2 Conductors TiN Ti[N (CH 3 ) 2] 4 (TDMAT) Ti TiCl 4 Cu 5

CVD Gas or vapor phase precursors are introduced into the reactor Precursors across the boundary layer and reach the surface Precursors adsorb on the substrate surface Adsorbed precursors migrate on the substrate surface Chemical reaction on the substrate surface Solid byproducts form nuclei on the substrate surface Nuclei grow into islands Islands merge into the continuous thin film Other gaseous byproducts desorb from the substrate surface Gaseous byproducts diffuse across the boundary layer Gaseous byproducts flow out of the reactor. 6

Precursors Showerhead Forced convection region Byproducts Wafer Reactants Boundary layer Pedestal 7

Deposition Process (a) (b) Precursor arrives surface Migrate on the surface (c) (d) React on the surface Nucleation: Island formation 8

Deposition Process (e) Islands grow Islands grow, cross-section (f) (g) Islands merge Continuous thin film (h) 9

CVD Processes (1)Atmospheric Pressure CVD (APCVD) (2)Low Pressure CVD (LPCVD) (3)Plasma-Enhanced CVD (PECVD) 10

(1) Atmospheric Pressure CVD CVD process taking place at atmospheric pressure APCVD process has been used to deposit silicon oxide and silicon nitride Conveyor belt system with in-situ belt clean 11

APCVD Reactor N 2 Process Gas N 2 Wafers Wafers Heater Belt Clean Station Exhaust Conveyor Belt 12

(2) LPCVD Longer MFP Good step coverage & uniformity Vertical loading of wafer Fewer particles and increased productivity Less dependence on gas flow Vertical and horizontal furnace 13

Horizontal Conduction-Convectionheated LPCVD Adaptation of horizontal tube furnace Low pressure: from 0.25 to 2 Torr Used mainly for polysilicon, silicon dioxide and silicon nitride films Can process 200 wafers per batch 14

LPCVD System Pressure Sensor Wafers Loading Door Heating Coils To Pump Process Gas Inlet Temperature Wafer Boat Center Zone Flat Zone Quartz Tube Distance 15

(3) PECVD Developed when silicon nitride replaced silicon dioxide for passivation layer. High deposition rate at relatively low temperature. RF induces plasma field in deposition gas Stress control by RF Chamber plasma clean. 16

Plasma Enhanced CVD System Process gases Process chamber Wafer Plasma RF power By-products to the pump Heated plate 17

Step Coverage A measurement of the deposited film reproducing the slope of a step on the substrate surface One of the most important specifications Sidewall step coverage Bottom step coverage Conformality Overhang 18

Step Coverage and Conformity CVD thin film c a Structure h d b Substrate w Sidewall step coverage = b/a Bottom step coverage = d/a Conformity = b/c Overhang = (c - b)/b Aspect ratio = h/w 19

Factors Affect Step Coverage (1) Arriving angle of precursor (2) Surface mobility of adsorbed precursor 20

Arriving Angles 180 B A C 270 90 21

Arriving Angle Corner A: 270, corner C: 90 More precursors at corner A More deposition Form the overhang Overhangcan cause voids or keyholes 22

Void Formation Process Overhang Metal Dielectric Metal Dielectric Metal Void Dielectric 23

Control of Arriving Angle Changing pressure Tapering opening 24

Step Coverage, Pressure and Surface Mobility APCVD No mobility LPCVD No mobility High mobility 25

Arriving angles for tapered and straight contact holes Larger arriving angle Smaller arriving angle Nitride 26

Deposition/Etchback/Deposition Dep. Al Cu Etch Al Cu Dep. Al Cu 27

Conformal film deposition and gap fill (I) 28

Conformal film deposition and gap fill (II) 29

Conformal film deposition and gap fill (III) 30

Gap Fill of high-density plasma CVD Metal Metal Metal Metal Metal Metal Metal Metal Metal 31

Surface Adsorption Determine precursors surface mobility Affect step coverage and gap fill Physical adsorption (physisorption) Chemical adsorption (chemisorption) 32

Chemisorption Actual chemical bonds between surface atom and the adsorbed precursor molecule Bonding energy usually exceeding 2 ev Lowsurface mobility Ion bombardment with10 to 20 ev energy in PECVD processes can cause some surface migration of chemisorbed precursors 33

Physisorption Weak bond between surface and precursor Bonding energy usually less than 0.5 ev Hydrogen bonding Van der Waals forces Ion bombardment and thermal energy at 400 C can cause migration of physisorbed precursors Highsurface mobility 34

Bonding energy Relationship of bonding energy to chemical and physical adsorption Distance from surface Physisorbed precursor Chemisorbed precursor Substrate Surface 35

CVD Precursor: Silane Dielectric CVD PECVD passivation dielectric depositions Dielectric anti reflective coating (DARC) High density plasma CVD oxide processes LPCVD poly-si and silicon nitride Metal CVD W CVD process for nucleation step Silicon source for WSi x deposition 36

Dielectric CVD Precursor: Silane Pyrophoric (ignite itself), explosive, and toxic Open silane line without thoroughly purging can cause fire or minor explosion and dust line 37

Structure of Silane Molecule H H H Si H Si H H H H 38

CVD Precursor Adsorption: Silane Silane molecule is perfectly symmetrical Neither chemisorb nor physisorb Fragments of silane, SiH 3, SiH 2, or SiH, can easily form chemical bonds with surface 39

Sticking Coefficient The probability that precursor atom forms chemical bond with surface atom in one collision Can be calculated by comparing the calculated deposition rate with 100% sticking coefficient and the measured actual deposition rate 40

Sticking Coefficient The lower the sticking coefficient, the higher the surface mobility dissociate Precursors Sticking Coefficient SiH4 SiH 3 3x10-4 to 3x10-5 0.04 to 0.08 SiH 2 0.15 SiH 0.94 Silane molecule is perfectly symmetrical Neither chemisorb nor physisorb Low surface mobility having overhangs at the step corners and having poor step coverage TEOS 10-3 WF 6 10-4 TEOS: tetra-ethyl-oxy-silane, Si(OC 2 H 5 ) 4 41

CVD Kinetics Chemical Reaction Rate equation is: C.R. = A exp (-E a /kt) A: a constant E a : activation energy K: Boltzmann constant T: substrate temperature The lower the activation energy E a, the easier the chemical reaction. Precursor E a Byproduct 42

Deposition Regimes Mass-transportlimited regime Surface-reactionlimited regime ln D.R. Slope = E a /k Gas-phase-nucleation regime 1/T At lower temperature 43

Surface-Reaction-Limited Regime Chemical reaction rate can t match precursor diffusion and adsorption rates; precursors pile up on the substrate surface and wait their turn to react. D.R. = C.R. [B] [C] [] Deposition rate is very sensitive to temperature 44

Mass-Transport-Limited Regime When the surface chemical reaction rate is high enough, the chemical precursors react immediately when they adsorb on the substrate surface. Deposition rate = D dn/dx [B] [C] [] D: diffusion rate of the precursors in the boundary layer dn/dx: the gradient of the precursor concentration in the boundary layer [B] [C], etc., are precursor concentrations on the substrate surface Deposition rate is insensitive to temperature Mainly controlled by gas flow rates 45

Relation of deposition rate and temperature Deposition rate Deposition rate sensitive to temperature Deposition rate insensitive to temperature Temperature 46

CVD Reactor Deposition Regime Most single wafer process reactors are designed in mass-transport-limited regime It is easier to control the gas flow rate Plasma or unstable chemicals such as ozone are used to achieve mass-transport-limitedregime at relatively low temperature 47

Dielectric CVD, Oxide and Nitride Oxide (SiO 2 ) Nitride (Si 3 N 4 ) Similar dielectric strength, > 1x10 7 V/cm Similar dielectric strength, > 1x107 V/cm Lower dielectric constant, = 3.9 Not a good barrier for moisture and mobile ion (Na + ) Transparent to UV Higher dielectric constant, = 7.0 Good barrier for moisture and mobile ion (Na + ) Conventional nitride opaque to UV Can be doped with P and B 48

Passivation Nitride and oxide Nitride is very good barrier layer, oxide help nitride stick with metal Silane process NH 3, N 2 and nitrogen precursors, N 2 O as oxygen precursor In-situ CVD process 49

Dielectric Thin Film Characteristics Refractive index Thickness Uniformity Stress Particles 50

Refractive Index Refractive index, n = Speed of light in vacuum Speed of light in the film 51

Refractive index and refractive angle Incident light Vacuum n 1 n 1 sin 1 = n 2 sin 2 Film n 2 Refractive light For SiO 2, n=1.46 For Si 3 N 4, n=2.01 52

Film Information from R.I. Refractive index Oxygen rich Nitrogen rich 4.0 Polysilicon Oxygen rich Nitrogen rich 2.01 Si 3 N 4 Silicon rich Oxynitride Oxygen rich 1.46 SiO 2 Nitrogen rich Silicon rich 53

For the silicon- or nitrogen-rich oxide, the refractive index will be higher than the stoichiometric value of. 1.46, but it will be lower than that value when it is oxygen rich. For nitride, silicon-rich film will have a higher R.I. than 2.01 and nitrogen- or oxygen-rich films will have a lower value. 54

Ellipsometry system Linearly Polarized Incident Light Elliptically Polarized Reflected Light s p n 1, k 1, t 1 n 2, k 2 When a beam of light is reflected from the film surface, the polarization status changes. By comparing this, one can get information about the refractive index and thickness of the dielectric thin film. 55

The change in polarization of the and s components of a light beam upon reflected is determined. The fundamental equation of ellipsometry: =R p /R s =tan e I : a complex amplitude reflection ratio R p and R s : Fresnel reflection coefficient 56

Illustration of Prism Coupler Thin film Laser light Photo detector Substrate Coupling head 57

Reflected Light Intensity vs. Incidence Angle Reflected Intensity Modes 20 10 0-10 -20 58

Metricon Model 2010 Prism Coupler 59

Comparison of the Two Methods Ellipsometry Prism coupler Need know rough film thickness before hand Can measure thickness if R.I. is know Need certain thickness of the film, > 3000 Å Can measure thickness if film thick enough to support enough modes 60

Thickness Measurement One of the most important measurements for dielectric thin film processes. Determines Film deposition rate Wet etch rate Shrinkage 61

Reflection light rays and phase difference Incident light 1 2 Human eye or photodetector t Dielectric film, n( ) Substrate =2tn( )/cos t: thin-film thickness n( ): thin-film refractive index : the angle of incidence 62

Dielectric Thin Film Thickness Measurement Different thickness has different color Tilting wafer also changes the color 63

Question If you see some beautiful color rings on a wafer with a CVD dielectric layer, what is your conclusion? 64

Answer Color change indicates the dielectric thin film thickness change, thus we know the film with the color rings must have problem with thickness uniformity, which is most likely caused by a non-uniform thin film deposition process. 65

Question Why does the thin film color change when one look at the wafer from different angle? 66

Answer When one looking at wafer from a different angle, phase shift will change, thus wavelength for constructive interference will change, which causes color change It is important to hold the wafer straight when using the color chart to measure film thickness Tilt wafer makes the film thickness thicker than it actually is 67

Deposition Rate (D. R.) Deposition Rate = Thickness of deposited film Deposition time 68

Wet Etch Rate Wet Etch Rate = Thickness change after etch Etch time Wet etch rate ratio = Thickness change of the CVD film Thickness change of the thermal oxide film 69

70 Uniformity Multi-point measurement Definition Average: Standard deviation: Standard deviation non-uniformity: /x N x x x x x N 3 2 1 1 ) ( ) ( ) ( ) ( 2 2 3 2 2 2 1 N x x x x x x x x N

Stress Mismatch between different materials Two kinds of stresses, intrinsic and extrinsic Intrinsic stress develops during the film nucleation and growth process. The extrinsic stress results from differences in the coefficients of thermal expansion Tensile stress: cracking film if too high Compressive stress: hillock if too strong 71

Definitions of compressive and tensile stress Bare Wafer After Thin Film Deposition Substrate Substrate Compressive Stress Negative curvature Substrate Tensile Stress Positive curvature 72

Tensile stress Compressive stress 73

Illustration of Thermal Stress SiO 2 Si At 400 C L SiO 2 Si At Room Temperature L = T L L L: change of the dimension T: change of the temperature : coefficient of thermal expansion 74

Coefficients of Thermal Expansion (SiO 2 ) = 0.5 10 6 C 1 (Si) = 2.5 10 6 C 1 (Si 3 N 4 ) = 2.8 10 6 C 1 (W) = 4.5 10 6 C 1 (Al) = 23.2 10 6 C 1 75

Stress Measurement 2 E h 1 1 ( 1 6t R2 R1 ) : film stress (Pa) E: Young s modulus of the substrate (Pa) v: Poisson s ratio of the substrate h: substrate thickness ( m) t: film thickness ( m) R 1 : wafer curvature radius before deposition ( m) R 2 : wafer radius curvature after deposition ( m) Wafer curvature change before and after thin film deposition Mpa=10 6 Pa 1 MPa=10 7 dynes/cm 2 Laser beam scans wafer surface, reflection light indicates the wafer curvature 76

Schematic of the laser scanning stress measurement tool Laser Mirror Detector 77

Dielectric CVD Processes Thermal Silane CVD Process PECVD Silane Processes High Density Plasma CVD 78

Thermal Silane CVD Process Silane has been commonly used for silicon dioxide deposition with both APCVD and LPCVD process heat SiH 4 + 2 O 2 SiO 2 + 2 H 2 O APCVD normally uses diluted silane (3% in nitrogen) and LPCVD uses pure silane Not commonly used in the advanced fab 79

PECVD Silane Processes Silane and nitrous oxide N 2 O (laughing gas) Dissociation in plasma form SiH 2 and O Radicals react rapidly to form silicon oxide plasma SiH 4 + N 2 O SiO x H y + H 2 O + N 2 + NH 3 + heat Overflow N 2 O, using SiH 4 flow to control deposition rate 80

Question Can we overflow silane and use nitrous oxide flow rate to controlled deposition rate? 81

Answer Theoretically we can, but practically no one should even try this It is very dangerous and not cost effective Overflowing silane will create a big safety hazard: fire and explosion Silane is more expensive than nitrous oxide 82

Passivation: Silicon Nitride Barrier layer for moisture and mobile ions The PECVD nitride Low deposition temperature (<450ºC) High deposition rate Silane, ammonia, and nitrogen plasma SiH 4 + N 2 + NH 3 SiN x H y + H 2 + N 2 + NH 3 + heat Requires good step coverage, high dep. rate, good uniformity, and stress control 83

Passivation Dielectric Deposition 1. Stabilization 1 (stabilize pressure) 2. Oxide deposition (stress buffer for nitride) 3. Pump 4. Stabilization 2 (stabilize pressure) 5. Nitride deposition (passivation layer) 6. Plasma purging (eliminate SiH 4 ) 7. Pump 84

Dielectric Anti-Reflective Coating High resolution for photolithography ARC layer is required to reduce the reflection Metallic ARC: TiN, 30% to 40% reflection No longer good enough for < 0.25 m Dielectric ARC layer is used Spin-on before photoresist coating CVD 85

Dielectric Anti-Reflective Coating UV light ( ) = 2nt = /2 1 2 Photoresist t Dielectric ARC, n, k Aluminum alloy 86

Dielectric ARC PECVD silane process N 2 O as oxygen and nitrogen source plasma SiH 4 + N 2 O + He SiO x N y + H 2 O + N 2 + NH 3 + He + heat 87

Schematic of Sputtering Etch Chamber Process gases Process chamber Plasma Magnet coils By-products to the pump Chuck RF power 88

Ozonator Lighting, corona discharge plasma O 2 O + O O + O 2 + M O 3 + M (M = O 2, N 2, Ar, He, etc.) 89

Ozone generation in an ozone cell RF O 2 + N 2 O 2 + O 3 + N 2 + N 2 O + 90

Schematic of ozone concentration monitoring system Monitored by UV absorption (Beer-Lambert law): I = I 0 exp(-xcl) Mechanical chopper L Ozone cell UV sensor UV Lamp O 3 /O 2 O 3 /O 2 Analyzer 91

High-Density Plasma CVD (HDP-CVD) Dep/etch/dep gap fill needs two chambers Narrower gaps may need more dep/etch cycles to fill A tool can deposit and sputtering etch simultaneously would be greatly helpful The solution: HDP-CVD 92

Inductively coupled plasma (ICP) Electron cyclotron resonance (ECR) 93

ICP Chamber Source RF Inductive coils Ceramic cover Chamber body Plasma Wafer E-chuck Helium Bias RF 94

ECR Chamber Microwave Magnet coils Magnetic field line Plasma Wafer E-chuck Helium Bias RF 95

HDP-CVD, IMD Application Metal Metal Metal 96

HDP-CVD, Deposition Metal Metal Metal 97

HDP-CVD, Deposition Metal Metal Metal 98

HDP-CVD, Deposition Metal Metal Metal 99