THERMAL OXIDATION - Chapter 6 Basic Concepts SiO 2 and the Si/SiO 2 interface are the principal reasons for silicon s dominance in the IC industry. Oxide Thickness µm 0. µm 0 nm nm Thermally Grown Oxides Field Oxides Masking Oxides Pad Oxides Gate Oxides Tunneling Oxides Chemical Oxides from Cleaning Native Oxides Deposited Oxides Backend Insulators Between Metal Layers Masking Oxides SiO 2 : Easily selectively etched using lithography. Masks most common impurities (B, P, As, Sb). Excellent insulator ( ρ > 0 6 Ωcm, E g > 9 ev ). High breakdown field ( 0 7 Vcm - ) Excellent junction passivation. Stable bulk electrical properties. Stable and reproducible interface with Si. No other known semiconductor/insulator combination has properties that approach the Si/SiO 2 interface.
Year of Production 998 2000 2002 2004 2007 200 203 206 208 Technology Node (half pitch) 250 nm 80 nm 30 nm 90 nm 65 nm 45 nm 32 nm 22 nm 8 nm MPU Printed Gate Length 00 nm 70 nm 53 nm 35 nm 25 nm 8 nm 3 nm 0 nm DRAM Bits/Chip (Sampling) 256M 52M G 4G 6G 32G 64G 28G 28G MPU Transistors/Chip (x0 6 ) 550 00 2200 4400 8800 4,000 Gate Oxide T ox Equivalent (nm).2 0.9 0.7 0.6 0.5 0.5 MPU Gate Oxide T ox Equivalent (nm).5.2 0.9 0.8 0.7 0.7 Low Operating Power Gate Dielectric Leakage 70 230 330 000 670 670 (na/µm @ 00 C) MPU Thickness Control (% 3σ ) < ±4 < ±4 < ±4 < ±4 < ±4 < ±4 Min Supply Voltage (volts).8-2.5.5-.8.2-.5 0.9-.2 0.8-. 0.7--0 06-0.9 0.5-0.8 0.5-0.7.3.2 Deposited Polysilicon.3 Si substrate.3 Si substrate Oxidation involves a volume expansion ( 2.2X). Especially in 2D and 3D structures, stress effects play a dominant role. Volume Expansion SiO 2 Original Si Surface Location of Si 3 N 4 Mask Si Substrate 2
SiO 2 is amorphous even though it grows on a crystalline substrate. (Intel Web site) Q m SiO Na + 2 + + + - Q ot Transition Region Silicon x - K+ - + + + + + x x x x x Q it Q f Four charges are associated with insulators and insulator/semiconductor interfaces. Q f - fixed oxide charge Q it - interface trapped charge Q m - mobile oxide charge Q ot - oxide trapped charge 3
Quartz Tube Wafers Quartz Carrier Oxidation systems are conceptually very simple. In practice today, vertical furnaces, RTO systems and fast ramp furnaces all find use. Resistance Heating O2 H2 Gate Oxides LOCOS or STI DRAM Dielectrics Thermal oxidation can potentially be used in many places in chip fabrication. In practice, deposited SiO2 layers are increasingly being used (lower Dt). 4
a) + V G C C-V Measurements e - CO CO Powerful technique for characterizing semiconductor/ insulator structures. N Silicon Doping = N D - + V G a) Accumulation b) - V G C + + + + + + + x D CO CD CO b) Depletion e - - + V G Q G c) -- V G C CO c) Inversion Q I Q D + + + + + + + + + + + + + + Holes e - x DMax CO C DMin - V TH + V G 5 DC bias + small AC high frequency signal applied.
C Ideal LF Cox CMin Ideal HF Deep Depletion VTH 6 DC Gate Voltage Electric field lines pass through the perfect insulator and Si/SiO 2 interface, into the substrate where they control charge carriers. Accumulation, depletion and inversion result. HF curve - inversion layer carriers cannot be generated fast enough to follow the AC signal so C inv is C ox + C D. LF curve - inversion layer carriers can be created and recombine at AC signal frequency so C inv is just C ox. Deep depletion - DC voltage is applied fast enough that inversion layer carriers cannot follow it, so C D must expand to balance the charge on the gate. C-V measurements can be used to extract quantitative values for: t ox - oxide thickness N A - the substrate doping profile Q f, Q it, Q m, Q ot - oxide, interface charges
CG CS SiO 2 Growth Kinetics Models A. Deal Grove Model 0.0 - µm 500 µm x O The basic model for oxidation was developed in 965 by Deal and Grove. CO Si + O 2 SiO 2 (2) Gas Oxide CIC I Silicon Si + 2H 2 O SiO 2 + 2H 2 (3) F F 2 F 3 F = h G ( C G C S ) F 2 = D N x = D C O C I F 3 = k S C I x O (4) (5) (6) 7
Under steady state conditions, F = F 2 = F 3 so C I = C * + k S h + k S x O D C * + k S x O D (7) C * + k Sx O D C O = + k S h + k C * (8) Sx O D Note that the simplifications are made by neglecting F which is a very good approximation. Combining (6) and (7), we have dx dt = F N = N k S C * + k S h + k S x O D (9) Integrating this equation (see text), results in the linear parabolic model. 8
x O 2 x i 2 B + x O x i B/ A = t (0) where and B = 2DC* (parabolic rate constant) N B A = C * N + C* k S (linear rate constant) N k S h () (2) (0) can also be written with oxide thickness as a function of time. x O = A 2 + t + τ A 2 / 4B (3) where τ = x 2 i + Ax i B (4) 9
The rate constants B and B/A have physical meaning (oxidant diffusion and interface reaction rate respectively). B = C exp E / kt Ambient B B/A ( ) (5) Dry O 2 C = 7.72 x 0 2 µ 2 hr - E =.23 ev Wet O 2 C = 2.4 x 0 2 µ 2 hr - E = 0.7 ev H 2 O C = 3.86 x 0 2 µ 2 hr - E = 0.78 ev 00 200 00 000 T ( C) 900 C 2 = 6.23 x 0 6 µ hr - E 2 = 2.0 ev C 2 = 8.95 x 0 7 µ hr - E 2 = 2.05 ev C 2 =.63 x 0 8 µ hr - E 2 = 2.05 ev 800 B A = C 2 exp E 2 / kt ( ) (6) Numbers are for () silicon, for (00) divide C 2 by.68. 0 B/A H 2 O B µm 2 hr - B/A µm hr - 0. 0.0 B Dry O 2 B/A Dry O 2 B H 2 O Plots of B, B/A using the values in the above Table. 0.00 0.000 0.65 0.7 0.75 0.8 0.85 0.9 0.95 000/T (Kelvin) 0
0.7 2 0.6 Oxide Thickness - microns 0.5 0.4 0.3 0.2 a) 200 C c) 00 C 000 C 0. 900 C 800 C 0 0 2 4 6 8 0 Time - hours Calculated (00) silicon dry O 2 oxidation rates using Deal Grove. Oxide Thickness - microns.5 0.5 0 b) 00 C 000 C 900 C 800 C 700 C 0 2 3 4 5 6 7 8 9 0 Time - hours Calculated (00) silicon H 2 O oxidation rates using Deal Grove. Example: Problem 6.3 in the text: a) 3 hrs in O 2 @ 00 C = 0.2 µm + b) 2 hrs in H 2 O @ 900 C = 0.4 µm + c) 2 hrs in O 2 @ 200 C = 0.5 µm total oxide thickness.
B. Thin Oxide Growth Kinetics A major problem with the Deal Grove model was recognized when it was first proposed - it does not correctly model thin O 2 growth kinetics. Experimentally O 2 oxides grow much faster for 20 nm than Deal Grove predicts. MANY models have been suggested in the literature.. Reisman et. al. Model x O = a( t + t i ) b or x O = a t + x b i a (7) Power law fits the data for all oxide thicknesses. a and b are experimentally extracted parameters. Physically - interface reaction controlled, volume expansion and viscous flow of SiO 2 control growth. 2. Han and Helms Model b dx O dt = B 2x O + A + B 2 2x O + A 2 (8) Second parallel reaction added - fits the data for all oxide thicknesses. Three parameters (one of the A values is 0). Second process may be outdiffusion of O V and reaction at the gas/sio 2 interface. 2
3. Massoud et. al. Model dx O dt = B 2x O + A + Cexp x O (9) L Second term added to Deal Grove model - higher dx/dt during initial growth. L 7 nm, second term disappears for thicker oxides. Easy to implement along with the DG model, \ used in process simulators. Data agrees with the Reisman, Han and Massoud models. (800 C dry O 2 model comparison below.) 0.03 0.025 Oxide Thickness - microns 0.02 0.05 0.0 0.005 Deal Grove Model (τ = 8 hrs) Reisman et. al. Model Han & Helms Model Deal Grove Model (τ = 0) 0 0 2 4 6 8 0 Time - hours 3
C. 2D SiO 2 Growth Kinetics a) Etched Si Ring Si Substrate These effects were investigated in detail experimentally by Kao et. al. about 5 years ago. Typical experimental results below. Side Views Top Views b) c) Polysilicon SiO 2 Si d) 4 (Kao et.al)
Normalized Oxide Thickness..0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0. 00 C 000 C 900 C 800 C 0 2 3 4 5 6 7 8 200 C 900 C 00 C 000 C Convex Radii Concave Radii µm 0.2 µm 0.25 µm (Kao et.al) /r µm - Several physical mechanisms seem to be important: Crystal orientation 2D oxidant diffusion Stress due to volume expansion To model the stress effects, Kao et. al. suggested modifying the Deal Grove parameters. k S (stress) = k S exp σ n V R exp σ t V T kt kt 5 ( )( V D ) D(stress) = Dexp P kt C * (stress) = C * exp P (22) kt where σ and σ n t are the normal and tangential stresses at the interface. V R, V T and V S are reaction volumes and are fitting parameters. ( )( V S ) (20) (2)
In addition, the flow properties of the SiO 2 need to be described by a stress dependent viscosity σ η(stress) = η(t) S V C / 2kT sinh σ S V C / 2kT ( ) (23) Where σ S is the shear stress in the oxide and V C is again a fitting parameter. -0.4 Parameter Value V R 0.025 nm 3 V D 0.0065 nm 3 V S, V T 0 V C 0.3 nm 3 @ 850 C 0.72 nm 3 @ 050 C η(t) - SiO 2 3.3 x 0 0 exp(2.9 ev/kt) poise η(t) - Si 3 N 4 4.77 x 0 0 exp(.2 ev/kt) poise Microns -0.2 0 0.2 0.4 0.6 0.8 SiO 2 Si 3 N 4 Silicon These models have been implemented in modern process simulators and allow them to predict shapes and stress levels for VLSI structures (above right). ATHENA simulation: Left - no stress dependent parameters, Right - including stress dependence. 6-0.8-0.4 0 0.4 0.8 Microns -0.8-0.4 0 0.4 0.8 Microns
D. Point Defect Based Models The oxidation models we have considered to this point are macroscopic models (diffusion coefficients, chemical reactions etc.). O 2 H 2 O Diffusion I * * I V There is also an atomistic picture of oxidation that has emerged in recent years. Most of these ideas are driven by the volume expansion occurring during oxidation and the need for free volume. Oxide Silicon In Chapter 3 we described internal oxidation in the following way: ( + 2γ)Si Si + 2O I + 2βV SiO 2 + 2γI + stress (24) Surface oxidation can be thought of in the same way. 7
* The connection between oxidation and other processes can then be modeled as shown below. O2 Surface Recombination G R 0 Si 3 N 4 SiO 2 Inert Diffusion Bulk Recombination I Microns 0.5 OED Inert Diffusion Buried Dopant Marker Layer OED.0.5 0 2 Microns Example - ATHENA simulation of OED. Oxidation injects interstitials to create free volume for the oxidation process. Oxidation can also consume vacancies for the same reason. These processes increase I concentrations and decrease V concentrations in nearby silicon regions. Any process (diffusion etc) which occurs via I and V will be affected. -2-8
E. Complete Process Simulation of Oxidation Many of these models (and others in Chapter 6), have been implemented in programs like SUPREM. Microns Microns 0 0.4 0.8 0 0.4 0.8-0 Microns Simulation of an advanced isolation structure (the SWAMI process originally developed by Hewlett-Packard), using SSUPREM IV. The structure prior to oxidation is on the top left. A 450 min H 2 O oxidation at 000 C is then performed which results in the structure on the top right. An experimental structure fabricated with a similar process flow is shown on the bottom right. The stress levels in the growing SiO 2 are shown at the end of the oxidation on the bottom left. 9
Summary of Key Ideas Thermal oxidation has been a key element of silicon technology since its inception. Thermally, chemically, mechanically and electrically stable SiO 2 layers on silicon distinguish silicon from other possible semiconductors. The basic growth kinetics of SiO 2 on silicon are controlled by oxidant diffusion and Si/SiO 2 interface chemical reaction. This simple Deal-Grove model has been extended to include 2D effects, high dopant concentrations, mixed ambients and thin oxides. Oxidation can also have long range effects on dopant diffusion (OED or ORD) which are modeled through point defect interactions. Process simulators today include all these physical effects (and more) and are quite powerful in predicting oxidation geometry and properties. 20