Verifying The Reliability Of Connections In HDI PWBs

Similar documents
Interconnection Reliability of HDI Printed Wiring Boards

Evaluating the CAF (conductive anodic filament)

Interconnection Evaluation Technology for Printed Wiring Boards

Welcome to Streamline Circuits Lunch & Learn. Design for Reliability & Cost Reduction of Advanced Rigid-Flex/Flex PCB Technology

A New Cyclic TMA Test Protocol for Evaluation of Electronic & Dielectric Materials

Via Life vs. Temperature Stress Analysis of Interconnect Stress Test

Flexible PCB Plating Through Hole Considerations, Experiences and Solutions

HKPCA Journal Issue 21

Mastering the Tolerances Required by New PCB Designs. Brad Hammack Multek Doumen, China

IBM Laminate Study Group

Via Filling: Challenges for the Chemistry in the Plating Process

Two Chips Vertical Direction Embedded Miniaturized Package

IMPACT OF MICROVIA-IN-PAD DESIGN ON VOID FORMATION

Low CTE / High Tg FR-4 with High Heat Resistance

PCB Production Process HOW TO PRODUCE A PRINTED CIRCUIT BOARD

Challenges and Future Directions of Laser Fuse Processing in Memory Repair

Bare Board Material Performance after Pb-Free Reflow

ICDs (InterConnect Defects) What are they? Where do they come from? How can we make them go away? Doug Trobough Suixin Zhang

UL PCB Recognition what is it & why do you need to know about it

Nano- And Micro-Filled Conducting Adhesives For Z-axis Interconnects

Thermal Reliability of Laser Ablated Microvias and Standard Through-Hole Technologies as a Function of Materials and Processing

Future HDI An HDPUG project Proposal

SITV s Stack-ups and Loss. Add a subtitle

Gold Circuit Electronics

Introduction Conductors. Supply Planes. Dielectric. Vias PCB Manufacturing Process Electronic Assembly Manufacturing Process

Images of Failures in Microelectronics Packaging and Assembly

2015 IEEE. REPRINTED, WITH PERMISSION, FROM Next Generation Metallization Technique for IC Package Application

High Frequency Circuit Materials Attributes John Coonrod, Rogers Corporation

Conductive Paste-Based Interconnection Technology for High Performance Probe Card

We fill the gaps! Increase of the integration density of PCBs by filling of blind microvias and through holes with electroplated copper.

Failure Modes in Wire bonded and Flip Chip Packages

TGV and Integrated Electronics

High Layer Count PCB. Technology Trends in KOREA ISUPETASYS

GRAPHIC MANUFACTURING CAPABILITY Q217-18

Characterizing the Lead-Free Impact on PCB Pad Craters

ATS Document Cover Page

Qualification and Performance Specification for Flexible Printed Boards

PCB Technologies for LED Applications Application note

Embedding Passive and Active Components: PCB Design and Fabrication Process Variations

Development of System in Package

ThunderClad 2. TU-883 HF Very Low Loss Material. Laminates & Prepregs Mass Lamination Service Insulated Metal Substrate Materials

Conductive Anodic Filament Growth Failure

Lead Free Assembly: A Practical Tool For Laminate Materials Selection

How to select PCB materials for highfrequency

Offshore Wind Turbines Power Electronics Design and Reliability Research

IPC-TM-650 TEST METHODS MANUAL

Optimizing the Insulated Metal Substrate Application with Proper Material Selection and Circuit Fabrication

Newsletter. Test Services & Failure Analysis Laboratory. April The Reality of Flip-Chip Solder Bump Electromigration Failure INSIDE THIS ISSUE

Novel Materials and Activities for Next Generation Package. Hitachi Chemical., Co.Ltd. Packaging Solution Center Hiroaki Miyajima

Flex and Rigid-Flex Printed Circuit Design

Encapsulation Selection, Characterization and Reliability for Fine Pitch BGA (fpbga )

23 rd ASEMEP National Technical Symposium

No Process Guidelines. Laminate R-5775 Prepreg R High Speed, Low Loss Multi-layer Materials

FR406N Processing Guide

EIPC Summer Conference Luxembourg Paper 4

Precision Engineered Parts

Freescale Semiconductor Tape Ball Grid Array (TBGA) Overview

U.S. EPA-IPC Design for the Environment Printed Wiring Board Project Making Holes Conductive Performance Testing Results

PEC (Printed Electronic Circuit) process for LED interconnection

Highly Accelerated Thermal Shock Reliability Testing

TECHNICAL DATA SHEET 1 P a g e Revised January 9, 2014

Space product assurance

Substrate Materials. Aliza Mizrachi

Flexible Printed Circuits Design Guide

Simulation of Embedded Components in PCB Environment and Verification of Board Reliability

Plating HIGH ASPECT RATIO PCBs

Design and Assembly Process Implementation of 3D Components

Test Flow for Advanced Packages (2.5D/SLIM/3D)

Improvement of Laser Fuse Processing of Fine Pitch Link Structures for Advanced Memory Designs

1/2W, 0805 Low Resistance Chip Resistor (Lead / Halogen free)

PRODUCTION SERVICE OF PRINTED CIRCUIT BOARDS (PCBS)

Device Attachment Methods and Wirebonding Notes for RT/duroid and RO4000 Series High Frequency Laminates

Astra MT77 Processing Guide

MCPCB Material (Heat sync)

NCAB Group PCB Specification

TECHNICAL DATA NEAT RESIN MECHANICAL PROPERTIES

WF6317. A superactive low-volatile/high heat-resistant water-soluble flux for ball soldering

3.0x2.0mm SMD LED WITH CERAMIC SUBSTRATE. PRELIMINARY SPEC Part Number: AT3020QB24ZS-RV Blue. Features. Material as follows: Package Dimensions

3D Packaging- Synthetic Quartz Substrate and Interposers for High Frequency Applications. Vern Stygar #1, Tim Mobley* 2 # Asahi Glass Corporation

FLEXIBLE & RIGID-FLEX CIRCUITS TECHNICAL ENGINEERING GUIDE. Delivering Quality Since 1952.

TECHNICAL DATA SHEET 1 P a g e Revised August, 2014

IPC-AJ-820A Assembly and Joining Handbook. The How and Why of All Things PCB & PCA

Visit

High Tg Bromine-free Laminates for PWB Applications

Application Note. Capacitor Selection for Switch Mode Power Supply Applications

c/bach, 2-B Pol. Ind Foinvasa Montcada i Reixac (Barcelona) SPAIN Tel FAX

MICROWAVE INSPECTION METHOD AND ITS APPLICATION TO FRP

PART MATERIAL REMARK Metal Case with Pig-tail. Brass (Metal Case) Copper (Pig-tail) Star Contact Copper Silver Plated

TMS320C6000 BGA Manufacturing Considerations

Packaging Technologies for SiC Power Modules

ROLINX Laminated Busbar. Design Rules Version 01 (12/2015)

Keeping Cool!: selecting high performance thermal materials for LED Lighting applications. Ian Loader 25/03/14

Basic PCB Level Assembly Process Methodology for 3D Package-on-Package

ESPANEX L Series. Technical data sheet Nishigotanda Shinagawa Tokyo, , Japan TEL FAX

TAIYO PSR-4000 LDI (US) (UL Name: PSR-4000 JA / CA-40 JA)

Component Palladium Lead Finish - Specification Approved by Executive Board 1997-xx-xx August 22 Version

Transcription:

Verifying The Reliability Of Connections In HDI PWBs The stacking of via holes is used effectively in the development of high density circuits on build-up printed wiring boards (PWBs). However, when micro via holes (MVHs) are repeatedly stacked, they can cause open circuits due to the difference in the thermal expansion of the Copper and the glass epoxy base material. In order to verify the reliability of the stacked via hole connections, a range of test boards with different numbers of stacked via hole layers, material types (FR-4, high-tg FR- 4, low thermal expansion material, etc.), and via hole diameters (0.100 mm and 0.075 mm) was produced and tested. Figure 1 The manufacturing process by Tatsuo Suzuki, Nec Toppan Circuit Solutions The boards were examined through DC current induced thermal cycling tests to determine the reliability of the various samples. With regards to anti-migration properties, the pitches and base material types of micro via holes were also studied. As a result of the evaluation, it was verified that first the MVH, then the interstitial via hole (IVH) and lastly the plated through hole (PTH) achieved, respectively, the most reliable connections. As for base materials, a high-tg material with low thermal expansion qualities is recommended. It would seem that a MVH diameter of 0.100 mm is preferable to prevent voids due to a high aspect ratio. No problems with the reliability of the insulation were found on any base material, as long as the MVH pitch is 0.35 mm or more (or 0.25 mm between the hole walls). Due to higher pin counts and narrower pitches, the density of the printed wiring boards required by the market today is higher than ever. As a result, the adoption of build-up printed wiring boards has become widespread, particularly in the areas of communication station infrastructures (which require a high level of reliability) and industrial devices such as IC testers. The method used for manufacturing build-up printed wiring boards generally employs the prepreg process to produce the build-up material and Copper plating to ensure electrical connection. In the case of filled via holes, excellent reliability of the electrical connection is provided by the MVH. Moreover, an advantage of adopting filled via holes is the via-on-via structure (stacked via hole). This structure, in which filled via holes are stacked, provides more flexibility in the design of circuits and makes it possible to achieve higher density circuits. In our research on the reliability of these types of connections as a function of base materials, the Figure 2 Weibull probability plot (base material (a) by via hole types) OnBoard Technology April 2005 - page 10

Table 1 Characteristic values of the base materials number of build-up layers and the MVH diameter, it was found that certain design rules had to be established to ensure the reliability of the test results. As a comparative study, further research was also conducted on PTHs and IVHs. Therefore the connection reliability of the entire range of build-up printed wiring boards was addressed. even narrower in line with the narrowing pitch on surface mount components, it was decided to evaluate also the insulation reliability of PWBs with fine-pitched MVHs by using test patterns on which the distances between MVH and MVH are gradually changed. The manufacturing process ure 1. As for the IVH, it was filled with epoxy resin after plating and after a build-up layer was formed. The build-up layer was formed with a thermal press, applied on the prepreg material and Copper foil after the formation of circuits. A CO 2 laser was used to make the MVHs. Since it is generally difficult to work Copper foil using a CO 2 laser, partial etchings on the Copper foil were made prior to drilling the holes with the laser. After plating the filled via holes, a circuit pattern was formed on both sides and then a lamination layer was applied, onto which another circuit pattern was formed to achieve three buildup layers. Stacked via holes were produced by repeating this MVH formation process as required. PCBFABRICATION Furthermore, as it is becoming necessary to make MVH pitches The manufacturing process used for the evaluation is shown in Fig- Connection reliability Figure 3 Barrel crack of a PTH Figure 5 Corner crack of a PTH Figure 7 Corner crack of a MVH (upper via hole) Figure 4 Barrel crack of a IVH Figure 6 Corner crack of a IVH Figure 8 Corner crack of a MVH (lower via hole) One cause of long-term failure that may occur in printed wiring boards is an open circuit resulting from a crack of a PTH. When a printed wiring board is repeatedly subjected to thermal stress, the difference in thermal expansion between the Copper plate and the base material causes a distortion of the board, which can lead to an open circuit if a crack forms in the Copper plate. The failure mode for similar mechanisms on stacked via holes must therefore be studied as well. In order to determine the extent of influence of the difference in thermal expansion between different base materials, besides FR-4, materials with low thermal expansion coefficients were selected for the test. Table 1 shows the characteristic values of base materials. Figure 10 Void in a microvia hole OnBoard Technology April 2005 - page 11

Figure 9 Weibull probability plot (base material (a) by via hole diameter) Table 2 Design rules for connection reliability samples Table 3 Mean time to failure (MTTF) For the evaluation, 16-layer boards with a total thickness of 2.0 mm were used. The boards consisted of three build-up layers on each side of a 10-layer IVH. The board thickness of the IVH layer (layers 4-13) was 1.3 mm, while the thickness between the build-up layers was 0.06 mm per layer. The evaluation method The evaluation method consisted of a DC current induced thermal cycling test according to IPC- TM-650: 2.6.26 - three minutes of heating followed by two minutes cooling (maximum temperature 150 C). Pretreatment consisted in 3x3 cycles from ambient temperature to 230 C. The number of cycles of the test was 2,000 cycles and the criterion was a change in conductive resistance 10%. Sis samples were produced. The test pattern consisted of a daisy chain pattern for PTH, IVH and MVH. The design rules are shown in Table 2. The mean time to failure (MTTF) obtained for each type of base material used in this evaluation is shown in Table 3. Failures occurred first for PTHs, then IVHs and then MVHs, in that order. The failure results of the base material (a) in the PTHs, IVHs and MVHs (three-step stack) are plotted on Weibull probability paper and shown in Figure 2. Comparing the results for various base material types, it was confirmed that the combination of high-tg materials with low thermal expansion specifications does not cause more failures than when using FR- 4 material. Furthermore, in the stacked via hole area, it is assumed that cracks tend to be caused by the increase in distortion resulting from the difference in thermal expansion between the base material and Copper. When the failure Figure 11 Test pattern modes were checked, barrel cracks and corner cracks were detected on PTHs and IVHs (Figures 3 6). In the case of failure on MVHs, corner cracks were also detected (Figures 7 and 8). Results of the evaluation As a result of this evaluation, it was verified that the connection reliability was superior for MVHs, then for IVHs and least reliable were PTHs. In order to enhance the total connection reliability, we believe that it is necessary to improve the connection reliability of PTHs and IVHs in particular. For both the PTH and the IVH processes, it is generally accepted that a thinner board causes fewer problems. To verify this, PTH boards with a 1.6 mm board thickness were produced for evaluation purposes. These thinner boards were obtained by making the prepreg thinner for the substrates (a) and (c) (Table 4). It was ultimately verified that a thinner board provided superior connection reliability. In order to determine the extent of the failures as a function of smaller MVHs, three-step stacked via holes were produced using base materials (a) and (c), and using two different types of laser fabrication conditions. The average value of MVH diameters obtained is given in Table 5. The evaluation revealed that the first failures occurred during the 10th cycle on base material (a) and during the 58th cycle on base material (c). The results of the evaluation of the base material (a) are shown in Figure 9 as an example. Comparing the m values (i.e., shape parameters) on a Weibull distribution, we can see that under laser fabrication conditions (ii), when m < 1, failures OnBoard Technology April 2005 - page 12

Figure 12 Location where a conductive anodic filament (CAF) was generated Table 4 Mean time to failure (MTTF) for thin boards Table 5 Average values of MVH occur early. In the case of type (i) laser fabrication conditions, with m > 1, the occurrence of failures is related to the elapsed time. Checking the failure mode under the laser fabrication condition (ii), it was found that the Copper plated walls of the hole became thinner as a void occurred within the MVH (Figure 10). The root cause was the difficulty in circulating the foaming solution and Copper plating solution within the MVH during the Copper plating process due to the higher aspect ratio resulting from the decreased MVH diameter. In promoting smaller diameters of MVH, attention must be paid to the MVH diameter and the dielectric thickness. To achieve a stable volume production, it is also necessary to establish a quality assurance Table 7 Insulation reliability evaluation results process aimed at eliminating voids within MVH. In order to satisfy the 200 cycle requirement of the DC current induced thermal cycling test, it is necessary to ensure the reliability of PTHs or IVHs and use either a high-tg material or a low thermal expansion material. With regards to MVHs, a diameter of approximately 0.100 mm is desirable in correspondence of a thickness of 0.06 mm between build-up layers. The manufacturing specifications of chip carrier applications require careful examination since their design rules and base materials are different from those of general printed wiring boards. Insulation reliability In line with the trend towards narrower pitches for surface mount components, distances between MVHs are also becoming shorter. A study was carried out to determine how the reduced distance between MVH and MVH affects insulation. We used the test pattern that combined MVHs in a comb-type pattern as shown in the Figure 11, in accordance with the design rules described in Table 6. Four types of base materials were used for the evaluation, namely base materials (a), (b), (c) and (d), as shown in Table 1. The thickness between build-up layers was 0.06 mm. The evaluation method for moisture and insulation resistance (IR) was Printed Board IPC-TM-650, 2.6.3F, Class 2, 50 C +/-5 C, 85 93% RH, DC 100V, for 7 days (168 hours). The test was conducted in accordance with all of the above conditions except for the test duration, which continued for up to 500 hours. The IR of the samples was measured every 10 minutes under the test conditions. Pre-treatment consisted in maintaining the samples at 50 C for 24 hours. As for the failure criteria, no measling, blistering, delamination, etc. is allowed. Insulation resistance should be at least 500 x 106 ohms. The number of samples was six. The results of this evaluation are provided in Table 7. No failures occurred on any of the samples for the 168 hours of testing that is the standard requirement for the IPC- TM-650 Environmental Test Method 2.6.3F. However, our longer test duration found that 1 out of every 6 samples of base material (a) with a 0.35 mm MVH pitch (a distance between hole walls of 0.25 mm), had a failure after 434 hours. When the defective portion was examined, a conductive anodic filament (CAF) was discovered (Figure 12). Because the results satisfy the standard 168 hour requirement, it was concluded that there is no problem with an MVH pitch of 0.35 mm or more (or a distance of at least 0.25 mm between hole walls) on any of the base materials examined (Figures 13-16). Insulation reliability apparently varies depending on the type of resin and glass cloth within the base material. It is therefore important to select an appropriate base material in consideration of the customer s requirements and the design rules. Conclusions The evaluation verified that the connection reliability was highest Table 6 Design rules for insulation reliability samples PCBFABRICATION OnBoard Technology April 2005 - page 13

Figure 13 0.35 mm MVH pitch on base material (a) for MVHs, followed by IVHs, and then PTHs. For the base material, a high-tg material with low thermal expansion properties is recommended as no failure was found after completing a total of 2000 cycles. In general, the thicker the board, the more problems occur in IVHs and PTHs. To improve the reliability in products with a higher layer count, it is desirable to use base materials with both high-tg and low thermal expansion properties. Assuming there is no restriction on the impedance specification or the like, we suggest, to improve connection reliability by reducing the total thickness, using a 0.06 mm thick inner layer material and a 0.06 mm thick prepreg. Figure 14 0.35 mm MVH pitch on base material (b) In promoting smaller diameters of MVH, the aspect ratio of MVH becomes higher, increasing the risk of a void on the Copper plate. Thus greater care is required in the setting of the thickness between the build-up layers. To allow for volume production, an MVH diameter of 0.100 mm is desirable if the thickness between the build-up layers is 0.06 mm. In order to realise a higher aspect ratio of MVH, consideration must be given to de-foaming during Copper plating, the method for circulating the Copper plating solution within MVH, and the reduction of glass projections from the hole walls. Figure 15 0.35 mm MVH pitch on base material (c) Figure 16 0.35 mm MVH pitch on base material (d) With regards to the insulation reliability, care is required in the selection of base materials even though no problem was found for an MVH pitch down to 0.35 mm. To further enhance the reliability of high layer count buildup printed wiring boards, it is necessary to optimize the base materials in regard to the board thickness, PTH diameter, IVH diameter, MVH diameter and Copper plate thickness. This article is based on a paper originally presented at the IPC Printed Circuits Expo, Apex and Designer s Summit 2005 OnBoard Technology April 2005 - page 14