AFRL-SR-AR-TR

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REPORT DOCUMENTATION PAGE AFRL-SR-AR-TR-10-0203 The public reporting burden for this collection of information is estimated to average 1 hour per response, including th<-... gathering and maintaining the data needed, and completing and reviewing the collection of information. Send comments regarding this burden estimate. -.., information, including suggestions for reducing the burden, to Deportment of Defense, Washington Headquarters Services, Directorate for Information Operations and Reports wurt -._ 1215 Jefferson Davis Highway, Suite 1204, Arlington, VA 22202-4302. Respondents should be aware that notwithstanding any other provision of law, no person shall be subject to any penalty for failing to comply with a collection of information if it does not display a currently valid OMB control number. PLEASE DO NOT RETURN YOUR FORM TO THE ABOVE ADDRESS. 1. REPORT DATE IDD-MM- YYYY) 31-JUL09 4. TITLE AND SUBTITLE AFOSR Wafer Bonding 2. REPORT TYPE Final Performance 3. DATES COVERED (From - To) Life of grant 5a. CONTRACT NUMBER FA9550-06-1-0089 5b. GRANT NUMBER FA9550-06-1-0089 5c. PROGRAM ELEMENT NUMBER 6. AUTHOR(S) Umesh Mishra 5d. PROJECT NUMBER 5e. TASK NUMBER 5f. WORK UNIT NUMBER 7. PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES) UCSB 8. PERFORMING ORGANIZATION REPORT NUMBER 9. SPONSORING/MONITORING AGENCY NAME(S) AND ADDRESS(ES) AFOSR 10. SPONSOR/MONITORS ACRONYM(S) 11. SPONSOR/MONITOR'S REPORT NUMBER(S) 12. DISTRIBUTION/AVAILABILITY STATEMENT A: Unlimited 13. SUPPLEMENTARY NOTES 20100616374 14. ABSTRACT The concept of a Bonded Field-Effect Transistor has been successfully demonstrated, using an InGaAs/lnAlAs MESFET Source/Gate region with an InGaN/GaN drain region. Bonding other material combinations such as Si-GaP and Si-GaN have been attempted and explored. Material non-uniformity severely impacts the ability of GaN to bond, and several process developments have been made to attempt to overcome this issue. Many possibilities exist for the continued exploration of this new class of devices, promising both high-frequency and high-voltage operation. 15. SUBJECT TERMS 16. SECURITY CLASSIFICATION OF: a. REPORT b. ABSTRACT c. THIS PAGE 17. LIMITATION OF ABSTRACT 18. NUMBER OF PAGES 19a. NAME OF RESPONSIBLE PERSON 19b. TELEPHONE NUMBER /Include area code) Standard Form 298 (Rev. 8/98) Prescribed by ANSI Std. Z39.18

End of Project Report AFOSR Wafer Bonding FA9550-06-1-0089 Summary The concept of a Bonded Field-Effect Transistor has been successfully demonstrated, using an InGaAs/InAlAs MESFET Source/Gate region with an InGaN/GaN drain region. Bonding other material combinations such as Si-GaP and Si- GaN have been attempted and explored. Material non-uniformity severely impacts the ability of GaN to bond, and several process developments have been made to attempt to overcome this issue. Many possibilities exist for the continued exploration of this new class of devices, promising both high-frequency and high-voltage operation. Background The goal of this project was to produce a Field-Effect Transistor (FET) utilizing and electrically-active wafer-bonded junction. Wafer bonding allows two very dissimilar materials that cannot be grown heteroepitaxially on top of each other, to be joined. Historically, device design has progressed through a variety of material structures, including: Homojunction devices, in Si. using only one material Heterojunction devices, in InGaAs/InAlAs, using two or more materials with very similar lattice constants Pseudomorphic devices, in AlGaN/GaN, using two or more materials with dissimilar lattice constants and strained, but non-defective material The next logical progression in this trend is bonded devices, where two materials that cannot be grown pseudomorphically are combined to produce a single structure. Combining material systems allows the creation of an ideal device, where any material can now be picked for inclusion in the device design. An ideal device would be able to operate at high voltages and high frequencies. However, high-speed materials such as InGaAs tend to have low breakdown voltages, and high-breakdown materials such as GaN tend to be slower (see Figure 1). Luckily, the region of a FET where the voltage peaks is not impacted by low electron velocity, nor are fields particularly high in the regions where velocity is important. Therefore, via bonding, a device can now be designed to include a high-speed electron injector with a high-voltage electron collector, avoiding the downsides of respective materials.

100 100 r T (GHz) 1000 Figure 1 Breakdown vs Ft. Note that breakdown voltage decreases montonically with increasing Ft. Successes InGaAs/GaN BAVET The InGaAs/GaN BAVET (Bonded Aperture Vertical Electron Transistor) is a device modeled on the AlGaN/GaN CAVET, but rather than regrowing an AlGaN/GaN HEMT atop a GaN template, an InGaAs/InAlAs MESFET (or HEMT) is bonded on. We have successfully demonstrated the concept of the BAVET. though it is limited by parasitic currents. V G =-1V AV =-1V G 12 3 4 5 6 7 8 Vos IV -V hai J (V) Figure 2 InGaAs-GaN BAVET IV. Gate leakage and high Ron are problematic.

The device consists of the following: Burried n-gan drain Current blocking layers Small conductive aperture Bonded InGaAs-InAlAs MESFET on top. Figure 3 BAVET Structure. SiN was added to help insulate the source ohmics. Si/GaP Si/GaN iodes Silicon integration with compound semiconductors via bonding would open a very large space of new devices, allowing the vast amount of knowledge and capacity of VLSI processes to be integrated and utilized along with GaN. Because of difficulties in getting Si to bond to GaN, GaP was selected as a precursor to using GaN because of its relatively high band-gap (2.3eV) and the availability of smooth, polished material. Wafer flatness is critical to success in bonding, and it was found that Si and GaP bond readily.

p-si to n-gap diodes were constructed, and found to exhibit very good characteristics and followed as one would expect from the material parameters. 04 j= 02 1 s -0.2-0.4 200um x 200um 300um x 300um J o -0.8-13-12-11-10-9-8-7-6-5-4-3-2-1 0 12 3 V -V Figure 4 IV data for psi-ngap diodes. Reverse leakage and turn on voltage is favorable. This is the type of structure desirable for making a bonded N-MOSFET, but when we examine the electron flow in an nsi-ngap diode, it is found that there is a significant barrier to electron transport, as seen in InP-GaN and InGaAs-GaN as well (see section "Electron Barrier" on page 6). ngap-nsi Bonded Junction 150WTIK 1S0Um ZtXHJm * ZOOum w» I" 250l*tl X 250um 300um«300um Figure 5 IV data for nsi-ngap diodes. Behavior is suggestive a very large electron barrier. Finally, with the availability of MBE-grown GaN suitable for bonding, the first nsingan diodes were produced. As expected, these too exhibit a large conduction band barrier.

noan- nsi Bonded Junction 30-150umx150um 20-200um x 200un F 10-250un x 250um z 3-10 - o -20 - -30-10.8 6 4-202 VotUg. V»i-Vgan 4 Figure IV data for nsi-ngan bond. Structure is similar to that shown in Figure Difficulties and Knowledge Added Surface Morphology and Particles One of the most important features of materials in determining whether they will bond is the quality of the bonding surfaces, in both cleanliness (foreign particles) and surface morphology (roughness). Two silicon wafers, when properly cleaned, can easily bond at room temperature because of their smooth, polished surface. However, Ga-face GaN does not polish well and the as-grown samples feature step-growth patterns and other micro- and macro-scale nonuniformities. Figure The roughness in the surface of the GaN leaves voids (light regions) when bonded. In order to best avoid these issues, a specialized program was developed to control the bonding conditions. A combination a two factors, a stepped temperature/pressure profile and a higher overall pressure, helped to eliminate the voids. The growth of InGaN on top of GaN proved a particularly problematic issue for bonding. If the InGaN layer is too thin, the piezoelectric charge depletes it of carriers.

and as it has a very low mobility (-80), thick layers are undesirable. Further, the surface morphology is sensitive to a multitude of factors, and very different outcomes exist. 10.0 nm Figure 8 AFM of InGaN shows steps and pits, with light roughness. Bonds well. 1: Height 5.0 lm Figure 9 AFM of InGaN shows no steps, excessive pitting and heavy roughness. Does not bond. Electron Barrier The next big issue to overcome, once a strong physical bond is made, is electron transport through the junction. As predicted in mathematical models, the 1-V characteristics suggest there is a non-negligible electron barrier at the interface. In order to combat this issue, the conduction band discontinuity must be reduced. This can be accomplished by incorporating InGaN in the structure, lowering the discontinuity and improving the current. InGaAs GaN InGaAs InGaN 0.7eV 0.4eV Figure 10 Suggested band structure of InGaAs-GaN bond. Figure 11 Suggested band structure of InGaAs- I n.,,,<.a,,n bond, with smaller barrier. Due to the very low mobility of the InGaN, it is undesirable to contact it directly. Therefore, a buried N+ GaN contact is used. The final band diagram is as follows:

Figure

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