Platform-Based Design of Heterogeneous Embedded Systems

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Platform-Based Design of Heterogeneous Embedded Systems Ingo Sander Royal Institute of Technology Stockholm, Sweden ingo@kth.se Docent Lecture August 31, 2009 Ingo Sander (KTH) Platform-Based Design August 31, 2009 1 / 44 Embedded systems are everywhere...... and control vital functions in our daily life! Designers have large responsibility! Between 1985-87 several deaths and serious injuries of cancer patients were due to overdoses of radiation resulting from a race condition between concurrent tasks in the Therac-25 software (1985-87). Ingo Sander (KTH) Platform-Based Design August 31, 2009 2 / 44

How can we avoid future accidents? Embedded systems take over an increasing number of vital functions in our society include more and more functionality Increasingly complex design process Disciplined methodology is needed to design predictable embedded systems! Ingo Sander (KTH) Platform-Based Design August 31, 2009 3 / 44 Heterogeneous Nature of Embedded Systems An embedded system interacts with the physical world and other embedded components An embedded system architecture consists of heterogeneous components RTOS CPU 1 Custom Hardware Analog Hardware Analog/ Digital Communication Network (Bus, NoC,...) Digital/ Analog CPU 2 Reconfig. HW Input/ Output DSP Processor SDRAM Memory SRAM Memory Ingo Sander (KTH) Platform-Based Design August 31, 2009 4 / 44

Characteristics of Embedded Systems An embedded system is usually designed for one single task. Its functionality will never change. is often a mass product. Design cost is critical. interacts with the environment at the speed of the environment. Many embedded systems are safety-critical systems and have to fulfill hard real-time requirements. is often a hand-held device. Power-efficiency is critical. is often a consumer products. Time-to-market is critical. Ingo Sander (KTH) Platform-Based Design August 31, 2009 5 / 44 Design process for embedded systems is very different from general purpose programming! Embedded systems can be highly optimized All unneeded features are a disadvantage (cost, power) Design process must be cost-efficient ensure the correct functionality and timing of the implementation be fast to ensure a short time-to-market To be fast is not enough! The system has to react to the environment at the right time instance, otherwise there can be fatal consequences. Ingo Sander (KTH) Platform-Based Design August 31, 2009 6 / 44

How to design an embedded system? Design Abstraction Gap The challenge How to bridge the abstraction gap? Product Ingo Sander (KTH) Platform-Based Design August 31, 2009 7 / 44 Top-Down Design Process Abstraction Level Specification Model Refinement Steps Abstraction Gap Design Space Implementation Models The design process requires to express the system at different levels of abstraction. For each level a new model of the system is required. Ingo Sander (KTH) Platform-Based Design August 31, 2009 8 / 44

Overview Design Process Functional Model InputSignal P1 P2 P4 OutputSignal Task 1 Task 2 P3 Task 1 Task 3 Task 2 Task 4 Task 3 Task 4 RTOS CPU 1 CPU 2 CPU 3 Software InputSignal CPU I/O 13 CPU Mem3 CPU I/O 23 OutputSignal Hardware Implementation Ingo Sander (KTH) Platform-Based Design August 31, 2009 9 / 44 Full-custom design methodology A top-down full-custom design methodology will use all levels of abstraction during the design process. Maximal flexibility, all details can be fine-tuned. Maximal performance can theoretically be achieved. Design-time and thus time-to-market can be very (much too) long! Ingo Sander (KTH) Platform-Based Design August 31, 2009 10 / 44

Platform: Not a new, but a successful concept Platforms have been used in many different areas! How can we adapt the platform concept for predictable embedded systems? Ingo Sander (KTH) Platform-Based Design August 31, 2009 11 / 44 Reduce Design Time and Time-To-Market The basic idea of platform-based design is to avoid to design a system from scratch. Platforms at different levels can be reused for different applications. Sales per Quarter 100 50 0 Product Introduction Q1 Peak Sales Q2 Q3 Q4 Q1 Q2 End of product lifetime Delay Source: M. Smith, 1997 Time-to-market is critical for many products! Ingo Sander (KTH) Platform-Based Design August 31, 2009 12 / 44

An industrial platform: OMAP The Open Multimedia Application Platform (OMAP) is developed by Texas Instruments. Many mobile phones are using this platform. The OMAP 4 platform has been designed to drive smart phones and mobile internet devices (MIDs). OMAP Hardware Platform Instance Ingo Sander (KTH) Platform-Based Design August 31, 2009 13 / 44 An industrial platform: OMAP OMAP is not only a hardware platform, but provides several layers of software, which together comprise the OMAP software platform. OMAP Software Platform Designer can work at a high-level of abstraction! Ingo Sander (KTH) Platform-Based Design August 31, 2009 14 / 44

Alteras SOPC platform Altera offers a platform to design a system-on-a-programmable-chip on an FPGA architecture around the Nios II soft processor. Designer selects hardware components (processor and peripherals) and specifies the interconnection. Ingo Sander (KTH) Platform-Based Design August 31, 2009 15 / 44 Altera System Interconnect Fabric Given the specification of the components and the interconnection structure the Altera software generates the System Interconnect Fabric. Ingo Sander (KTH) Platform-Based Design August 31, 2009 16 / 44

Altera Hardware Abstraction Layer Library In addition to the hardware architecture the Altera software performs an automatic generation of the Hardware Abstraction Layer software libraries, which abstract from the underlying hardware. Raising the Level of Abstraction The designer can now design at a higher-level of abstraction using more abstract functions and symbolic address names. Ingo Sander (KTH) Platform-Based Design August 31, 2009 17 / 44 Trade-Off: Design Space vs. Time-to-Market A platform limits the design choices. The designer needs only to analyze the alternatives that are implemented by the platform. The platform can itself be configured to a certain degree. Initial Model Initial Model Functional Layers Functional Layers Platform SW and HW Layers SW and HW Layers Possible Implementations Design Space (a) Full-Custom Design Methodology Possible Implementations Design Space (b) Platform-Based Design Ingo Sander (KTH) Platform-Based Design August 31, 2009 18 / 44

Platform Benefits In addition to a shorter time-to-market the platform concept gives more benefits: Reuse of platform reduces design costs. The platform can be highly optimized since the development costs are shared by several designs. Library of software or IP-blocks Tool support in form of compilers, verification tools, simulators Full-custom design of critical platform components Other platforms can be developed on top of a platform. Design entry can be moved to higher levels of abstraction Development of synthesis tools to automatically refine a design from an abstract level to a more detailed level Ingo Sander (KTH) Platform-Based Design August 31, 2009 19 / 44 Mapping of Function to Platform In order to map a function onto a platform functional requirements need to be a implemented non-functional requirements need to be fulfilled (cost, power, timing,... ) Accurate estimates must be provided by the platform! Ingo Sander (KTH) Platform-Based Design August 31, 2009 20 / 44

Current Industrial Design Practice It is very difficult to accurately estimate the performance of an embedded system. Huge difference between average and worst case execution time As a consequence Industry bases new designs rather on old experiences than on performance analysis Industry introduces sufficient safety margins in form of more powerful components and extra communication bandwidth Verification costs are extremely high! Surely, there must be a better way to design systems... Ingo Sander (KTH) Platform-Based Design August 31, 2009 21 / 44 A Dream: Correct-by-Construction Refinement In an ideal world, the design process would be correct by construction. All refinements are correct Functionality is preserved Performance constraints are met What is needed? A predictable platform that provides accurate performance estimates Verified transformation rules to map a design from a higher level of abstraction to a lower level of abstraction Ingo Sander (KTH) Platform-Based Design August 31, 2009 22 / 44

Predictable platforms at all levels of abstraction Transformation rules and constraint propagation Platform - Level y Platform - Level y-1 Platform - Level x Platform - Level 1 Platform - Level 0 Platform provides accurate performance figures Base platform needs to be predictable Function Platforms Software Platforms Hardware Platforms New platforms can be based on existing platforms If the base platform lacks predictability, it is very difficult to build a predictable platform on top of it Ingo Sander (KTH) Platform-Based Design August 31, 2009 23 / 44 Why is it so difficult to estimate software? There is a huge difference between average and worst case response time Many architectures are designed for an optimal average performance! Worst case performance is critical! Optimizing average case performance is important for most software systems. However, in particular for safety-critical systems worst case performance is critical! Ingo Sander (KTH) Platform-Based Design August 31, 2009 24 / 44

Caches CPU Cache (fast) Cache (fast) Bus Address Space Main Memory (very slow) Main Memory (very slow) Caches can significantly improve average performance! BUT Cache access time is much less than access time to main memory. Memory content is changed dynamically Extremely difficult to predict, if data will be in the cache at a certain time instant. Very difficult to exploit caches in real-time systems! Ingo Sander (KTH) Platform-Based Design August 31, 2009 25 / 44 Shared Memory Multiprocessor Execution time of programs in a shared memory multiprocessor can in general not be analyzed in isolation. Pgm 1 Pgm 1 Pgm 2 Idle CPU CPU 1 CPU 2 CPU 1 CPU 2 Shared Memory (a) CPU 2 is idle Shared Memory (b) CPU 2 runs a program Execution time for a program on one processor depends on memory access patterns of other processors (t pgm1,a t pgm1,b )! Ingo Sander (KTH) Platform-Based Design August 31, 2009 26 / 44

Why can we so accurately predict hardware performance? Elegant synchronization mechanism: the hardware clock All input events happen at the same time instance Communication is predictable! Only requirement: all computations are finished within one clock period Longest computation path determines clock period Since communication is synchronous, access to shared resources is predictable Computation Delay Computation Delay Computation Logic Computation Logic Register Register Register Clock Ingo Sander (KTH) Platform-Based Design August 31, 2009 27 / 44 Digital Hardware: A Small Set of Components, Infinite Possibilities We can build extremely complex designs with digital hardware! The foundation for digital hardware is simple! All logic functions can be implemented using only NAND or NOR gates Digital hardware can be described by boolean equations Abstract concepts like finite state machines can be directly mapped to hardware! Keep predictable platforms simple! Ingo Sander (KTH) Platform-Based Design August 31, 2009 28 / 44

Predictable Hardware Platform Dedicated on-chip memory instead of caches Memory contents in dedicated on-chip memory (scratchpad memory) is static. Predictable access time to main memory Predictable access time to on-chip memory On-Chip Memory (fast) CPU Bus Main Memory (very slow) Address Space On-Chip Memory (fast) Main Memory (very slow) Challenge Determine, which memory locations should be in scratchpad memory Ingo Sander (KTH) Platform-Based Design August 31, 2009 29 / 44 Predictable Hardware platform Predictable access to communication network Give processors guaranteed access to buses or communication links by reserving time slots for each processor Possible to predict worst case bus access time for a processor CPU 1 CPU 2 CPU 3 Memory Challenge 1 2 1 3 1 2 1 3 Timeslot reserved for CPU1 Round Bus (Time Division Multiplex) Design of efficient predictable systems with restricted resources. Ingo Sander (KTH) Platform-Based Design August 31, 2009 30 / 44

Towards predictable software Embedded systems are inherently parallel Parallelizing a sequential program is very difficult Software language needs to be able to express parallelism (explicit or implicit) Time is critical for many embedded systems Time needs to be a first-class citizen Communication should be deterministic Ingo Sander (KTH) Platform-Based Design August 31, 2009 31 / 44 Learn from Hardware Design! Synchronous languages (Esterel, Lustre, Signal,... ) use an implicit synchronous clock have been shown very successful for safety-critical applications Challenge Development of high-level languages for embedded systems. Many approaches for parallel software exist. However, they are often based on an asynchronous communication mechanism and not defined formally. Ingo Sander (KTH) Platform-Based Design August 31, 2009 32 / 44

Modeling at the Functional Level In the beginning of the design process the functionality of the system has to be understood and captured. Decisions about what parts shall be implemented in hardware or software are not taken yet. System shall be modeled at high abstraction level A system is usually described as heterogeneous concurrent process network In order to describe different domains, different modeling techniques are needed Ingo Sander (KTH) Platform-Based Design August 31, 2009 33 / 44 Predictable Modeling Platform A model of computation (MoC) specifies the interaction between concurrent processes Synchronous, Untimed, Continuous Time, Discrete Time Processes belonging to different models of computation communicate via domain interfaces P A 2 B P 4 P 1 MoC B MoC A P 3 A B P 5 Challenge It is of crucial importance that the semantics of each MoC is welldefined. A big challenge is a meaningful and precise definition of domain interfaces between different MoCs. Ingo Sander (KTH) Platform-Based Design August 31, 2009 34 / 44

ForSyDe ForSyDe (Formal System Design) is a design methodology for systems-on-chip, which allows to model heterogeneous systems. ForSyDe is implemented as domain specific language in Haskell. Several libraries for different models of computation exist and can be simulated as integrated model. ForSyDe processes are formally defined. ForSyDe supports modeling at different levels of abstraction. There exists a back-end for hardware design and synthesis (VHDL). High-level and synthesizable models can be co-simulated giving access to powerful test benches. Ingo Sander (KTH) Platform-Based Design August 31, 2009 35 / 44 Function Space meets Platform Space Example: Functional model uses synchronous model of computation Easy to map to synchronous software language synchronous hardware language Difficult to map to asynchronous communication mechanism Common semantic base is critical! Ingo Sander (KTH) Platform-Based Design August 31, 2009 36 / 44

Industry? Industry is in general very conservative Huge investments have been made into education of engineers tools design flow components software Any change of design process is very costly and a big risk! Evolution rather than Revolution... Challenge How can a new design paradigm find access into industry? Ingo Sander (KTH) Platform-Based Design August 31, 2009 37 / 44 Industry Acceptance: Industrial Languages SystemC SY Channel CT - SY SystemC CT VHDL SY Channel SY-SY SystemC SY Channel SY-SDF Legacy C-Code SDF SystemC Wrapper SystemC Wrapper Synchronous Data Flow Model (SDF) Continuous Time Model (CT) Synchronous Model (SY) The SYSMODEL project uses SystemC as modeling language. Modeling guidelines are developed to make the SystemC model compliant to a formal model (ForSyDe) Other languages can be imported by means of SystemC-wrappers. The whole model can still be co-simulated. Ingo Sander (KTH) Platform-Based Design August 31, 2009 38 / 44

Industry Acceptance: Refinement by Replacement SystemC SY Channel CT - SY SystemC CT Replaced by platform component VHDL SY Channel SY-SY C-Code ISS Channel SY-SDF Legacy C-Code SDF SystemC Wrapper SystemC Wrapper SystemC Wrapper Synchronous Data Flow Model (SDF) Continuous Time Model (CT) Synchronous Model (SY) The SYSMODEL project uses refinement-by-replacement A SystemC block has been refined and replaced by C-code that runs on an instruction set simulator, which belongs to the platform architecture framework. The whole model can be co-simulated. Existing software and hardware components can be used. Ingo Sander (KTH) Platform-Based Design August 31, 2009 39 / 44 Can platform-based design help us to design predictable systems? Platform-based design is a very promising approach to tackle the increasing complexity of embedded system design Challenge is to develop predictable platforms at all levels of abstraction identify predictable mappings beween platforms at different levels of abstractions Ingo Sander (KTH) Platform-Based Design August 31, 2009 40 / 44

Can platform-based design help us to design predictable systems? Since design of embedded real-time systems is very different from general-purpose computing, we need to rethink architecture of embedded systems rethink software languages introduce time (power) as first-class citizen from the start of the design process Formal methods can help a lot Design process needs to be based on a formal foundation! Ingo Sander (KTH) Platform-Based Design August 31, 2009 41 / 44 Platform-based design at KTH ForSyDe supports several models of computation and allows co-simulation tool for hardware synthesis (VHDL) exists Research on architectures with guaranteed quality of service Access to Altera FPGAs, which allow to design and implement predictable architectures KTH is in an excellent position to take platform-based design for predictable systems a few steps further! 1 Development of a predictable hardware platform for embedded software 2 Mapping of low-level ForSyDe models to platform Ingo Sander (KTH) Platform-Based Design August 31, 2009 42 / 44

Further Information More information on ForSyDe http://www.ict.kth.se/forsyde/ More information on the SYSMODEL project http://www.sysmodel.eu/ More information on platform-based design Alberto Sangiovanni-Vincentelli. Quo vadis, SLD? Reasoning about the trends and challenges of system level design. Proceedings of the IEEE, 95(3):467 506, March 2007. More information on predictable architectures Ben Lickly et al. Predictable programming on a precision timed architecture. International conference on compilers, architectures and synthesis for embedded systems (CASES 08), 2008. Ingo Sander (KTH) Platform-Based Design August 31, 2009 43 / 44 Thanks for your Attention! Do you have any Questions? Ingo Sander (KTH) Platform-Based Design August 31, 2009 44 / 44