Measuring and modelling the mechanical stress transmitted by Silicon Nitride lines on Silicon substrates P. Benzo, S. Reboh, M. J. Hÿtch, S. Schamm-Chardon, R. Cours and A. Claverie Groupe nmat, CEMES-CNRS et Université de Toulouse P. Morin, A. Halimaoui, D. Bensahel ST Microelectronics, Crolles GDR - Mecano Poitiers 8 Avril 2011
Outline - Strain engineering in MOSFET devices - Interest of Silicon Nitride lines arrays - Strain mapping by Electron Holography - Results - Scalability issues - Conclusions and perspectives
Strain engineering in MOSFET devices MOSFET Transistor J. Huang et al. Thin solid films 518 (2010) Stress enhance charge mobility in MOSFET devices
Strain engineering in MOSFET devices 3 different approaches: 1) SiGe buried substrate 2) SiGe Source and Drain Stress transmission mechanism well understood Mark Bohr, Intel 2003 3) Silicon Nitride liner Stress transmission mechanism not clear Understand the stress transmission mechanism from stressed SiN liner to Si substrate
Why Silicon Nitride liners - SiN in MOSFET as capping etch-stopping layer (CESL) - SiN tensile or compressive based on deposition method => PMOS / NMOS Study: - local stress - influence of processing parameters Preliminary study difficult because: - SiN dependence on deposition parameters - Bidimensional MOSFET geometry Need a simpler system - Different materials involved
Analyzed Structure Strained Silicon Nitride arrays on Silicon substrate SiN SiN SiN Physical properties: - SiN => PECVD + e-beam lithography Si <100> - nominal stress SiN = +1.2GPa biaxial (x,y) (wafer bending) - nominal Young s modulus SiN = 160 GPa - Substrate orientation: <100> T SiN L Tripod specimen preparation S L1 S0.14 Geometric properties (TEM): - Lines length L = 1 µm - Lines Height T SiN = 75 nm - Distance between lines S = 0.14 0.25 µm
Stress transmission mechanism Free SiN film UV SiN H Volume reduction: Hydrogen expulsion Si-Si and Si-N bonding SiN film on a Silicon substrate SiN Si Bulk prevent volume reduction of SiN: - Compressive stresses in x and y - Tensile stress in z
Methods: TEM Dark Field Holography (HoloDark) Finite Element Method (FEM) simulations FEI Tecnai 20 Objectives: - Calibrate simulations with experiments for simple structures. - Use simulations to: - Calculate stresses distribution in bulk (non-relaxed) samples - Predict stresses distribution in more complicated structures
Dark-Field Electron Holography (DFEH) Spatial resolution: 2-4 nm Field of view: 500nm x 2µm Precision: few 10-4 M.J.Hÿtch, F.Houdellier, F.Hüe and E.Snoeck, Nature 453 1086 (2008) M.J.Hÿtch, F.Houdellier, F.Hüe, E.Snoeck, French Patent Application FR N 07 6711.
Dark-Field Electron Holography (DFEH) Experiment
Dark-Field Electron Holography (DFEH) Experiment π φ g G -π
Dark-Field Electron Holography (DFEH) 2D Deformation g 1 [-2 0-2] g 2 [2 0-2] 1 u( r) = 1 1 g 2 ) a 2π [ ( r) a ( r ] G G φ g + φ 2 HoloDark 1.0 (HREM Research) by M. J. Hÿtch, C. Gatel & K. Ishizuka
Dark-Field Electron Holography (DFEH) Strain components Strain x (ε xx ) Strain z (ε zz ) 100 nm 100 nm Strain xz (ε xz ) Rotation xz (ω xz ) 100 nm 100 nm
Finite Elements Method TEM measurements are performed on thin specimen (100-200nm) Simulations before thinning process Comparison Simulations must take stress relaxation in thinning direction into account Validation relaxation Bulk Strain and stress mapping in whole bulk structure thin sample
Finite Elements Method Biaxial (x and y) initial stress 3D Simulations: SiN SiN SiN Thin sample (relaxed in y direction) Symmetry planes Bulk (non-relaxed) structure Variables: Anisotropic single-crystal Si Silicon Nitride initial stress: σ i z direction prescribed displacement Silicon Nitride Young s modulus: E
Results
Lines L1 S0.25 Simulations with σ i =1.2 GPa and E=160 GPa Simulation Vs Experiment Strain x Strain z HoloDark FEM
Lines L1 S0.25 Simulations with σ i =1.2 GPa and E=160 GPa Strain x Strain z Simulations results too high when compared to experiment Initial stress σ i too high Young s modulus too small
Lines L1 S0.25 Simulations with σ i =1.2 GPa and E=300 GPa Strain x Strain z Different couples of σ and E to reproduce experimental results Young's modulus (GPa) 400 350 300 250 200 150 0.9 1.0 1.1 1.2 1.3 1.4 Initial stress (GPa) In literature: 160GPa < E SiN < 380GPa 0.95GPa < σ SiN < 1.35GPa
Lines L1 S0.14 Simulations with σ i =1.2 GPa and E=300 GPa Strain x Strain z Simulations in good agreement with experiment also for S=140nm Simulations are calibrated on thin specimens
Calculated strain in Bulk structures Lines L1 S0.25 Simulations with σ i =1.2 GPa and E=300 GPa Strain in bulk structure ~15% higher than in thin sample
Stresses in bulk structure How much scalable is our system? x stress Stress profile in the channel equivalent region Stress xx (Pa) 1.6x10 9 S = 16 nm 1.2x10 9 S = 32 nm S = 70 nm S = 140 nm 8.0x10 8 S = 250 nm 4.0x10 8 0.0 Stress x Horizontal profile Stress yy (Pa) 8x10 8 6x10 8 4x10 8 2x10 8 0 S = 16 nm S = 32 nm S = 70 nm S = 140 nm S = 250 nm Stress y Horizontal profile -4.0x10 8 0 100 200 300 400 500 600 700 Distance (nm) x stress saturates for S<32nm -2x10 8 0 200 400 600 Distance (nm) y stress increases also for S<32nm
Conclusions - HoloDark can measure strains under the SiN lines arrays with high precision. - To simulate our experimental results different couples of values of σ i and E can be used for SiN. - If the SiN stress (measured by wafer bending) is correct (1.2GPa) our results show that SiN Young s modulus is equal to 300GPa. Variation on Young s modulus observed in literature maybe due to deposition conditions. - Stress of channel equivalent region increases in y direction when line distance (S) decreases down to 16nm. - Stress of channel equivalent region saturates in x direction if S<32 nm.
Work in progress and perspectives - Study the effect of SiN lines geometry on stress distribution (different lines length are under analysis). - Study the effect of SiN liners on more complex geometries (MOSFET geometry) to understand how the shape influences stress distribution. - Study real MOSFET devices.
Acknowledgements UTTERMOST : UlTimaTe Enablement Research on 32/28nm cmos Technologies (01/2010-12/2012) MINEFI : MINistère de l Ecomomie des Finances et de l Industrie Convention de Thèse CIFRE : Convention Industrielle de Formation par la REcherche (11/2009-10/2012)