Development of Baseline Lead-free Rework and Assembly Processes for Large Printed Circuit Assemblies

Development of Baseline Lead-free Rework and Assembly Processes for Large Printed Circuit Assemblies Patrick Roubaud 1, Jerry Gleason 2, Charlie Reynolds, Ken Lyjak 4, Matt Kelly 5, Jasbir Bath 6 1 Hewlett Packard, Grenoble, France 2 Hewlett Packard, Palo Alto, California USA IBM, East-Fishkill, New York USA 4 IBM, Research Triangle Park, rth Carolina USA 5 Celestica Inc., Toronto, Canada 6 Solectron, Milpitas, California USA Abstract A cross-company workgroup was formed to develop a baseline lead-free manufacturing process using the NEMI tin- Silver-Copper (Sn.9Ag0.6Cu) alloy for medium to high-end computer products. The primary attachment assembly and rework processes investigated by this group are illustrated in this paper along with a presentation of the reliability qualification test plan. Introduction In 1999 the prospective of a legal ban on lead in electronic goods prompted the National Electronic Manufacturing Initiative (NEMI) to recommend the lead-free alloy Sn.9Ag0.6Cu as the best available option for surface-mount reflow applications [1]. Several NEMI projects were launched to help develop the capability to manufacture lead-free Printed Circuit Assemblies (PCAs) [2]. Those studies brought a good level of confidence regarding the reliability of the lead-free solder joints formed with surface mount and wave soldering technologies. However the rework operations still represent a major technical difficulty [] because of the relatively high temperature applied to the printed circuit boards and the components. This issue is even more critical when working with relatively thick boards and multiple thermal excursions. A trans-company NEMI workgroup was created to continue to develop and verify a baseline rework process for large and thick lead-free PCAs which are characterized by components with a wide range of thermal masses on large high thermal masse cards. The workgroup is formed by 19 companies of the electronic industry and 1 university. The group started activities in 2002. The overall project was divided in phases. Phases 1 and 2, the lead-free assembly and rework process development studies, were finished toward the end of Q 200. Test boards for the process qualification (phase ) have been assembled. The accelerated thermal cycling experiments are in progress at the time of the publication of this paper. temperatures characteristic of the lead-free assembly and rework operations. It has a glass transition temperature (T g ) of 180 C and a decomposition temperature of 27 C. It was important to verify as early as possible in the study if this new laminate material was compatible with the high temperatures imposed by the lead-free assembly process and the lead-free rework process. The specification is for this material to withstand at least 6 thermal excursions to 260 C. To answer this question, we thermally stressed 7 test coupons by having an electrical current running thought a daisy chain. The coupons were 9 mils thick. The result showed that this material can resist to more than 6 thermal excursions to 260 C. This laminate material (at this time) is therefore believed to be compatible with the temperature used by our processes. Process development and test vehicles Two different kinds of boards were used to develop and qualify assembly and rework processes. The first one was used during phases 1 and 2. The second one was used for the process qualification build (phase ). Those board designs are based on existing industrial boards used for process development and qualification. They are used to work on the challenges encountered when dealing with fairly large and thick boards carrying a variety of component types including SMT and PTH components, big array packages, leaded packages, small and large passives and various kind of connectors. During the course of the overall study a total of about 900 boards have been built. Table 1 summarizes some of their characteristics and a picture of the qualification board can be seen in Figure 1. High T g Laminate Material The laminate material used for our study is a fairly new material, designed to sustain the high

assembly process has been achieved before the build of the test boards. Figure 1 Top and bottom sides of the process qualification board. Table 1 Some characteristics of the boards used for this study Development board Qualification board Thickness 2. mm 2. and.4 mm Dimensions 0 x 254 mm 42 x 178 mm Number of 2 14 copper layers T g 180 C 180 C Decomposition 27 C 27 C temperature Surface finish OSP and ENIG Electrolytic Ni- Au and immersion Ag Each site of the qualification board has copper traces that follow a daisy chain pattern to enable electrical continuity inspection when daisy chained components are used. Assembly process (phase 1) Both Surface Mount Technology (SMT) and wave soldering processes were investigated by the NEMI workgroup. SMT Process The SMT process was developed with the main objective to determine the process window for the reflow temperature that yields acceptable lead-free joint formation. A constraint the group gave to itself was to use in-line processing configurations and process time windows compatible with industrial throughputs. An additional goal was to minimize the temperature gradient across the second level assembly during the SMT reflow process. As with previous work [4], component temperatures (body and joint), along with temperature gradient information were communicated to JEDEC to assist in updating the specification J-STD-02B. The process was finalized at manufacturing locations to ensure that a robust The lead-free SMT process developed gave a yield close to 95% which was comparable with the yield obtained with the paste. The peak temperatures were recorded at 248ºC for the.4 mm thick boards and 24ºC for the 2. mm thick board. For comparison, the peak temperatures recorded for the process were 210 and 211ºC respectively. The temperature gradient across the board was 14ºC and most of it was due to the presence of ceramic packages. The biggest challenge was to minimize the temperature gradient across the board while keeping the process time at a reasonable level. For the leadfree.4 mm thick board, the time above liquidus was between 90 and 120 seconds. The overall cycle time was 8 minutes. The thermal profile can be seen on Figure 2. Figure 2 SMT thermal profile, Qualification board,.4 mm thick, top side, lead-free. Wave soldering process Given the small amount of data available regarding the lead-free wave soldering process, gaining knowledge on the process fundamentals was the primary focus here. Both conventional and selective wave soldering processes were investigated. The objectives were to define and optimize the process window by determining acceptable temperature ranges for the lead-free wave solder process. As with the SMT process, the impact of differences between surface finish and board thickness were quantified. The defects recorded on PTH components by visual inspection were: - solder skips - Insufficient solder - solder bridging - lifted connectors Rework Process (phase 2) The rework process was performed at production sites, using production rework tools.

Reworking large lead-free BGAs on thick boards is difficult because of the high temperatures involved. The solder joint time over reflow (217 C) must be between 45 and 90 seconds. Practically, we found a necessity to have a minimum solder joint temperature of 20-25 C to ensure good wetting. The current J- STD-020B standard is calling for a maximum body temperature of 245-250 C for the larger components. The margin of error to maintain a lead-free minimum solder joint temperature of 20-25 C with a body temperature of 245-250 C is very tight. For comparison, when using the paste the thermal window is two times larger with a temperature having to be somewhere between 200 and 240 C. It was found that increasing the bottom side board preheat was effective in reducing the temperature gradient between the solder joint and the component body. Figure shows a schematic of the apparatus used. The thermal profile used for the CBGA is presented in Figure 4. Figure 5 illustrates CBGA solder joints after the rework operation. Thermocouple Locations zzle Pick-up Tool Adjacent Component PCB Air Flow Bottom Heater Figure - Rework setup used to minimize the temperature gradient between the solder joint and component body. Courtesy: Gowda et al. (SUNY- Binghamton, Universal Instruments) [] Figure 4 Thermal profile for the rework of the lead-free CBGA on a.4 mm thick board. Time above liquidus: 66 seconds. Solder joint temperature: 25 C. Top of the package temperature: 28 C Figures 5 PBGA solder joints after rework. Top view: solder joints. Bottom view: Sn-Ag-Cu solder joints. Another difficulty was the excessive temperature reached by components adjacent to the rework area. In some cases it was not possible to avoid a partial reflow of some adjacent solder joints. For example, it was noticed that a CBGA seems to undergo partial double reflow during the rework of an adjacent micro- BGA. As one can see on Table 2, the issue of high adjacent temperatures is more acute with the lead-free rework process and with the thicker boards. The impact on the reliability will be evaluated and presented in a future paper. Table 2 recorded rework cycle length and temperatures for the 544 PBGA 2. mm.4 mm Pb-free 2. mm Thermal profile time length Minimum peak solder joint temperature Component top temperature Pb-free.4 mm 40 sec 60 sec 42 sec 468 sec 202ºC 201ºC 24ºC 2ºC 217ºC 217ºC 245ºC 245ºC

Temperature at.8 mm from the PBGA 217ºC 227ºC 217ºC 227ºC Reliability qualification phase (phase ) The goal of the qualification phase is to evaluate the impact of: - the solder paste alloy ( or Sn-Ag-Cu), - the rework operation, - the PCB thickness, - the nature of the PCB surface finish, on the reliability of the solder joints. The reliability evaluation phase is organized around 2 tests: an accelerated thermal test (ATC) and a mechanical bend test. The ATC was selected because it is a test widely used among the industry to characterize the solder joint resistance to thermal fatigue. In addition some ATC studies [5] [6] [7] on large lead-free array packages similar to ours already have been published and provide comparison points. The bend test enables a qualitative comparison of the mechanical resistance of the lead-free and tin-lead BGA packages. It was selected over other mechanical tests because some experience was already gathered in the previous NEMI lead-free study. 100 test boards were assembled for the reliability experiments. Three parameters were varied in these test vehicles: - Solder paste alloy (Sn-Ag-Cu and ). - Thickness of the PCB: 2. mm or.4 mm. - PCB surface finishes: electrolytic or immersion Ag. 50 boards were sent thought the rework process. A certain number of boards were cross-sectioned to assess the microstructure of the joints and the remainder was sorted between the ATC and the bend test experiments. The Table shows the dispositions of the boards between the various cells. The test board is carrying a number of different components; for this study the team elected to focus on the components listed in Table 4. The main goal is to cover a broad variety of solder joints (balls, leads, through-hole pins). Another goal is to include large array packages as they are often found on this kind of board and are challenging to assemble and to rework. Table disposition of the 100 test boards As Reworked Total assembled Micrographic 10 10 20 study ATC 28 28 56 Bend test 12 12 24 Total 50 50 100 Table 4 Components selected for the reliability study Component Characteristic CBGA 2.5 x 2.5 mm, 97 I/O, 1 mm pitch TSOP 48 I/O Micro BGA 17 x 17 mm, 256 I/O, 1 mm pitch PBGA 5 x 5 mm, 544 I/O, 1.27 mm pitch DIP 16 I/O 2512 resistor DIMM Connector 278 pins, 1 mm pitch ATC The ATC experiment is following the JEDEC JESD22-A104B recommendations. As shown in Figure 6, the actual thermal profile maximum and minimum temperatures were recorded at 104ºC and - 6ºC. Each cycle is 42 minutes long. 104-6 Temperature (Degree Celsius) Time (Minutes) Figure 6 - ATC thermal profile for the test chamber carrying the as-assembled boards The 56 test boards are divided in 10 cells. The Table 5 shows the various cells parameters. Table 5 Design of the ATC experiment Cell Paste Thickness (mm) Rework Surface finish # of boards 1.4 4 2.4 4 2. 4 4 2. 4 5.4 8 6.4 8 7 2. 8 8 2. 8 9 2. Imm-Ag 4 10 2. Imm-Ag 4 Total 56 Two Thermotron thermal chambers with 1 cubic meter capacity and equipped with HP data acquisition systems were used for the ATC experiment. The first chamber is for the as assembled condition and the second one for the after rework condition. Pictures of a chamber can be seen in Figure 7. At the time of the writing of this paper, the tests are on-going and will be stopped after 6000 cycles. As of early May 2004, the as assembled boards have been cycled 42

4500 times and the after rework ones have been cycled 2000 times. on the results. For example, for the CBGA component (as assembled condition) N2 is on average 110% the value of N1 if assembled with solder paste but 10% if assembled with lead-free solder paste. So if N2 is selected, the relative performance of the CBGA assembled with lead-free paste will appear to be better than if N1 is selected. More investigations will be carried to determine if this effect can be generalized to other components. Electrical resistance First open Slope Change N1 N2 Number of cycles Figure 7 ATC experimental setting. Top view: the two thermal chamber used for the experiment. Bottom view: inside one of the chambers. A total of 952 (2 x 476) components were individually monitored. The component types monitored are the CBGA 97, the PBGA 544, the micro BGA 256, the TSOP 48 and the DIP 16. In total, the electrical resistances of 952 components are individually and continuously monitored by the data acquisition systems. After the completion of the 6000 cycles, the boards will be pulled out of the chamber and the components will be cross-sectioned to assess the failure modes. There are different criteria one can use to declare a component as failed. As fatigue cracks propagate through a solder joint, the electrical resistance of the joint will increase. Eventually the crack will go all the way through and the electrical connection will be cut out. A component can be declared failed as soon as the electrical resistance starts to increase or when the open occurs or following another criterion for example a 50% increase of the electrical resistance. In the first case, N1 will be recorded as the number of cycles to failure (see Figure 8) and N2 will be recorded if the first open criteria is elected. We found that this choice can have a significant impact Figure 8 evolution of the electrical resistance versus the number of cycles. Depending on the criteria chosen ( slope change or first open ), the number of cycles to failure will vary. Bend Test The aim of the bend test is to compare the mechanical resistance of the solder joints for the CBGA and the PBGA components. We want to compare the components assembled using the leadfree paste against the one assembled with and the reworked components against the as assembled. The design of this experiment is provided in Table 6. Table 6 Design of the bend test experiment Cell Paste Thickness (mm) Rework Surface finish # of boards 1 2 4 5 6 7 8 Total.4.4 2. 2..4.4 2. 2. 24 A schematic of the bend test experiment is shown in Figure 9. The PCB is cut around the PBGA and the CBGA to make the test coupon. Surrounding parts around those components will be mechanically

removed for the bend test machine to have a safe grip on the coupon. Total Load Deflection Monitoring Figure 9 Schematic of the bend test experiment A 4-point bend test was preferred to a -point bend test in order to have a constant curvature radius across the length of the test coupon and a uniform load on the tested component. The experiment will be run at room temperature. As of early May 2004, the bend test experiment is on-going. Conclusion An assembly and rework process for medium to highend lead-free computer products has been developed by a cross-company NEMI workgroup. Close to 900 PCAs have been assembled, including 100 qualification boards, using existing industrial equipment and procedures. The temperatures ranges requested by the JEDEC J-STD-02B standard were respected. The initial lead-free SMT process gave acceptable yields but more development needs to be done for the wave solder process. During the rework development it was found that increasing the bottom side board preheat was helpful in keeping the temperature gradients under control during the rework operations. The many challenges that face lead-free rework include process tool thermal stability and operational capability. Much learning is still required to improve the manufacturability and reduce the cost associated with inspection and yield loss. The NEMI workgroup is now conducting a reliability qualification experiment with the aim to quantify the impact of the solder type, the rework, the board thickness and the board surface finish. As of early May 2004, 952 components are currently tested for thermal fatigue resistance as part of this investigation. A study on the mechanical resistance of large CBGA and PBGA is underway. [1] Research update: Lead-Free Solder Alternatives, Jasbir Bath, Carol Handwerker, Edwin Bradley, Circuit Assembly, May 2000, pp 1-40 [2] Are Lead-Free Solder Joints Reliable?, John E. Sohn, Circuit Assembly, June 2002, pp2-5 [] Lead-free rework process for chip scale packages, A. Gowda, K. Srihari, A. Primavera, Advanced Packaging Technologies in the Electronics Industry Conference, Boston, Massachusetts, June 2001, pp.99-106 [4] Component Temperature Study On Tin-Lead and Lead-Free Assemblies, Matthew Kelly, Duilio Colnago, Vittorio Sirtori, Jasbir Bath, Suan Kee Tan, Lai Hook Teo, Curtis Grosskopf, Ken Lykak, Charles Ravenelle, Eddie Kobeda, SMTAI 2002 [5] Board level reliability of lead free packages, Swaminath Prasad, Flynn Carson, G.S. Kim, J.S. Lee, Patrick Roubaud, Gregory Henshall, Robert herber, Ronald Bullwith, SMTAI sept 26-28 2000 Chicago [6] Thermomechanical Fatigue Behavior of Selected Lead-Free Solders, James Bartelo et al, APEX 2001, LF2-1 [7] Thermo-Mechanical Fatigue Reliability of Leadfree Ceramic Ball Grid Arrays: Experimental Data and Lifetime Prediction Modeling., Mukta Farooq, Lewis Goldman, Gregory Martin, Charles Goldsmith, Christian Bergeron, ECTC May 200 New Orleans, pp 827-8 Acknowledgments The authors would like to gratefully thank all the participants of the NEMI lead-free assembly and rework project. The authors wish to acknowledge the management support provided by Agilent, Celestica, ChipPAC, Cisco, CMAP, Cookson, Dell, Delphi, EIT, HP, IBM, Intel, Jabil, Lace, rtel, Sanmina- SCI, Solectron, Teradyne, T.I. and Vitronics-Soltec. References