Surface MEMS Fabrication Details Dr. Lynn Fuller, Adam Wardas, Casey Gonta, Patsy Cadareanu

ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Surface MEMS Fabrication Details Dr. Lynn Fuller, Adam Wardas, Casey Gonta, Patsy Cadareanu Webpage: http://people.rit.edu/lffeee 82 Lomb Memorial Drive Rochester, NY 14623-5604 Email: Lynn.Fuller@rit.edu Department webpage: http://www.rit.edu/kgcoe/microelectronic 11-1-2017 SurfaceMEMsFabricationDetails2017.ppt Page 1

OUTLINE Introduction Device Cross Section Maskmaking Stepper Jobs Fabrication Details Signal Processing Packaging Testing Summary References Homework Page 2

INTRODUCTION This document provides detailed information on RIT s surface micromachine process. This process is capable of making many different types of MEMS devices. This MEMS fabrication process is CMOS compatible (with some modifications) back end module that can be added to realize compact microsystems (CMOS plus MEMS). This version is a simplified 4 or 5 photo level process to take advantage of 4 levels per plate maskmaking and to minimize the time to fabricate the devices. Page 3

GENERIC DEVICE CROSS SECTION Metal Layer Sacrificial Layer Field Oxide Bottom Poly Starting Wafer Bottom Poly 1 (Red) Layer 1 Sacrificial Oxide (Blue Outline) Layer 2 Contact Cut (White) Layer 6 Metal (Blue) Layer 7 Outline (Yellow Outline) Layer 9 Outline is only for layout, drawing a 4.5mm by 4.5mm outline, the maximum area for individual device designs. Page 4

10 mm MEMS MULTICHIP PROJECT TEMPLATE Total 10 mm by 10 mm including 1 mm for sawing into 4 chips. Wafer sawing is easier if all chips are the same size 4.5mm by 4.5mm design space for each project 4 different projects 5 mm Page 5

10 mm MEMS MULTICHIP PROJECT TEMPLATE Total 10 mm by 10 mm including 1 mm for sawing into 4 chips. Wafer sawing is easier if all chips are the same size Your Design 4.5mm by 4.5mm design space for each project 4 different projects 5 mm Page 6

10 mm 2017 MULTICHIP PROJECT FINAL LAYOUT Total 10 mm by 10 mm including 1 mm for sawing into 4 4.5mm by 4.5 mm chips. Page 7

MASK ORDER FORM Dr Fuller RIT MEMS-2017-Final.gds 4 10mm x 10mm x X yes, 4 levels per plate Page 8

MASK ORDER FORM DETAILS Reticle Number Reticle Name Design Layer.gds # s Boolean Function Dark/ Clear Comment 1 Poly1 1 None Clear Mirror 2 Cut 6 6 Inverted Dark Mirror 3 SacOx 2 None Clear Mirror 4 Metal 7 None Clear Mirror Design Layer 9 Out (outline) is not used. It is only for placement of projects on the multi-project reticle template. Page 9

SURFACE MEMS 2017 FABRICATION PROCESS 1. Starting wafer 2. PH03 level 0, Marks 3. ET29 Zero Etch 4. ID01-Scribe Wafer ID, D1 5. ET07 Resist Strip, Recipe FF 6. CL01 RCA clean 7. OX04 6500Å Oxide Tube 1 8. CV01 LPCVD Poly 5000Å 9. IM01 Implant P31, 2E16, 100KeV 10. PH03 level 1 Poly 11. ET08 Poly Etch 12. ET07 Resist Strip, Recipe FF 13. CL01- RCA Clean 14. OX05 700Å Dry Oxide 15. PH03 level 2 Contact Cut 16. ET29 Etch Oxide 17. ET07 - Resist Strip, Recipe FF 18. CL01 RCA Clean 19. PH03 level 3 Sac Layer Define 20. ETXX HF Dip 21. ME01 Metal Deposition - Al 22. PH03 level 4 Metal -2um 23. ET55 Metal Etch wet etch 24. SAW1 Saw wafers ½ way through 24. ET07 Resist Strip and Release, wet? 25. TE01 wafer level testing 26. Packaging and Testing 27. SEM1 Pictures and videos 11-1-17 Page 10

STARTING WAFER SCRIBE ID01 Starting Wafer Page 11

SSI COAT AND DEVELOP TRACK FOR 6 WAFERS Use Recipe: COAT.rcp and DEVELOP.rcp Page 12

RECIPES FOR RESIST COAT AND DEVELOP Level Level Name Resist Coat Recipe Develop Recipe Resist Thickness 0 Zero OIR-620 Coat Develop 1.0um 1 Poly 1 OIR-620 Coat Develop 1.0um 2 CC OIR-620 Coat Develop 1.0um 3 Sac Layer S1827 MEMSCOAT1 MEMSDEV1 3.0um 4 Metal 1 S1827 MEMSCOAT2 Hand Develop 4.5um Sacrificial Layer Metal MEMSCOAT1.rcp 4000rpm, 30sec, Hand Dispense, 110 C, 1min Exposure for S1827, 525mj/cm2, Focus +2.0, NA=0.48, s=0.45 MEMSDEV.rcp has 200 second develop time, hardbake 140 C MEMSCOAT2.rcp no HMDS, 2500rpm, 30sec, Hand Dispense, 110 C, 1min, Exposure for S1827, 525mj/cm2, Focus +2.0, NA=0.48, s=0.45, Hand Develop, no hardbake, no HMDS, Page 13

PHOTORESIST PROCESSING DEHYDRATE BAKE/ HMDS PRIMING COAT.RCP SPIN COAT SOFT BAKE HMDS Vapor Prime 140 C, 60 sec. OIR 620-10 Resist 3250rpm, 30 sec. 90 C 60 sec. POST EXPOSURE BAKE 110 C, 60 sec. DEVELOP.RCP DEVELOP DI Wet CD-26 Developer 48sec. Puddle, 30sec. Rinse, 30sec., 3750rpm Spin Dry HARD BAKE 120 C, 60 sec. Page 14

ASML 5500/200 NA = 0.48 to 0.60 variable s= 0.35 to 0.85 variable With Variable Kohler, or Variable Annular illumination Resolution = K1 l/na = ~ 0.35µm for NA=0.6, s =0.85 Depth of Focus = k 2 l/(na) 2 = 1.0 µm for NA = 0.6 i-line Stepper l = 365 nm 22 x 27 mm Field Size Page 15

STEPPER JOB Mask Barcode: Stepper Jobname: MCEE770-MEMS4X Level 0 (combi reticle) Level Clearout (combi reticle) Level Poly 1 Level CC Level SacOx Level Metal Level MEMS-Test (no alignment) After photo prior to etch inspect the alignment marks. They have to be perfect. If not rework the photo step. Page 16

DRYTEK QUAD RIE TOOL Page 17

ZERO ETCH FOR ASML ALIGNMENT MARKS Recipe Name: ZEROETCH Chamber 3 Power 200W Pressure 100 mtorr Gas 1 CHF3 50 sccm Gas 2 CF4 25 sccm Gas 3 Ar 0 sccm Gas 4 O2 10 sccm Max Time = 120 seconds Silicon Etch Rate 650 Å/min 8.8 um L/S 8 um L/S Page 18

SCRIBE WAFER WITH ID NUMBER D1 Back Scribe on back of wafer near the wafer flat ID numbers D1, D2 etc. Front Wafer has alignment marks etched in two locations. Page 19

ASHER, SCRIBE, RCA CLEAN & SRD O2 + Energy = 2 O O is reactive and will combine with plastics, wood, carbon, photoresist, etc. Gassonics Asher Recipe FF RCA Clean Bench Page 20

RCA CLEAN APM NH 4 OH - 1part H 2 O 2-1parts H 2 O - 17parts 70 C, 15 min. DI water rinse, 5 min. DI water rinse, 5 min. HPM HCL - 1part H 2 O 2-1parts H 2 O - 17parts 70 C, 15 min. H 2 0-50 HF - 1 30 sec. DI water rinse, 5 min. SPIN/RINSE DRY Page 21

USING EXCEL SPREADSHEET FOR OXIDE GROWTH CALCULATIONS These spreadsheets are available on Dr. Fullers webpage. Page 22

BRUCE FURNACE RECIPE 406 WET OXIDE 6,500Å Recipe #406 1100 C Boat Out Boat In Boat Out Load Push Stabilize Ramp-Up Soak Anneal Ramp-Down Pull 800 C 800 C 800 C 25 C Interval 0 Interval 1 Interval 2 Interval 3 Interval 4 Interval 5 Interval 6 Interval 7 Interval 8 Any 0 lpm none 12 min 15 min 30 min 5 min 65 min 5 min 60 min 12 min 10 lpm 10 lpm 5 lpm 5 lpm 3.6/2 lpm 15 lpm 10 lpm 15 lpm N2 N2 N2 O2 O2/H2 N2 N2 N2 At the end of a run the furnace returns to Interval 0 which is set for boat out, 25 C and no gas flow. The furnace waits in that state until someone aborts the current recipe or loads a new recipe. Wet Oxide Growth, Target 6,500 Å, Tube 1 Page 23

BRUCE FURNACE Tube 1 Tube 2 Tube 3 Tube 1 Steam Oxides Tube 2 P-type Diffusion Tube 3 N-type Diffusion Tube 4 Dry Oxides and Gate Oxides Tube 4 Page 24

TENCORE FT-300 SPECROMAP Record: Mean Std Deviation Min Max No of Points Page 25

AFTER 6500Å OXIDE GROWTH 6500 Å Starting Wafer Page 26

Poly Target 5000A LPCVD, 610C, Rate ~64Å/min Time~78 min Do not use log sheet for rate/time DEPOSIT POLYSILICON Recipe POLY 610 Temp = 610 C Pressure = 300 mtorr Silane Flow = 100 sccm Substrate Page 27

POLYSILICON DOPING Substrate Ion Implant P31 Dose = 2E16 cm-2 Energy = 100KeV Time ~20min at 400 µa Page 28

SSI COAT AND DEVELOP TRACK FOR 6 WAFERS Use Recipe: Coat.rcp and Develop.rcp Page 29

STEPPER JOB Mask Barcode: Stepper Jobname: MCEE770-MEMS4X Level 0 (combi reticle) Level Clearout (combi reticle) Level Poly 1 Level CC Level SacOx Level Metal Level MEMS-Test (no alignment) Page 32

AFTER PHOTORESIST COAT, EXPOSE & DEVELOP Page 33

AFTER POLY1 ETCH 5000Å Poly Drytek Quad Recipe FACPOLY Etch Rate ~1150Å/min Page 34

2 OF 4 CHAMBERS IN THE DRYTEK QUAD RIE TOOL Page 35

PLASMA ETCHING IN THE DRYTEK QUAD Page 36

ANISOTROPIC POLY GATE ETCH RECIPE Anisotropic Poly Gate Etch Recipe SF6 30 sccm, CHF3 30 sccm, O2 5 sccm, RF Power 160 w, Pressure 40 mtorr, 1900 A/min (Anisotropic), Resist Etch Rate 300 A/min, Oxide Etch Rate 200 A/min Recipe Name: FACPOLY Step 2 Chamber 2 Power 160 watts Pressure 40 mtorr Gas SF6 Flow 30 sccm Gas CHF3 Flow 30 sccm Gas O2 Flow 5 sccm Poly Etch Rate 1150 Å/min Photoresist Etch Rate: 300 Å/min Oxide Etch Rate: 200 Å/min Endpoint See Video https://people.rit.edu/lffeee/videos.htm Page 37

STRIP RESIST, RCA CLEAN Page 38

GROW 700Å DRY OXIDE This oxide is to insulate the poly so that metal can cross poly and not make connection. Page 39

BRUCE FURNACE RECIPE 270 700Å DRY OXIDE Recipe #270 1000 C Verified: 3-1-04 Boat Out Boat In Boat Out Load Push Stabilize Ramp-Up Soak Anneal Ramp-Down Pull 800 C 800 C 800 C 25 C Interval 0 Interval 1 Interval 2 Interval 3 Interval 4 Interval 5 Interval 6 Interval 7 Any 0 lpm none 12 min 15 min 20 min 93 min 5 min 40 min 15 min 10 lpm 10 lmp 5 lpm 10 lpm 15 lpm 10 lpm 5 lpm N2 N2 O2 O2/ N2 N2 N2 At the end of a run the furnace returns to Interval 0 which is set for boat out, 25 C and no gas flow. The furnace waits in that state until someone aborts the current recipe or loads a new recipe. Dry Oxide Growth, Target 700 Å Page 40

AFTER CUT PHOTO AND BOE ETCH Substrate Page 42

Lithographic overlay and resolution test structure TEST STRUCTURES Electrical Tests: Resistance Sheet Resistance Contact Resistance Page 43

RESIST STRIP Substrate Page 44

STEPPER JOB Mask Barcode: Stepper Jobname: MCEE770-MEMS4X Level 0 (combi reticle) Level Clearout (combi reticle) Level Poly 1 Level CC Level Sac Layer Level Metal Level MEMS-Test (no alignment) Page 45

RECIPES FOR RESIST COAT AND DEVELOP Level Sacrificial Layer Level Name Resist Coat Recipe Develop Recipe Resist Thickness 0 Zero OIR-620 Coat Develop 1.0um 1 Poly 1 OIR-620 Coat Develop 1.0um 2 CC OIR-620 Coat Develop 1.0um 3 Sac Layer S1827 MEMSCOAT1 MEMSDEV1 3.0um 4 Metal 1 S1827 MEMSCOAT2 Hand Develop 4.5um MEMSCOAT1.rcp 4000rpm, 30sec, Hand Dispense, 110 C, 1min Exposure for S1827, 525mj/cm2, Focus +2.0, NA=0.48, s=0.45 Then Flood expose wafer edge using black transparency mask then MEMSDEV.rcp, 200 second develop time, hardbake 140 C Metal MEMSCOAT2.rcp no HMDS, 2500rpm, 30sec, Hand Dispense, 110 C, 1min, Exposure for S1827, 525mj/cm2, Focus +2.0, NA=0.48, s=0.45, Hand Develop, no hardbake, no HMDS, Page 46

BLACK PLASTIC MASK FLOOD EXPOSE WAFER EDGE Page 47

AFTER SAC LAYER PHOTO AND DEVELOP Substrate Page 48

PRE METAL HF DIP H 2 0-50 HF - 1 30 sec. DI water rinse, 5 min. SPIN/RINSE DRY Page 49

SPUTTER ALUMINUM CVC 601 Sputter Tool (no radiant heating during pump down) Pressure = 5mTorr Power = 2000 Watts Time = 50 min Thickness = ~ 1.5um Page 50

METAL DEPOSITION Substrate Page 51

METAL PHOTO Substrate Page 53

METAL ETCH Substrate Page 54

K&S 780 WAFER SAW Saw ½ way through wafer. Page 55

WAFER SAW RECIPE Block 01 - Align on 3 nd cut at top of bottom chip, no cuts but shift by -10mm after align Height 0.80000mm Cut Depth 0.5000mm (leaving 0.3000 mm of wafer uncut) Number of cuts = 0000 Block 02 - X cuts (horizontal cuts parallel to wafer flat) Height 0.80000mm Cut Depth 0.5000mm (leaving 0.3000 mm of wafer uncut) Number of cuts = 0027 Block 03 - Align on 3 rd at the top of bottom chip, no cuts but shift by -10mm after align Height 0.80000mm Cut Depth 0.5000mm (leaving 0.3000 mm of wafer uncut) Number of cuts = 0000 Block 04 - Y cuts (vertical cuts perpendicular to the wafer flat) Height 0.80000mm Cut Depth 0.5000mm (leaving 0.3000 mm of wafer uncut) Number of cuts = 0027 other parameters on next page. Page 56

SAW RECIPE OTHER PARAMETERS Blade Exposure 7.4922 Auto Height Rate 499 Spindle speed 20,000 Angle 0.0 Start Cut -33.4 Cut Length 175.00 Index?? Cut Count?? X entry speed 2.0 X cutting speed 3.0 Z speed 0.3 Page 57

AFTER SAWING AND REMOVAL OF GOOD CHIPS Wafer Sawing Movie Page 58

WAFER AFTER SAWING READY FOR RELEASE Page 59

RESIST STRIP AND RELEASE Substrate Acetone Isopropyl Alcohol Slow Pull or Low power O2 plasma Page 60

TEST EQUIPMENT Manual Prober Page 61

SINGLE RESISTOR SENSOR AMPLIFIER DESIGN +V R1 267 - + +V -V R4 - + +V -V Vout -V 0.00004%/ C with gain of 1000 and 100C Page 62

SINGLE SUPPLY OSCILLATOR (MULTIVIBRATOR) R1 V T R3 + - R2 +V +V Vo +V 0 Vo t1 t C R Let R1 = 100K, R2=R3=100K and +V = 3.3 Then V T = 2.2 when Vo = 3.3 V T = 1.1 when Vo = 0 Page 63

UNIVERSAL PUMP & FLOW SENSOR ASSEMBLY 1 by 3 PCB 0.0125 thick with 0.005 copper Hose nipples Plastic cover Pin strip header Page 64

CROSSECTION 1 by 3 PCB 0.0125 thick with 0.005 copper Photoresist (film) channel walls Thickness 50µm to 150µm Hose nipples Thermosetting Glue on Plastic cover Pin strip header MEMS chip mounted flush with PCB surface, wire bonds from MEMS chip to copper traces Page 65

AFTER WIRE BONDS, HEADER AND NIPPLES Page 66

CLEAR FIELD MASKS Need dark field masks for Anchor or CC Otherwise use negative resist Page 67

USING NEGATIVE RESIST 1. Coat wafers with n-lof-2020 Image Reversal Resist, Use COATNLOF recipe on the SSI track HMDS prime: 140C, Dispense for 30s, Prime for 60s Manually dispense photoresist Spin at 2500 RPM, Spin for 60s, Thickness ~2100nm = 2.1um Soft Bake at 110C, Bake for 60s 2. Expose on the ASML Stepper use same mask as for etch process (clear field) Dose = 66 mj/cm 2 i-line (365nm), Focus = 0, NA = 0.60, Sigma=0.625 3. Develop on SSI Track using recipe DEVNLOF PEB (Image Reversal Bake) at 110C for 60s Spin and dispense developer for 5s, Dispense developer for 5s, Puddle develop for 70s, Spin and rinse for 30s at 1000 RPM. Spin dry for 30s at 3750 RPM, Do not hard bake. It can damage the sidewall profile. Hard Bake time = 0s 4. Etch 5. Remove Photoresist Page 68

USING NEGATIVE RESIST Page 69

SUMMARY This project allows students to see the entire process for design, fabrication, packaging and testing of a MEMS based Microsystem. Page 70

1. Dr. Lynn Fuller s webpage 2. more REFERENCES Page 71

HOMEWORK FABRICATION DETAILS 1. Draw a series of pictures that show the crossection and layout for your design project. From starting wafer to test. Not all of the steps but for most of the steps. 2. Provide a list of all recipes and a short description. 3. What data should be collected ie. at step 7 record oxide thickness, at step 9 take picture of resolution, at step?.. 4. Discuss how your device will be packaged. 5. Discuss how the devices you make will be tested. Describe any electronic circuits Page 72