CSP Die Shrink Solution for Memory Devices

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1 CSP Die Shrink Solution for Memory Devices Young G. Kim, Nader Gamini, and Craig Mitchell Abstract The purpose of this study was to show the effectiveness of die shrink as a package solution for memory devices. In the case of the 8mm x 10mm Direct Rambus DRAM device, about 350 dies can be obtained from a single 8-inch wafer. The 85% linear shrink (15% shrink in both x and y-directions) allows an additional 150 dies from the same size wafer. This simple calculation explains the importance of die shrink. There are two basic requirements for the die shrink package solution. First, the footprint of the new package must be the same as that of the earlier package because a mounting board with multiple devices on it can not be changed to accommodate the footprint change of single device. Second, the test socket for the new package must be the same or compatible with minimal modification because the delivery time and expense for new sockets for test and burn-in are significant. In this paper, the CSP die shrink solution will be limited to a discussion of the µbga package only. There are two different types of µbga CSP: a package for peripheral pad die and a package for center pad die. Each type has its own package solutions for the die shrink problem. Flash, SRAM, and 64/72M Direct RDRAM are devices with peripheral bonding pads. For this study, a 6 x 8 ball matrix was used. The majority of conventional DRAMs, 128/144M and 256M Direct RDRAM are devices with a center bonding pad. A 8 x 15 ball matrix with two-row depopulation was used for the case study [1]. A total of 13 package configurations were evaluated and proposed as viable design solutions. The assembly process, package material, test, and reliability are discussed for each package configuration. Introduction The Direct RDRAM is expected to be the major DRAM device by the year 2000 [2]. To achieve its high-speed operation of as high as 1.6 gigabytes per second, the package parasitics must be well controlled [3]. The demands of portable electronics have also imposed the requirement of smaller size with high mounting density. In terms of electrical performance and package size, flip-chip or wafer level package might be the best solutions, however, these technologies have limitations in their footprint compatibility with die shrinks because no balls can be placed outside of the die perimeter. If the package uses a fine pitch ball matrix from the beginning, the problems are transferred to the mounting board design and its manufacturing cost. The chip-scale package (CSP) was identified as a reasonable trade-off between conventional packages and flip-chip type packages. µbga package has excellent electrical performance and is an ideal size for a chip-scale package. However, the die shrink solution has caused concern among some package designers. The objective of this paper is to describe the µbga package die shrink solution as designed especially for Direct RDRAM, Flash, and SRAM. The total cost of package assembly, test, and surface mounting is strongly affected by the ball pitch of the package. At this moment, ball pitches of 0.75mm or 0.8mm are cost effective. For this paper, 0.75mm ball pitch was assumed for all the case studies. Depending on the location of the die bonding pad, the package designs are classified into two groups: Design C# and Design P#. Here, "C" signifies center pad die and "P" signifies peripheral die pad. Direct Rambus DRAM and µbga CSP Direct Rambus DRAMs addresses the need for additional bandwidth brought about by the rapidly increasing demands of CPUs and applications such as 3D and DVD. RDRAMs, which will replace SDRAMs in PC main memory starting in 1999, provide 1.6 gigabytes per second bandwidth (800MHz data rate) at high efficiency. To help achieve such performance levels, RDRAMs will be packaged in CSPs mm 0.8 mm 0.75 mm 1.0 mm Figure 1: Direct RDRAM die with edge pad (64/72M, upper) and die with center pad (128/144M, lower). CSPs offer superior electrical characteristics, as well as significant space savings, which will enable higher module

2 densities. CSPs are shipping in production volumes today for Flash and SRAM applications and will soon reach cost-parity with TSOP packages which are currently used for SDRAMs. Tessera s µbga package was chosen as the "Reference CSP Package" by Rambus for several reasons, including electrical performance, packaging foundry support, qualification by industry leaders, and multiple licensees. A potential disadvantage with µbga package, and many other CSP technologies, is that in most cases the chip itself is the "backbone" of the package. Therefore, as die shrink, maintaining the same footprint could be a problem as solder balls may fall outside the die periphery. Memory chip manufacturers look toward die shrinks to reduce component costs. As a result, any memory chip package must accommodate a range of die sizes while meeting system developers need for a single PCB footprint. In the case of RDRAMs several solutions have been found to address this issue. When Rambus defines the ball-out for RDRAMs, an adequate margin is left around the ball matrix to allow for some chip shrinking. The fact that suppliers are planning on quickly moving to higher-density RDRAMs is not necessarily a solution, but a trend that is alleviating the need for a solution. As they switch from 72M to 144M, for example, much more silicone area is available to support the solder balls. Figure 1 (upper) shows a typical Direct RDRAM die with edge-bond pad. The package for a 64/72M die uses a 0.75mm solder ball pitch with 74 balls. The ball matrix itself is 16 x 7, but 38 balls were depopulated. The far left and right columns (four-balls) can be eliminated for 64M device packaging. The die shrink problem can be solved without any overhang balls. The general die shrink solution for the peripheral die pad device using Test Die A are shown in Figure 2. The 128/144M Direct RDRAM die and corresponding ball ball matrix is shown in Figure 1 (lower). The major difference between this and the earlier generation device is die pad location. Package parasitics are reduced by the center pad structure, which allows fewer solder balls for ground and power. At the same time, the ball pitch has been increased to 1.0mm x 0.8mm, which makes it much easier to design the RIMM board. Surface mounting and repair are much easier with a wider pitch. The general die shrink solution for this type of device using test Die B, is shown in Figure 2. The next generation 256M Direct RDRAM die has a bonding pad along the die center. Thus, the package solution for die shrinks will be the same as for the 128/144M die. were chosen from the real dies: one for the center pad die and one for the peripheral pad die (see Figure 2). Test Die A, with a peripheral pad, has dimensions of 7.71mm x 6.07mm. The ball matrix is 8 x 6, which is EIAJ standard for Flash and SRAM and the ball pitch was assumed to be 0.75mm. The cross section with six balls, which is 6.07 mm, will be examined with the repeated 85% linear die shrinks. Die 0 represents the die before die shrink. Die 1 and represent the die after the first and second die shrink. Test Die B, with a center pad, has die dimensions of 12.29mm x 7.16mm. The ball matrix is 15 x 8 with 0.75mm pitch and the cross section with eight balls will be examined in detail with the die size reduced. This can be used for 128/144M Direct RDRAM package design. Package Design Strategy The die shrink solution for conventional packages does not require a change in the package outer dimension. In the case of the TSOP, the lead frame change is the major change made for the die shrink, and molds for encapsulation, tools for singulation, test socket, and the mounting board are not affected. Therefore, conventional test sockets were designed for a specific type of package with a fixed outer dimension. The die shrink problem for CSPs is much more difficult than for conventional cases because the package perimeter is determined mainly by the die size itself. Sometimes, die shrinks also means that package outer dimension shrink. For CSPs, it is necessary to establish a design strategy for the package outer dimension, whether it will be the same package outer dimension or a reduced package outer dimension. Die 0 (initial design) Die 1 (1 st shrink) (2 nd shrink) Die 1 (1 st shrink) Die 0 (initial design) (2 nd shrink) Test Vehicle There are many design solutions for die shrink. The designs cannot be compared and ranked by a single evaluation criteria because all of them have different requirements and may have unique design restrictions. Thirteen possible package configurations are presented and the benefits and limitations of each design are discussed. For this study, two test dies Figure 2: Test Die A (upper) - 8 x 6 matrix with peripheral pad. Test Die B (lower) - 15 x 8 matrix with center pad, two raw depopulation.

3 The first approach, using the same package outer dimension, is the same as for conventional packages. It does not require additional tool cost for the assembly process. However, the structure of the package perimeter must be changed to fill the empty space created by the die shrink. It can be filled by encapsulant only or part can be filled with epoxy dam in order to minimize package warpage. Adding extra structure such as metal ring or heat spreader is another possible solution. The second approach, reducing the package outer dimension, might be a cost-effective solution with high volume production. Since the package dimension has been changed, the dimension related process tools must be changed, including tape conversion, solder ball attach, singulation, and test. The main advantage is in the cost reduction of TAB tape that comes from increasing the number of the parts in one strip. Currently, tape cost is higher than 50% of the total assembly cost. For high volume production, this approach can be easily justified by the comparison between new tools cost and the cost savings of using TAB tape. The second approach requires flexibility in socket size in order to avoid enormous amount of expense and time needed to develop a new test socket. The idea of interchangeable alignment plate was demonstrated by the test socket suppliers [4]. Figure 3 shows a commercially available test socket with an interchangeable alignment plate. Reducing the package outer dimension requires only different size alignment plate. All other parts can be used without any modifications. Additional cost savings can be made by employing a universal probe block. With this device, as long as the ball pitches are the same and additional contacts are available, different I/O packages can be tested using the same test socket body. Figure 4 illustrates a test socket with a universal probe block. The contact pins 1 and 8 are not being used in this test configuration. This socket can be used to test packages with more I/Os than the package shown in this figure. The alignment plate for Die 0 means that the alignment plate size matches with Die 0, which is the die before shrink. Sometimes, a custom-designed test socket with no extra contact pins can be more economical, because the universal type test socket carries extra contacts that may not be used. The trade-off solution depends mainly on production volume. The majority of memory devices can be tested using a universal type test socket with a 8 x 15 contact matrix with 0.75mm and 0.80mm pitch. An exception to this standard matrix is 74 I/O Direct RDRAM, because it requires a 7 x 16 ball matrix. Another exception is 128/144M Direct RDRAM, because 1.0mm x 0.8mm is not standard pitch. Footprint compatibility is a strong requirement for the die shrink solution. With repeated die shrink, die size may become smaller than the area of the ball matrix. Reducing the ball pitch might be a very simple solution in package, however, it may not be accepted in the field, because the reduced ball pitch requires a new test socket and new mounting board with finer pitch. In this study, ball pitch reduction was not considered a feasible solution. Figure 3: Figure 4: Figure 5: Interchangeable Alignment Plate STEP 1: Tape Conversion -. Nubbin or Pad -. Tape to carrier STEP 4: STEP 7: Encapsulation -. Coverlay -. Dispense, cure Singulation -. Punch, saw -. Pack Chip scale hand test socket with interchangeable alignment plate [4]. Interchangeable Alignment Plate for Die 0 Test configuration of µbga package with peripheral die pad. The test socket was designed with interchangeable alignment plate and universal probe block. STEP 2: STEP 5: Die 0 Contact Pins Die Attach -. Adhesive -. Die mount, cure Solder Ball Attach -. Flux, ball attach -. Reflow STEP 3: Lead Bond -. S-shape bond -. Lead inspection STEP 6: Standard µbga package assembly procss. Universal Probe Block Test and Mark -. Strip test -. Laser mark, 532

4 µbga Technology Overview The die shrink solution may require a modified package assembly process. Before discussing the details of the new designs, it is necessary to understand the standard assembly process, which is shown in Figure 5. The first step is tape conversion. This can be done by either nubbin printing or dry-pad type elastomer attach. Nubbin printing is a wet process and has high flexibility in die size and die pad location. A reel-to-reel nubbin printing system has been developed and it covers nubbin print, inspection, and cure [5]. It saves significant manufacturing cost compared to the earlier batch process. The dry-pad type elastomer attach process has been used by multiple Asian companies. Many different structures and different materials were developed for the dry-pad type elastomer. Recently, a silicone-based elastomer pad was developed, and it has been accepted for high volume production. Once nubbin or dry-pad is applied to the TAB tape, the tape must be cut and placed on the carrier. If the die attach process is done with a reel-to-reel format, mounting the tape to the carrier must be done after curing the die attach material. The die attach process has been improved significantly. The reel-to-reel die mounting process has enabled an increase in alignment accuracy of 12 µm due to tape tension during the process. A nubbin type spacer requires a second material for die attach. The die attach material dispensing and die mounting function have been integrated in one system, and an extremely high speed process has been achieved: 1500 units per hour. The lead bonding process is directly related to package reliability. Bonding with dimple tool reduced the lead deformation to less than 6µm and resulted in higher package reliability. Because excessive ultrasonic power may lead to pad lift failure, it was recommended to adjust the power level from the typical 90 mw to 70mW. Normally, heel breaks are the major failure mode of the lead. In the case of a low lead angle with low elastomer height, midspan breaks occurred. The over-travel of the bonding tool was identified as a significant parameter increasing lead slack, which reduced midspan break. There are many different approaches to µbga package encapsulation, including encapsulation/autoclave, vacuum encapsulation, top side encapsulation (local dispensing), and injection. The main advantage of injection encapsulation is that it is fast process and it may reduce TAB tape cost. Also, the process speed is not affected by the die size, which was a problem with other methods. A system with a double station can handle 120 strips per hour and is expected to increase with process and material optimization. Since the encapsulant is filled with pressure, the required gap between dies is much smaller than with other encapsulation methods. This allows more parts to be laid-out on the strip, which leads to TAB tape cost reduction. It also provides high process flexibility for complicated package configurations. Flux application, solder ball application, inspection, and reflow are the major components of the solder ball attach process. Recently, a reflow oven was integrated into the conventional solder ball attach machine and has increased the productivity. The gold layer thickness on the pad for solder ball mounting must be carefully controlled. Because excessively thick gold may lead to the formation of the Au-Sn intermetallics, which is brittle. Strip level test and marking is a cost-effective approach because it saves time for unit part handling. Currently, a strip level test method is being developed [6]. Green laser with the wavelength of 532 nm was identified as a safe and high quality laser source for the µbga package marking process [7]. The last step is singulation and packing. Singulation with punch has been widely used for a high volume production. It is a fast process, but it requires relatively wide gap between the neighboring dies for the punch tool. In order to minimize the gap, injection encapsulation can be used. A saw with a thin blade may be used to singulate the strip with small gaps between the dies. JEDEC tray, tape and reel, and tube are possible packing tools for µbga package. The reliability of the package has been improved significantly by design and process optimization. The major parameters were elastomer height, lead angle, and bonding tool over travel. Currently, reliability test is under way, with the following results from several batches (each batch has 20 or 30 test packages): 0% failure at 3000 cycles, 0% failure at 3000 cycles, 0% failure at 3000 cycles, 25% failure at 3500 cycles, 26.7% failure at 3500 cycles, 43.3% failure at 4000 cycles. The test conditions are from -40 to 125 o C on FR-4 board test with 30-minute cycle time. Die Attach Material (Nubbin or Dry-pad) Figure 6: Bonding Window Die 0 µbga package for peripheral die pads and 6 x 8 ball matrix. The reference package with Die 0 (before die shrink).

5 DIE SHRINK SOLUTION FOR PERIPHERAL PAD DIE Dies with peripheral pads include the 64/72M Direct RDRAM, Flash and SRAM. Figure 1 (upper) shows the footprint of the 64/72M Direct RDRAM. Table 1 shows the Flash/SRAM EIAJ roadmap for CSPs. For the technical discussion in this section, Test Die A, which has 6 x 8 ball matrix, will be used. Figure 6 shows the reference package before die shrink. Table 1: Flash/SRAM EIAJ Roadmap for CSPs [1] Device Type Device Orgnization Array Pin Counts FLASH SRAM DESIGN P1 4M x4 4M x8, x16 8M x4 8M x8, x16 16M x4 16M x8, x16 1M x8 1M x8, x16 2M x8 2M x8, x16 4M x8, x16 Design Requirement: Design Strategy 1: Design Strategy 2: 5 x 8 6 x 8 5 x 8 6 x 8 5 x 8 6 x 8 4 x 8 6 x 8 4 x 8 6 x 8 6 x % Linear Die Shrink Same Package Outer Dimension Ring The first step for die shrink is determining the package design strategy. The reduced die width will be 85% of the original die as shown in Figure 6. The first design strategy of Design P1 is keeping the package outer dimension. With this strategy, most of the package assembly tools and test socket can be used without any modification. The empty space created by die shrink must be filled with other material. The second design strategy is filling the empty space with encapsulant. The same material and the same process can be used for Design P1. Figure 7 shows a cross section of Design P1. The role of the package flange is to keep the mechanical dimension of the package. This way, no reliability change is expected from the original design in Figure 6. Design P1 is a simple and reliable package solution for the first die shrink. temperature and at reflow zone. Design P2 is intended to minimize warpage at the package perimeter by decreasing the CTE. Figure 9 shows a cross section of Design P2. The encapsulant ring was replaced by encapsulant with an epoxy dam. High modulus and a low CTE epoxy dam is expected to reduce the warpage problem at the package perimeter. Figure 10 shows a two-ball overhang fan-in/out µbga package structure. The coplanarity of the package was improved by installing a rigid epoxy dam. In this figure, the epoxy dam occupies about one-third of the encapsulation space. The dam width is an important parameter in maintaining high ball coplanarity with temperature change. In order to form the proper joint shape for the overhang balls, the warpage at reflow zone must be minimized. For this purpose, low CTE epoxy is recommended for the dam material. Figure 7: Figure 8: Figure 9: Ring Epoxy Dam Die 1 Design P1-85% die shrink, same package outer dimension, and encapsulant ring. Test socket with the same alignment plate and universal probe. Warpage at package perimeter with temperature change cure, room, and reflow. Die 1 Room temperature Curing temperature Reflow temperature Design P2-85% die shrink, same package outer dimension, and encapsulant with epoxy dam. DESIGN P2 Design Requirement: 85% Linear Die Shrink Epoxy Dam Ring Design Strategy 1: Design Strategy 2: Same Package Outer Dimension with Epoxy Dam Die Figure 8 shows the schematic of the package warpage at three typical temperature conditions: cure, room, and reflow. The warpage at the package perimeter is mainly determined by the modulus and CTE of the encapsulant. In the case of Design P1, the CTE mismatch between polyimide tape and silicone based encapsulant might be quite large. Therefore, significant warpage at the package perimeter is expected at room

6 Figure 10: DESIGN P3 Design Requirement: Design Strategy 1: Design Strategy 2: Two-ball overhang fan-in/out µbga package structure. Epoxy dam enhanced the package coplanarity (188 I/O). 85% Linear Die Shrink Reduced Package Outer Dimension Ring Figure 11 shows a cross section of the package and test socket with new alignment plate. The reduced package size requires a new assembly process tools: tape conversion, solder ball attach, singulation, and a new alignment plate for test socket. Design P3 is a cost-effective package solution for die shrink, because the TAB tape cost can be reduced by increasing the number of parts in one strip. For high volume production, Design P3 is a better choice than Design P1. Design P3 can be manufactured using the standard process and materials. Also, the same level of reliability is expected as for the reference package in Figure 6. DESIGN P4 Design Requirement: Design Strategy 1: Design Strategy 2: 85% & 85% Linear Die Shrink Same Package Outer Dimension Rigid Ring The repeated die shrink (85% and 85%) makes the package design much more difficult. Design P4, shown in Figure 12, illustrates the solution for the worst case, in which some of the die bonding pad location overlap with the ball matrix: the die are shifted to find an appropriate bonding window. Note that the left bonding window is between the second and the third balls. The rigid ring enables to get high coplanarity. Design P4 requires a more narrow bonding window than the normal design. In order to avoid conflict with the copper land for ball mounting, the location and the shape of the bonding window must be carefully determined. Die shift is one easy way to solve the problem. The effective process is to pick and place the ring immediately following die placement. Then, the die and ring can be attached to the TAB tape at one time. It is extremely important to not touch the die because the die attach material is not cured. Depending on the pick-and-place machine accuracy, the gap between the die and ring may have to be adjusted. Figure 13 shows a cross section of the two-ball overhang µbga package with rigid ring. Etched metal was used for this study. The metal improved the mechanical strength and ball coplanarity as the temperature changed. Figure 14 shows two-ball overhang µbga package with encapsulant ring. As shown in this figure, the package coplanarity was excellent. However, the package with the metal ring was better than the package with the encapsulant ring. In terms of package warpage with temperature change see Figure 8. Figure 11: Figure 12: Non-symmetric Rigid Ring Rigid Ring (etched metal) Design P3-85% die shrink, reduced package outer dimension with encapsulant ring. Test socket requires new alignment plate for smaller die (Die 1). Design P4-85% & 85% linear die shrink, same package outer dimension with rigid ring. Figure 13: Two-ball overhang µbga package with rigid ring. 188 I/O and etched metal. Figure 14: Ring Interchangeable Alignment plate for Die 1 Die 1 Ring Die Two-ball overhang µbga package with encapsulant ring (188 I/O). Die

7 DESIGN P5 Design Requirement: Design Strategy 1: Design Strategy 2: 85% & 85% Linear Die Shrink Same Package Outer Dimension Heat Spreader Design P5 is a modification of the earlier design from rigid ring to heat spreader. Figure 15 shows the die shrink solution with heat spreader. However, the heat spreader attach must be done after die placement and cure because it must be attached to the die. The heat dissipation can be maximized by controlling thermal conductivity and thickness of the attach material. The heat spreader has been designed like a cap in order to prevent edge bending with temperature change. If the heat spreader is flat, the thermal deformation of the encapsulant between the TAB tape and heat spreader will directly affect the ball coplanarity. The forming depth of heat spreader is important to control the level of coplanarity at reflow temperature. Because proper solder joint shape is essential to get sufficient level of reliability on board. For the encapsulation process for a complicated package like Design P5, injection is the best choice. This will be explained later in section Design C5. The reliability of the lead at the left edge of the die has been a concern, because the bonding window is the only place that allows deformation of the encapsulant. There are two different solutions: one is to minimize the encapsulant volume in the gap; the other is to make openings in the heat spreader to prevent excessive deformation through the bonding window. DESIGN P6 Design Requirement: 85% & 85% Linear Die Shrink Design Strategy 1: Reduced Package Outer Dimension Design Strategy 2: Peelable Leads As far as TAB tape cost is concerned, in general, reducing the package outer dimension is a better design strategy than keeping the same dimension. Design P6 is an economical solution in terms of package size but it requires next generation µbga technology, which are peelable leads. Figure 16 shows Design P6 with peelable leads, injection encapsulation, and a new alignment plate for test socket. Note that two corner solder balls overlap with die bonding pads and there are no windows for lead bonding. The peelable lead technology is essential for wafer level µbga package implementation. The peelable leads can be made by postprocess, after making the conventional TAB tape for µbga package. The peelable force can be determined by the level of the post-processing. All the leads are gang bonded after aligning die to the substrate. For this purpose, the bonding pad must be pretreated with bondable materials. Once all the leads are bonded, the gap between die and polyimide must be filled with encapsulant by injection process. In conclusion, for package design for peripheral pad, most problems can be solved by Designs P1, P2, P3, or small modifications of them. The one-ball overhang µbga package is already in production in high volume. The x- directional cross section is the same as Design P1, and the y- directional cross section has overhang balls at each corner. The two-ball overhang µbga package is currently being tested to finalize the design. Figure 15: Figure 16: Design P5-85% & 85% linear die shrink, same package outer dimension with heat spreader. Design P6-85% & 85% linear die shrink, smaller package outer dimension with peelable leads. DIE SHRINK SOLUTION FOR CENTER PAD DIE The center pad is a common die configuration in DRAM, 16M, or later generation devices. LOC type TSOP provided a reasonable solution in terms of both package size and electrical performance, however, the peripheral lead package has limitations in both number of I/Os and in package size. Lead pitch finer than 0.5 mm increased problems with design and surface mounting yield. Aerial array type CSP was identified as the next generation package solution [8]. As shown in Figure 1, 128/144M and 256M Direct RDRAM belong to this group. Table 2 shows the EIAJ roadmap for chip-scale packages for DRAM. For this study, Test Die B was used (see Figure 2). Figure 17 shows the cross section of µbga package for Test Die B with an 8 x 15 matrix (two-row depopulation). Since the bonding window is at the center of the die, the package design for die shrink is relatively simpler than for peripheral pad. Table 2: DRAM EIAJ Roadmap for CSPs [1] Device Type Device Orgnization Array Pin Counts DRAM Interchangeable Alignment plate for 64M x4, x8, x16 64M x4, x8, x16, x32 256M x4, x8, x16 Heat Spreader 4 x 15 6 x 15 4 x 15 Peelable Lead

8 DESIGN C1 Design Requirement: Design Strategy 1: Design Strategy 2: 256M x4, x8, x16, x32 6 x % Linear Die Shrink Same Package Outer Dimension Ring Figure 18 shows Design C1 which is a very simple solution for die shrink problem because no overhang balls are created by die shrink. Most of the process tools and test sockets can be used without any significant modifications. The package warpage shown in Figure 8 can be minmized by extra copper trace on the TAB tape and low CTE encapsulant material. The standard assembly process can be used, and the reliability level will be the same as for the package with Die 0. In practice, Design C1 will be frequently used. Die Attach Material (Nubbin or Dry-pad) Die 0 Bonding Window DESIGN C2 Design Requirement: 85% Linear Die Shrink Design Strategy 1: Same Package Outer Dimension Design Strategy 2: with Epoxy Dam Figure 19 shows Design C2 a modification of Design C1 that increases the modulus of the package perimeter. This design is more useful for a one- or two-ball overhang µbga package design because the rigid epoxy dam provides higher strength and dimensional stability. Also, the epoxy dam can be designed to control package warpage by changing dimensions and material properties (see Figure 8), however, Design C2 requires additional epoxy dam dispensing and a curing process. outside of the die perimeter, as shown in Figure 21. The overhang balls must be controlled carefully. Figure 17: Cross section of µbga package with center pad die and 8 x 15 ball matrix with two center columns depopulated Ring Die 1 DESIGN C3 Design Requirement: 85% Linear Die Shrink Design Strategy 1: Reduced Package Outer Dimension The cost of TAB tape is more than 50% of the total packaging cost. The tape cost can be lowered by increasing the number of parts in one strip, which can be done by reducing package size. Design C3 (Figure 20) illustrates a cost-effective design solution. Since the package size has been changed, Design C3 requires new process tools for tape conversion, solder ball attach, singulation, and test socket. If production volume is high, the savings from TAB tape will be much higher than the cost for the new tools. The assembly process and materials are the same as the standard process (shown in Figure 5). Thus, the reliability of the package will be the same as for the package with Die 0. DESIGN C4 Design Requirement: 85% & 85% Linear Die Shrink Design Strategy 1: Same Package Outer Dimension Design Strategy 2: with Epoxy Dam With repeated die shrink, some of the solder balls may be (Test Die B in Figure 2). Figure 18: Design C1-85% die shrink, same package outer dimension, and encapsulant ring. Test socket with the same alignment plate and universal probe block. Figure 19: Epoxy Dam Die 1 Design C2-85% die shrink, same package outer dimension, and encapsulant with epoxy dam. Alignment Plate for Die 1 Die 1

9 Figure 20: Design C3-85% die shrink with reduced package outer dimension. The alignment plate of the test socket must be adjusted.

10 The first issue with Design C4 is solder ball contact during the test and burn-in process. Since the edge balls are not supported by rigid die, poor contact was a potential problem. This problem was solved by a test socket design with adjustable contact force at the overhang area. The second issue is control of package warpage during the surface mounting process, which was explained in Design P2. The goal is to decrease the CTE of the encapsulant at the package perimeter. An epoxy dam with low CTE and high modulus material is an effective way to minimize warpage. Design P4 is a reasonable approach for maintaining ball coplanarity with the same package outer dimension. However, it requires an additional process, epoxy dam dispensing and cure. The dispensing material and dam width are the key parameters in controlling the reliability of the overhang balls. In the case of high modulus dam material, the process parameters for singulation must be adjusted. internal pressure level is lowered by vacuum pump. It is expected to reduce the void problem and to increase the injection speed due to the reduced back pressure. Figure 25 shows the injection machine installed at Tessera. The main advantage of injection is process speed regardless of die size. Figure 21: Epoxy Dam & Design C4-85% & 85% die shrink, same package outer dimension with epoxy dam. Test socket with the same alignment plate and the same universal probe block. DESIGN C5 Design Requirement: 85% & 85% Linear Die Shrink Design Strategy 1: Same Package Outer Dimension Design Strategy 2: Rigid Ring With Design C5, higher ball coplanarity can be obtained with the preformed rigid ring attach shown in Figure 22. The preformed rigid ring can be either metal or polymer, as long as the CTE mismatch with polyimide tape is not significant. The ring attach process is the same as Design P4. In the case of polymer, the ring can be either unit piece or strip format. Strip format ring attach is normally a faster process than unit ring handling, however, the material must be compatible with the singulation process. The injection type encapsulation process is recommended for Design P5, because filling the bonding window area and the gap between the die and ring may not easy with other encapsulation methods. See Design C6 for injection details. Figure 22: Design C5-85% & 85% die shrink, same package outer dimension with rigid ring support. Test socket with the same alignment plate and the same universal probe block. Heatspreader Rigid Ring DESIGN C6 Design Requirement: 85% & 85% Linear Die Shrink Design Strategy 1: Same Package Outer Dimension Design Strategy 2: Heat Spreader The motivation for Design C6 is the same as for Design P5. Figure 23 shows the package with a heat spreader for die shrink. Thermal conductivity and adhesion property are the important selection criteria for the heat spreader. The heat spreader attach process should be done after die attach cure, as was explained in Design P5. The thermal conductivity and thickness of the attach layer are important parameters in minimizing thermal resistance. Encapsulation with injection is good for a package with complicated geometry like Design C6. Figure 24 illustrates the injection process. Top and bottom coverlays constitute the cavities for injection. Before injecting the encapsulant, the Figure 23: Figure 24: Design C6-85% & 85% die shrink, same package outer dimension with heatspreader. The package thickness has been changed due to the heat spreader. Injection Die attach Material (Nubbin) Coverlay Vacuum Encapsulation with injection process. Top and bottom coverlays constitute cavities for injection. Injection pressure and vacuum level determine the injection speed.

11 Design C6 is a good solution for high power dissipating dies. When the heat spreader is properly designed in CTE and thickness, the package reliability will be the same as that of the standard package. DESIGN C7 Design Requirement: 85% & 85% Linear Die Shrink Design Strategy 1: Reduced Package Outer Dimension Package design for center pad die is much easier than it is for peripheral die because the bonding window is not affected by the die shrink. As long as the overhang balls are well controlled, the package reliability is not a big issue. Considering the high TAB tape cost, Design C7 shown in Figure 26 might be the most cost-effective solution for repeated die shrink, because many more parts can be laid out in the same strip with reduced package size. Design C7 requires new process tools for tape conversion, solder ball attach, and singulation. If production volume is high, the tool cost required will be less than the tape cost saving. The assembly process and materials are exactly the same as for the standard process. The narrow encapsulant ring allows easier control of package warpage than for Designs C4 and C5. Polyimide tape with copper trace and high modulus dry-pad type material were identified as the effective parameters in controlling warpage. Figure 27 shows a cross section of the Design C7 and Figure 28 illustrates Design C7 with two-ball overhang. Figure 25: Figure 26: Injection machine - the injection idea simplifies the encapsulation process and enabled to increase process speed. Alignment Plate for Design C7-85% & 85% die shrink and reduced package outer dimension. Conclusions The die shrink solution is essential for memory devices that require CSP technology. This is not a simple solution because the package outer dimension is mainly determined by die size itself. µbga package has two different package structures for dies with peripheral pad and dies with center pads. In this paper, two different groups of design solutions were presented for Flash, SRAM, and Direct Rambus DRAMs. Six package configurations were examined for dies with peripheral pads, and seven package configurations were examined for dies with center pads. The empty space created by die shrink were filled by several different materials: encapsulant, epoxy dam, rigid ring, and heat spreader. Oneball overhang µbga package is in volume production, and two-ball overhang design is under evaluation. The package with a center pad die is much easier to implement with a twoball overhang package with high reliability. The package solution for the real die shrink problem will be much simpler than expected, because the first die (Die 0) defines ball-out with an adequate margin for chip shrinking. The fact is that suppliers are planning on quickly moving to higher-density devices - not necessarily a solution, but it is a trend that is alleviating the need for a solution. As they switch from 72M to 144M Direct Rambus DRAM, for example, much more silicon area is available to support the solder balls (see Figure 1). Figure 27: Figure 28: Die One-ball overhang with encapsulant ring. Die Attach Material (Dry-pad Type) Polyimide Tape Die Attach Material (nubbin) Die after Shrink Ring Package with two ball over-hang. Polyimide tape and die attach material enables two-ball over hang.

12 Acknowledgments The authors would like to thank the experts in this area for their valuable discussions: Gen Murakami at Hitach Cable, Keiichi Tsujimoto at Mitsui High-tec, and Bruce Rogers at OZ TEK. Acknowledgement is given to John Grange for his sample analysis and special thanks goes to Pat Tschirhart- Spangler for her excellent support for this paper. References 1. EIAJ Standard, In-Stat DRAM Market Projection, April, "Package for Direct Rambus DRAM" Bruce, R, "OZ Technologies Introduces A Chip Scale Hand Set Test Socket", June O Neal, D, "Dual Lane Production: A New Paradigm for Electronics Assembly", MPM Co., Flankline, Massachusetts. 6. Crowley, R, "Socket Development for CSP and FBGA packages", Chip Scale Review, May 1998, pp Park, H.J. et al, "Laser Marking Solutions for CSP Application", CSI Asia 99, Taiwan, January. 8. Kim, Y, et al, Bottom-Leaded Plastic (BLP) Package: A New Design with Enhanced Solder Joint Reliability, Proc. ECTC, May 1996, pp

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