EXCIMER LASER ANNEALING FOR LOW- TEMPERATURE POLYSILICON THIN FILM TRANSISTOR FABRICATION ON PLASTIC SUBSTRATES

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EXCIMER LASER ANNEALING FOR LOW- TEMPERATURE POLYSILICON THIN FILM TRANSISTOR FABRICATION ON PLASTIC SUBSTRATES G. Fortunato, A. Pecora, L. Maiolo, M. Cuscunà, D. Simeone, A. Minotti, and L. Mariucci CNR-IMM, Roma, Italy

Outline Introduction Excimer laser annealing Device fabrication on plastic substrates TFTs characterization Conclusions

Introduction Low temperature Polysilicon (LTPS) TFT technology has attracted considerable interest over the last 20 years Introduction of excimer laser crystallization has considerably improved the device performances, allowing integration of CMOS circuitry along with active matrix switching elements LTPS TFTs represent key devices for large area electronics Active matrix LCDs Active matrix OLEDs System-on-glass (SOG) and system-on-plastic (SOP)

Flexible electronics Display Advertising Automotive Wearable Sensors Biomedical sensors Biomolecular detectors Radio-Frequency ID Tags (RFID) Lower production cost, lightness, transparency, robustness, rollable 3

Polymeric substrates Polyethylene terephthalate (PET) Polyethylene naphthalate (PEN) Polycarbonate (PC) Polyethersulfone (PES) Polycyclic Olefin (PCO) Polyarylite (PAR) Polyimide (PI) Base polymer PET PEN PC PES PCO PAR PI CTE (-55 to 85 C) ppm/c 15 13 60-70 54 74 53 17 %Tr (400-700 nm) > 85 85 > 90 90 91.6 90 Yellow Water absorption (%) 0.14 0.14 0.2-0.4 1.4 0.03 0.4 1.8 Young s modulus/gpa 5.3 6.1 1.7 2.2 1.9 2.9 2.5 Tensile strength/mpa 225 275 NA 83 50 100 231 Tg C 150 200 150 220-300 350 4

LTPS TFTs issues low temperature process ELC active layer crystallization Excimer Laser Crystallization dielectrics ECR, ICP PECVD ECR 5

Excimer laser crystallization Combination in silicon of: strong UV absorption (α>10 6 cm -1 ) small heat diffusion length during laser pulse (~100 nm) Film melting without appreciable heating (<300 C) of the substrate Advantages of ELC process: glass and plastic compatible processing of large area substrates good crystallinity of polysilicon

Experimental set-up

Excimer laser crystallization partial melting almost complete melting (SLG) complete melting

Super Lateral Growth When few crystallites remain unmelted the grains can grow laterally (>1µm) Disadvantages of SLG regime: very narrow process window ( E/E SLG ~2.5%) large non-uniformities Pulse-to-pulse fluctuations and non perfect beam homogenization prevent the opearation in this regime grain size (nm) 1200 1000 800 600 400 200 0 energy density

a-si precursor a-si precursor must contain low concentrations of H to perform excimer laser crystallization Conventional PECVD a-si:h, when deposited at 250 C, contains 8-12 at. % H Planar and X-TEM of a-si:h irradiated at RT (E d =190 mj/cm 2 )

Thermal de-hydrogenation Hydrogen can be removed by thermal treatments Two main peaks in the thermal desorption rate Typical treatments: 450 500 C for a few hours

Laser de-hydrogenation It is possible to use laser annealing to de-hydrogenate the a-si:h film Large number of shots Combined with low-t thermal treatments E of final shot (mj/cm 2 ) 500 450 400 350 Thick Si =100nm 300 250 200 150 100 0 2 4 6 8 10 12 number of sequential shots

Excimer laser crystallization Fig.3 Fig.4 SEM and AFM images of 70 nm poly-si film after ELC at laser energy density of about 320mJ/cm 2 at 20 shots per point 6

Polysilicon microstructure Sequential low-t thermal treatment (350 C) + laser annealing

Device fabrication spin-coating of PI (HD-Microsistems 2611) onto 3 thermally oxidized Si-wafer and curing at a maximum temperature respectively of T= 350 C and T= 400 C, 8 µm thick PI film PI is mechanically separated from the carrier after device fabrication Easy handling, eliminate the problem of plastic shrinkage, allows the use of standard semiconductor equipment Mean surface roughness 3 nm 9

Non self-aligned TFT fabrication 1.Buffer layers: 200 nm Si 3 N 4 dual frequency PECVD @ 300 C 250 nm SiO 2 ECR-PECVD @ 200 C 2.100 nm a-si:h by PECVD @ 300 C 3.25 nm n + by PECVD 4.s/d patterning and n + removal by selective wet etching 5.Furnace annealing respectively @ 350 C and 400 C in N 2 (16 h) for hydrogen removal 6.p-Si formation and dopant activation by ELC (respectively @ 300mJ/cm 2 and 400mJ/cm 2 max) 7.Active layer island formation 8.130 nm thick SiO 2 by ECR-PECVD at room temperature 9.Via-hole and metal contacts (s/d/g) 10. Annealing @ 350 C in N 2 (30 min) a-si SiO 2 Si 3 N 4 Polyimide c-si 10

AFM analysis Polysilicon grain sizes after excimer laser crystallization for two different dehydrogenation temperatures T=350 C E=300 mj/cm 2 T=400 C E=400 mj/cm 2 100 nm 250 nm 11

Device fabrication 12

TFT electrical characterization I ds (A) Common features: Leakage < 1pA I on /I off > 10 6 V t = 6-8 V Optimal quality n + ohmic contact Sheet resistance about 600 Ω/ Low kink effect 10-6 10-7 10-8 10-9 10-10 10-11 10-12 @ 350 C @ 400 C 0-10 0 V 10 20 30 g (V) Semilog and linear scale TFTs transfer characteristics L=10 W=10 4 3 2 1 I ds (µa) I ds (µa) T=350 C: Field effect mobility = 40 cm 2 /Vs Subthreshold slope 1.2 V/dec T=400 C: Field effect mobility = 70 cm 2 /Vs Subthreshold slope 0.9 V/dec 20 16 12 8 4 0 V g =8 V V g =9 V V g =10 V 2 4 6 8 10 12 14 V ds (V) Output characteristics measured at increasing V g. (b) 13

Self-heating related instability 10-6 Transfer characteristics measured at V ds =0.1 V for increasing bias stressing times (bias stress at V g -V t =25 V and V ds =15 V) I ds (A) 10-8 10-10 10-12 -10-5 0 5 10 15 20 V g (V) No stressed 80 s 1280 s 10000 s Transfer characteristics measured at V ds =0.1 V at T=120 C for increasing stressing times (bias stress at V g -V t =25 V and V ds =0 V) I ds (A) 10-6 10-7 10-8 10-9 No stressed 80 s 1280 s 10000 s -10-5 0 5 10 15 20 V g (V) 14 L=20 µm W=40 µm

Mechanical stress I ds (A) 1.2x10-6 1.0x10-6 8.0x10-7 6.0x10-7 4.0x10-7 L=10µm W=10µm Tensile Stress Compressive stress Flat 2.0x10-7 0.0 0 3 6 9 12 15 18 V g (V) Transfer characteristics for a poly-tft on PI under different mechanical stress with a R=1.3 cm 16

Conclusions A new process for LTPS TFTs fabrication on PI has been presented sample handling and plastic stability Excimer laser annealing was successfully applied for the crystallization of the active layer Better crystallinity was obtained when higher T thermal pre-treatments were performed The devices fabricated at higher temperature exhibited a field effect mobility up to 70 cm 2 /Vs Self-heating related instability of devices on plastic substrates could represent a serious issue and solutions are required The TFTs characteristics are not appreciably influenced by mechanical stress Acknowlegments This work has been partially supported by the project PLAST-Ics funded by the Italian Ministry for Research