Trends in Device Encapsulation and Wafer Bonding

Similar documents
EV Group 300mm Wafer Bonding Technology July 16, 2008

Metal bonding. Aida Khayyami, Kirill Isakov, Maria Grigoreva Miika Soikkeli, Sample Inkinen

Developments in low-temperature metal-based packaging

EVG 100 Series. Resist Processing Systems

EV Group Product Range

BONDING OF MULTIPLE WAFERS FOR HIGH THROUGHPUT LED PRODUCTION. S. Sood and A. Wong

AML. AML- Technical Benefits. 4 Sept Wafer Bonding Machines & Services MEMS, IC, III-Vs.

3D technologies for integration of MEMS

Thin Wafers Bonding & Processing

Wafer-to-Wafer Bonding and Packaging

Fraunhofer ENAS Current results and future approaches in Wafer-level-packaging FRANK ROSCHER

TSV Processing and Wafer Stacking. Kathy Cook and Maggie Zoberbier, 3D Business Development

PRESSURE INDICATING FILM CHARACTERIZATION OF PRESSURE DISTRIBUTION IN EUTECTIC AU/SN WAFER-TO-WAFER BONDING

PHYS 534 (Fall 2008) Process Integration OUTLINE. Examples of PROCESS FLOW SEQUENCES. >Surface-Micromachined Beam

NOVEL BONDING TECHNOLOGIES FOR WAFER-LEVEL TRANSPARENT PACKAGING OF MOEMS. Herwig Kirchberger, Paul Lindner, Markus Wimplinger

Wafer Bonding Technology FOR VACUUM PACKAGING USING GOLD- SILICON EUTECTIC

Silver Diffusion Bonding and Layer Transfer of Lithium Niobate to Silicon

Advanced Analytical Techniques for Semiconductor Assembly Materials and Processes. Jason Chou and Sze Pei Lim Indium Corporation

Suss MicroTec. Wafer Bonding Process Manual. Suss MicroTec Applications Group

Postprint.

Fraunhofer IZM Bump Bonding and Electronic Packaging

Chapter 4 Fabrication Process of Silicon Carrier and. Gold-Gold Thermocompression Bonding

SCHOTT MEMpax New options for the MEMS industry. NMN Technology Day Schott AG Grünenplan

Fundamentals of Sealing and Encapsulation

Fabrication Technology, Part II

L5: Micromachining processes 1/7 01/22/02

Thomas M. Adams Richard A. Layton. Introductory MEMS. Fabrication and Applications. Springer

Preface Preface to First Edition

A GENERIC SURFACE MICROMACHINING MODULE FOR MEMS HERMETIC PACKAGING AT TEMPERATURES BELOW 200 C

EE 5344 Introduction to MEMS. CHAPTER 3 Conventional Si Processing

Leak Rates and Residual Gas Pressure in Cavities Sealed by Metal Thermo- Compression Bonding and Silicon Direct Bonding

Challenges for Embedded Device Technologies for Package Level Integration

TSV CHIP STACKING MEETS PRODUCTIVITY

Section 4: Thermal Oxidation. Jaeger Chapter 3. EE143 - Ali Javey

Development of a Fluxless Flip Chip Bonding Process for Optical Military Electronics

A discussion of crystal growth, lithography, etching, doping, and device structures is presented in

Mixed Attachment Technology Studies in RF & Optoelectronic Packages Requiring High Accuracy Placement

MATERIALS. Silicon Wafers... J 04 J 01. MATERIALS / Inorganics & thin films guide

SLID bonding for thermal interfaces. Thermal performance. Technology for a better society

Copyright 2008 Year IEEE. Reprinted from IEEE ECTC May 2008, Florida USA.. This material is posted here with permission of the IEEE.

Novel Technique for Flip Chip Packaging of High power Si, SiC and GaN Devices. Nahum Rapoport, Remtec, Inc.

Tutorial on Micro Electro Mechanical Systems (MEMS)

Progress in Monolithic III-V/Si and towards processing III-V Devices in Silicon Manufacturing. E.A. (Gene) Fitzgerald

MEMS Devices. Fraunhofer Institute for Silicon Technology ISIT. Itzehoe, Germa. any

DITF ToolKit 1. Standard Substrate Sizes (selected at the factory for optimum process)

Close supply chain collaboration enables easy implementation of chip embedded power SiP

3D-IC Integration using D2C or D2W Alignment Schemes together with Local Oxide Reduction

Embedded Mold Temperature Sensor

21 rue La Nouë Bras de Fer Nantes - France Phone : +33 (0) website :

A novel pick-and-place process for ultra-thin chips on flexible smart systems Thomas Meissner (Hahn-Schickard)

Thermal Evaporation. Theory

FLIP-CHIP TECHNOLOGIES AND GLOBAL MARKETS

Building HDI Structures using Thin Films and Low Temperature Sintering Paste

Global Journal of Engineering Science and Research Management

MEMSAND MICROSYSTEMS Design, Manufacture, and Nanoscale Engineering

Atomic Layer Deposition (ALD)

5. Packaging Technologies Trends

SiTime University Turbo Webinar Series

Recent Progress on LAPPD

UTILIZATION OF ATMOSPHERIC PLASMA SURFACE PREPARATION TO IMPROVE COPPER PLATING PROCESSES.

Fluxless soldering using Electron Attachment (EA) Technology

Influence of Underlayer on Crystallography and Roughness of Aluminum Nitride Thin Film Reactively Sputtered by Ion-Beam Kaufman Source

Gold to gold thermosonic bonding Characterization of bonding parameters

Automating Hybrid Circuit Assembly

A Novel Thermal Management Approach for Packaging of High Power GaN Devices

Development of gold to gold interconnection flip chip bonding for chip on suspension assemblies

Section 4: Thermal Oxidation. Jaeger Chapter 3

Chapter 3 Silicon Device Fabrication Technology

TSV-Based Quartz Crystal Resonator Using 3D Integration and Si Packaging Technologies

UNCLASSIFIED/UNLIMITED. Ultrasonic Consolidation : Status Report on Development of Solid State Net Shape Processing for Direct Manufacturing

NanoFoil Technology: Formation Reactions & Thermite Reactions

Fraunhofer IZM Berlin

WF6317. A superactive low-volatile/high heat-resistant water-soluble flux for ball soldering

CX Thin Fil s. Resistors Attenuators Thin-Film Products Thin-Film Services. ISO 9001:2008 RoHS/REACH Compliant ITAR Compliant

Activities in Plasma Process Technology at SENTECH Instruments GmbH, Berlin. Dr. Frank Schmidt

Cu electroplating in advanced packaging

curamik CERAMIC SUBSTRATES AMB technology Design Rules Version #04 (09/2015)

T/C stress resistant high reliability solder alloy SB6NX / SB6N. Patented by Panasonic

5.8 Diaphragm Uniaxial Optical Accelerometer

Cu-Al intermetallic growth behaviour study under high temperature thermal aging

Flexible Substrates for Smart Sensor Applications

Radiation Tolerant Isolation Technology

SAES experience in NEG coating of narrow gap insertion devices and small diameter chambers for accelerators

Thermal Analysis of High Power Pulse Laser Module

Published in: Proceedings of the 19th Annual Symposium of the IEEE Photonics Benelux Chapter, 3-4 November 2014, Enschede, The Netherlands

HBLED packaging is becoming one of the new, high

PARASITIC EFFECTS REDUCTION FOR WAFER-LEVEL PACKAGING OF RF-MEMS

Previous Lecture. Vacuum & Plasma systems for. Dry etching

Outline. Introduction to the LIGA Microfabrication Process. What is LIGA? The LIGA Process. Dr. Bruce K. Gale Fundamentals of Microfabrication

Waferlevel Vacuum Packaged Microscanners: A High Yield Fabrication Process for Mobile Applications

Extending product lifetime with ALD moisture barrier

Low Temperature Thermocompression bonding for photodetector sealing

Photovoltaics & Solar Thermals. Thin-film equipment. Customized. FHR Anlagenbau GmbH I

EXCIMER LASER ANNEALING FOR LOW- TEMPERATURE POLYSILICON THIN FILM TRANSISTOR FABRICATION ON PLASTIC SUBSTRATES

The Role Of Electroplates In Contact Reliability

Glass Wafer. Specification

Progress Report. Development of a High Heat Flux Supercooler Using Carbon Foam. Walter Yuen. February, 12, 2008

200mm Next Generation MEMS Technology update. Florent Ducrot

AlSiC for Optoelectronic Thermal Management and Packaging Designs

Transcription:

Trends in Device Encapsulation and Wafer Bonding Roland Weinhäupl, Sales Manager, EV Group

Outline Introduction Vacuum Encapsulation Metal Bonding Overview Conclusion

Quick Introduction to EV Group st Our philosophy Our mission in serving next generation application in semiconductor technology Equipment supplier for the semiconductor and MEMS industry 2000+ equipment installations Privately held company founded in 1980 Headquartered in Austria - subsidiaries in USA, JP, KR, CN and TW Worldwide Sales and Customer Support Network Internal process development 20% of revenue is invested into R&D annually

MEMS, IoT & Wearables Sensor (R)evolution Novel Sensors: Development of new measurement units (IMU, environmental, health, ) Smart Software: Combo sensors as integration of multiple measurement units and data processing Size and Power Reduction: Steady volume reduction (footprint and thickness) as well as power reduction

Outline Introduction Vacuum Encapsulation Metal Bonding Overview Conclusion

Vacuum Sealing in MEMS Why? Vacuum encapsulation in MEMS is based on three primary drivers: 1. Reduce the power consumption caused by parasitic drag on a resonator: - Gyroscopes 2. Reduce convection heat transfer: - Microbolometers - Temperature-controlled devices 3. Prevent corrosion or other types of interaction with O 2 or H 2 O: - Parts with exposed Al or AlN Source: ST 6

Vacuum MEMS Cavity Pressure Different Applications demand different pressure levels MEMS Device Working Pressure Accelerometer 1 300 mbar Absolute pressure sensor 10-4 - 1000 mbar Gyroscope 10-1 10-4 mbar Rotation Acceleration Sensor 10-3 1 mbar Resonant Magnetometer 10-3 1 mbar Microbolometer < 10-4 mbar RF switch < 10-4 mbar Oscillators < 10-4 mbar Sources: A. Bonucci, A. Conte, M. Moraja, G. Longoni and M. Amiotti, Chapter 40: Outgassing and Gettering, in Handbook of Silicon-based MEMS: materials and technologies, pp. 585 V. Lindroos, M. Tilli, A. Lehto and T. Motooka (ed.), Elsevier, 2010 (ISBN: 978-0-8155-1594-4) 7

Bonding Requirements for Vacuum Sealing CMOS compatibility Temperature limits of MEMS sensor and CMOS processing (Al-Ge or Al-Al) Contamination limitation Material compatibility Bonding Requirements

CMOS Compatibility Various CMOS-MEMS are using in production low temperature fusion bonding, eutectic, TLP bonding. Fusion bonding not compatible with high vacuum levels, even with getters. Only one eutectic system was proven to be compatible with CMOS: Al-Ge (volume production). Major disadvantage: process conditions too close to the limits of low temperature range (>400 C)! Al-Al thermo-compression bonding foreseen as a candidate. Major disadvantage: hard-to-handle, chemically-robust native oxide. 9

Bonding Requirements for Vacuum Sealing CMOS compatibility Temperature limits of MEMS sensor and CMOS processing (Al-Ge or Al-Al) Contamination limitation Material compatibility Bonding Requirements Stress management Bow and Warp management are gaining importance in vacuum sealing High temperature processing

Stress Management The use of MEMS specific patterning processes may result in high bow of incoming substrates, which subsequently can be responsible of inducing stress during bonding process. The specific MEMS requirements in terms of vacuum may impose substrates heating under vacuum for significant time, which may result in thermally-induced stress (high temperature difference between the two substrates) or extremely long process times. The use of high compression forces required by some bonding processes may induce stress in resonator structures. 11

Bonding Requirements for Vacuum Sealing CMOS compatibility Temperature limits of MEMS sensor and CMOS processing (Al-Ge or Al-Al) Contamination limitation Material compatibility Bonding Requirements Stress management Bow and Warp management are gaining importance in vacuum sealing High temperature processing Long term stability of vacuum inside devices Getters and high vacuum bake outs are competing New equipment concepts are underway for high vacuum sealing

Long Term Vacuum Stability The use of MEMS getters is becoming common in some vacuum MEMS. Disadvantages: hard to match thermally the various wafer bonding processes in use this results in decreasing the getter efficiency require additional patterning steps for getter deposition consume space inside device (High) vacuum baking prior bonding: a process which may avoid the use of getters but with most wafer bonder designs this results in unacceptable increase of process time. New equipment concepts address this issue. 13

Bonding Requirements for Vacuum Sealing CMOS compatibility Temperature limits of MEMS sensor and CMOS processing (Al-Ge or Al-Al) Contamination limitation Material compatibility Bonding Requirements Stress management Bow and Warp management are gaining importance in vacuum sealing High temperature processing Long term stability of vacuum inside devices Getters and high vacuum bake outs are competing New equipment concepts are underway for high vacuum sealing Direct vacuum measurement Testing schemes need to be optimized for high vacuum MEMS devices Testing integration into process flow Wafer level testing will be required

Vacuum Evaluation Inside Micropackages Test Method Sensitivity Limit/ Cavity Volume Membrane resonance 1 x 10-9 Pa m 3 /s / V > 0.5 mm 3 Optical deformation 5 x 10-9 Pa m 3 /s / V > 0.5 mm 3 Characteristics Requires thin (~20 µm) membranes, may affect sensor structure Inspection of metal housings; sensitivity affected by cap geometry Helium leak test 5 x 10-13 Pa m 3 /s / V > 1 mm 3 Kr 85 radioactive tracer 1 x 10-13 Pa m 3 /s / V > 0.5 mm 3 Limited to sealed volumes > 5 mm 3 Handling of radioactive test gas Q-factor monitoring 1 x 10-18 Pa m 3 /s / Requires resonator in vacuum 2 mm 3 > V > 0.001 mm 3 package Internal pressure 1 x 10-16 Pa m 3 /s / 2 mm 3 > V > 0.01 mm 3 Integrated µ-pirani pressure sensor IR transmission 5 x 10-17 Pa m 3 /s / Transmission of oxidized metal layers. 2 mm 3 > V > 0.001 mm 3 No getter use possible. Residual gas analysis (RGA) Gas volume: >10-12 Pa l Destructive test, laborious for small packages 15

Outline Introduction Vacuum Encapsulation Metal Bonding Overview Conclusion

Overview Wafer Bonding Processes

Vacuum Basics for Wafer Bonding Wafer Bonding Specific Outgassing

Wafer Bonding Processes: Main Features Bonding temperature Re-melting temperature Bond cycle time Anodic Glas Frit TLP Eutectic Metal TC 350 C 450 C na 350 C 450 C Same as bonding 180 C 300 C Higher than bonding 300 C 450 C Same as bonding 5 20 min 20 30 min 30 50 min 30 50 min Line width >20 µm 200 µm 500 µm Tolerance to topography Vacuum range Getters compatibility 100 C 400 C na 15 90 min >30µm >30 µm >30 µm 0 1 1.5 µm 1 µm 1 µm 0 Low - Medium Low - Medium Medium - High Medium- High Medium- High Yes Yes Yes Yes Yes Leak rate Low Low Very low Very low Low 19

Overview Wafer Bonding Processes

Eutectic Wafer Bonding Melting temperature Material A Temperature Time Material B Melting Point of the alloy is lower than of the individual materials Thickness of the material B and diffusion coefficient define process time

Eutectic Wafer Bonding: Step 1 Contacting Melting temperature Temperature x (µm) Time Wafers are aligned and brought into contact 1.00 c (a.u.) 0.00 Due to surface roughness no direct joint of the materials

Eutectic Wafer Bonding: Step 2 Heating Melting temperature Temperature x (µm) Time - Interdiffusion Diffusion start already in solid state Slow process but fast heating ramps with high uniformity improve process 1.00 c (a.u.) 0.00 Sill interface between the wafers as the gaps are not closed in the solid state

Eutectic Wafer Bonding: Step 3 Isothermal Stage Melting temperature Temperature Liquid x (µm) Time Temperature is ramped up above the eutectic temperature. 1.00 c (a.u.) 0.00 Process temperature is kept stable till the whole interface is liquid Interface gaps are closed and the wafers are joined

Eutectic Wafer Bonding: Step 4 Cooling Melting temperature Temperature x (µm) Time 1.00 c (a.u.) 0.00 Finally the wafers are cooled down to solidify the interface The remelt temperature is the same as the process temperature

Overview Wafer Bonding Processes * Also referred as: SLID solid liquid inter-diffusion

Transient Liquid Phase Wafer Bonding High melting material Low melting material Temperature Melting temperature Low melting material Time High melting material Melting Point of the low meting material defines process temperature Thickness of the low melting material and diffusion coefficient define process time

TLP Wafer Bonding: Step 1 Contacting Temperature Melting temperature Time Wafers are aligned and brought into contact Due to surface roughness no direct joint of the materials

TLP Wafer Bonding: Step 2 Heating Temperature Melting temperature Time - Interdiffusion Diffusion start already in solid state Slow process but fast heating ramps with high uniformity improve process Sill interface between the wafers as the gaps are not closed in the solid state

TLP Wafer Bonding: Step 3 Reach Process Temperature Temperature Melting temperature Liquid Time Liquefaction of the low melting material Closing of the interface gaps and joint of the wafers -Liquid Interdiffusion Fast process due to the higher mobility of the atoms

TLP Wafer Bonding: Step 4 Isothermal Process Melting temperature Temperature Liquid Time Material composition changes due to diffusion The alloy with higher melting point solidifies

TLP Wafer Bonding: Step 5 Cooling Melting temperature Temperature Time Finally the whole Interface is solid and the wafers are cooled down The remelt temperature is now higher than the process temperature

Metal Based Wafer Bonding Processes TLP (Transient Liquid Phase) Bonding Exemplary work done at EV Group regarding Cu-Sn TLP Bonding A B C D E 1 2 3

Outline Introduction Vacuum Encapsulation Metal Bonding Overview Conclusion

Overview Metal Wafer Bonding Techniques Solder Bonding Eutectic Bonding Metal TC Bonding Liquid Phase Yes Yes, local No Roughness Req. Low Medium High Feature Size Medium/Large Medium Small GaAs Au:Sn layer InP Au:Sn eutectic Bonding Ni-Sn TLP Bonding Cu-Cu Bonding

Conclusion MEMS devices gained a significant role in various applications areas as consumer products, medical devices, automotive Sensor fusion is the next trend in MEMS manufacturing, driven by IoT, embedded sensing & wearables Integrated combo sensors with different vacuum requirements are challenging wafer bonding Combining the right bonding process with the right integration scheme is key Material and temperature management are difficult (e.g. getter vs. CMOS integration) Low-T thermo-compression bonding will play an increasing role for future, high performance MEMS devices

Thank you for your attention! Please visit us at Booth #1324 Roland Weinhäupl, r.weinhaeupl@evgroup.com Data, design and specifications may not simultaneously apply; or depend on individual equipment configuration, process conditions and materials and may vary accordingly. EVG reserves the right to change data, design and specifications without prior notice. All trademarks, logos, website addresses or equipment names that contain the letters or words "EVG" or "EV Group" or any combination thereof, as well as the following names and acronyms are registered trademarks and/or the property of EV Group: ComBond, CoverSpin TM, EZB, EZ Bond, EZD, EZ Debond, EZR, EZ Release, GEMINI, HERCULES, HyperIntegration, IQ Aligner, LowTemp TM, NanoAlign, NanoFill TM, NanoSpray TM, NIL-COM, NILPhotonics TM, OmniSpray, SmartEdge, SmartView, The Triple "i" Company Invent- Innovate-Implement, Triple i. Other product and company names may be registered trademarks of their respective owners.