High Yield Dicing of 100 mm and 150 mm SiC Wafer with High Throughput

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High Yield Dicing of 100 mm and 150 mm SiC Wafer with High Throughput Hans-Ulrich Zühlke (3D-Micromac, Chemnitz) Dirk Lewke (Fraunhofer IISB, Erlangen)

Content 1. Motivation 2. Basics of TLS-Dicing 3. A yield study for SiC-dicing 4. Quality aspects 5. Cost aspects 6. Conclusion

Motivation microdice separates wafers into dies State of the art: mechanical sawing Alternative: laser ablation or modification

Motivation State of the art is mechanical sawing with some disadvantages: Chipping and micro cracks Delamination of back side metallization Street width requirements Problems with materials like SiC or low-k Dohnke et. al: Comparison of different novel chip separation methods for 4H-SiC, Proceedings of ECSCRM conference, Grenoble 2014

Motivation Alternative laser dicing shows also some disadvantages: Micro cracks Significant heat affected zone Problems with back side metallization Dohnke et. al: Comparison of different novel chip separation methods for 4H-SiC, Proceedings of ECSCRM conference, Grenoble 2014

Motivation 4 inch 6 inch Transition from 4 to 6 has been started 600 500 400 300 200 100 0 SiC device market is growing 2015 2016 2017 2018 2019 2020 2021 Market in Mio. $ Source: Yolé: Power SiC 2016: Materials, Devices, Modules, and Applications report June 2016

Our Solution: microdice Up to 300 mm (12 ) wafer size Integrated laser sources with long lifetime Integrated patented micro stretching function Automated wafer handling SECS / GEM interface Compatible with common SEMI standards Consumables: only DI-water microdice

Content 1. Motivation 2. Basics of TLS-Dicing 3. A yield study for SiC-dicing 4. Quality aspects 5. Cost aspects 6. Conclusion

Thermal Laser Separation (TLS) Starting point (and optional straightness) defined by scribe TLS is a cleaving process, driven by heat and cooling Cooling Laser Initial scribe or Continuous scribe

Advantages of TLS-Dicing on microdice TLS is a cleaving process

Advantages of TLS-Dicing on microdice Very high separation quality TLS is a cleaving process Si (approx. 400 µm thick) after TLS cleave and I-Scribe

mm/s Advantages of TLS-Dicing on microdice Very high separation quality High throughput 250 200 TLS is a cleaving process 150 100 50 0 Standard saw US supported saw TLS-Dicing

Advantages of TLS-Dicing on microdice Very high separation quality High throughput TLS is a cleaving process Low Cost of Ownership

Advantages of TLS-Dicing on microdice Very high separation quality High throughput TLS is a cleaving process Less design rule requirements Low Cost of Ownership TLS diced diode on 110 µm thick 4H-SiC wafer

Characteristic Results SEM image of a TLS diced 110 µm thick 4H SiC diode. Scribe depth approx. 13µm Smooth sidewall with fracture marks back side metallization

Content 1. Motivation 2. Basics of TLS-Dicing 3. A yield study for SiC-dicing 4. Quality aspects 5. Cost aspects 6. Conclusion

A Yield Study Objectives of study Demonstrate repeatability of dicing yield for SiC power devices (diodes) Demonstrate transferability to 6 inch wafer Experimental approach Real product wafer was used Target was to cut large dies => a cluster of smaller dies was used

Yield Results Comments on Categories

Characteristic Result Pattern Minor deviation Smaller than kerf width Not yield relevant Major deviation Yield relevant Major deviation in edge exclusion Not yield relevant

Yield Calculation and Results Case A (w./o. edge) Category % Perfect 97,97 Minor straightness deviation 0,94 Major straightness deviation 0,23 Cleave failure by outer metal ring 0,83 Yield (all usable dies) 98,91

6 Inch 4H-SiC Wafer Blank 6 inch 4H-SiC wafer 350 µm thick Back side metallization thickness: 1 µm Yield up to 97% 21 10/7/2016 3D-Micromac AG 2016

Content 1. Motivation 2. Basics of TLS-Dicing 3. A yield study for SiC-dicing 4. Quality aspects 5. Cost aspects 6. Conclusion

Quality Aspects - Electrical Parameters Typical value at 1200V: 9µA x All values in spec according data sheet Yield after packaging: 99.05 % SiC-JFET, Wafer thickness 160 µm, Die size 3.16 X 3.16 mm², Back-side metal, mounted on DCB Dohnke et. al: Comparison of different novel chip separation methods for 4H-SiC, Proceedings of ECSREAM conference, Grenoble 2014

Quality Aspects Particles Standard case: Particles not significant Housing / mounting w./o. cleaning possible Special case: Improved scribing method Laser scribe Particle film Standard scribe Laser scribe No particle film Curtesy of Fraunhofer IISB Improved scribe

Content 1. Motivation 2. Basics of TLS-Dicing 3. A yield study for SiC-dicing 4. Quality aspects 5. Cost aspects 6. Conclusion

Throughput Calculation Wafer: 150 mm SiC Back side metal 160 µm thickness 1 mm die edge length PCM in street 70 µm street with Wafer p. h. mechanical saw TLS 4,3 Parameter: Speed 200 mm/s for TLS 4 mm/s for mech. saw 0,4 mechanical saw TLS

Cost Calculation Considered: Throughput: 4 wafer per hour Consumables (saw blades) Invest/depreciation for tool Footprint Not considered: Benefit in terms of yield Reduced operator costs mechanical saw: 37 TLS-Dicing : 2.40

Content 1. Motivation 2. Basics of TLS-Dicing 3. A yield study for SiC-dicing 4. Quality aspects 5. Cost aspects 6. Conclusion

Benefits and Design Rules of TLS-Dicing Benefits: Design rules: TLS offers for SiC: High yield High throughput Dicing Quality is high Significant lower cost per wafer TLS has less design rules Same tool configuration works for Si Metal (PCM) in street is ok (will be opened by scribe laser) Large front side metal structures require additional clearing step Aspect ratio for die edge length: 1 to 4 Aspect ratio for BS-metal 1 to 100, higher with slightly bending Polyimide open street >= 70 µm

Conclusion Dicing of SiC wafer with yield >= 98% shown Transfer from 4 to 6 inch successful demonstrated We use usually shallow continuous scribe at surface A few particles are generated, for many products no cleaning required For some products a improved scribe method was successfully tested Outstanding throughput & cost benefits

TLS-Dicing - Cooperation with Fraunhofer IISB More then 9 years of successful cooperation Courtesy Fraunhofer Gesellschaft Experienced scientists Wide range of measurement tools Equipped with the latest version of TLS-Dicing tool in clean room Special thanks to our EU-project partners TLS-Project partly funded by European Union contract 611332 SEA4KET

Thank you for your attention! 3D-Micromac AG Dr. Hans-Ulrich Zühlke Technologie-Campus 8 09126 Chemnitz, Germany Visit us at booth #1125 http://3d-micromac.com Phone: +49 371 400 43 922 E-Mail: zühlke@3d-micromac.com