Volume 1 Issue 4 MAY 2007 The newsletter for the thermal management of electronics 1 In this issue: Future Cooling FUTURE COOLING Thermal Management and Packaging Challenges of High Power Devices 5 8 11 14 Thermal Minutes Thermal Analysis Thermal Fundamentals Cooling News Market requirements for higher frequency signal processing, and limits on the passage of electrons through metallic media, have forced the electronics industry to use smaller packages. But, the higher frequencies have created a unique power dissipation that exceeds standard packaging options on the market. This combination of power dissipation and small packaging is creating heat fluxes that are beyond today s conventional cooling technologies. Engineers face the dilemma of cooling these high power devices at either the package or the system level. The following explores these power and packaging challenges, and highlights the issues confronting designers in choosing or developing successful solutions. First, let s look at the issue of power and frequency. Device power dissipation as a function of frequency and number of gates is shown below: 5 million gate device operating at 200 MHz. Table 1. Device total power dissipation for a clock frequency of 200MHz and gate power switching requirement of 0.15 µw/ng/mhz [1]. Gate switching power Frequency 0.15 µw/ng/mhz 200 MHz No. Gates (NG) 5x10 6 Device Total Power 150W The direct implication of frequency is clearly demonstrated in the commonly used broadband applications that we see in the marketplace today, Table 2. Table 2. Power requirement per line for narrow and broadband communication technologies [2]. 16 Who We Are Power Dissipation (W) ~ SwitchingPower(µW/NG/MHz) X No. Gates X Frequency (MHz) Communication Technology Average Power Per Line Narrowband 0.5W 1W Peak Power Per Line Table 1 shows the impact of frequency on a Broadband 5W 10W Copyright Advanced Thermal Solutions, inc. 89-27 Access Road Norwood, MA 02062 usa T: 781.769.2800 www.qats.com Page 1
To deliver higher frequency and consequently higher power devices, thermal management becomes a challenging gating factor and an important role in thermal performance of the system. To effectively design or select a cooling system, one needs to consider the heat flow path from the source to the sink. Figure 1 shows the path of heat flow: Internal module Interfacial and spreading External These challenges are: 1. Achieving and maintaining the chip-to-cap gaps due to the close proximity, noncoplanarity and tilts of the multiple chips. 2. Chip and capacitor re-work. 3. Sealing the MCM to prevent dry-out of the thermal paste and corrosion of the C4s (Controlled Collapse Chip Connections). 4. Maintaining the package s mechanical integrity during the assembly process and operating life. Heat Source Chip Package Interface Contacts Cooling System Environment Figure 2a shows the MCM chip carrier, and Figure 2b shows the copper cap, where a special thermal paste was designed to fill the gap and provide a heat transfer path to the exterior of the package (see Figure 3). Cooling System Figure 1. Thermal transport from the sink to the source [2]. In this process, the environment is the ultimate sink into which the generated heat is eventually discharged. This environment can be the surrounding air or a water reservoir. To successfully design or select a cooling solution, the cooling system box embracing the chip package, interfacial contacts, spreading resistance and the cooling device (e.g., heat sink) needs to be carefully considered. In addition to the increasing heat fluxes, packaging issues pose a major challenge. Take, for example, the integration of a small die in a larger package. To accommodate the thermal management, thermal spreaders are often used to cap the die, resulting in contact and spreading resistances that can become the negating factors. Sikka, et. al. highlight the thermal and mechanical challenges of a multi-chip module (MCM) used in a high-end system [3]. Figures 2a and 2b. Chip and thermal paste carrier for IBM MCM package [3]. Copyright Advanced Thermal Solutions, inc. 89-27 Access Road Norwood, MA 02062 usa T: 781.769.2800 www.qats.com Page 2
Solder SGT Piston ATC Chip Carrier Copper Hat Shims C-Ring Cushion Base Plate considered a perfect contact at different interfaces, resulting in a dramatic 15 o C temperature reduction. But once contact resistance and the TEC s electrical performance were taken into account, the improvements were on the order of a few degrees. The authors correctly conclude that the the thermal contact resistance plays a dominant mitigating role. Microchannel cold plate Figure 3. Cross section schematic of MCM [3]. TFTEC Micro/Nano particle laden TIM Figure 4 shows the application of the specially designed, thermally conductive compound. The material is applied using a screen template, due to the challenges described above. Figure 4. Application of a thermally conductive compound on the MCM [3]. Figure 4 shows the design details required to properly apply and implement thermal interface materials, ensuring that the heat from the dies is carried to the exterior of the package. Any voids or additional contact resistances that may occur with the use of these compounds will thermally jeopardize the device. To minimize the junction temperature of a high power device, an interesting concept by Yavatkar and Tirumala using a Thin Film Thermo Electric Cooler (TFTEC) has been proposed [4] (see Figure 5). In this case, the TFTEC is embedded on the backside of the die, and a microchannel cold plate is used for the thermal transport. Their initial study Figure 5. A futuristic microprocessor package using microchannels and an embedded thermoelectric device [4]. Considering the small die size and the high power dissipation, spreading resistance will play a pivotal role in the choice of the package type and the cooling system. In such devices, spreading resistance is often the largest resistor on the path of heat transfer. Its minimization results in successful thermal design. Spreading resistance occurs because of unequal contact area between the heat source and the sink. The magnitude of spreading resistance is a function of several parameters, including: Source area, A s, the smaller the area, the higher the R spreading Conductivity of the base plate, k: Higher k means lower R (almost R ~1/k, i.e., by choosing Al, Cu, diamond, heat pipe, or a vapor chamber) Area ratio (A source /A heat sink ) : If this ratio approaches 1, the spreading resistance drops to 0 Heat convection coefficient above the base plate, higher h means lower R Copyright Advanced Thermal Solutions, inc. 89-27 Access Road Norwood, MA 02062 usa T: 781.769.2800 www.qats.com Page 3
The thickness of base plate, t b, the higher the t b, the lower the R (not a strong relation) Figure 6 shows the impact of source size on spreading resistance for an 80 x 80 x 5 mm copper plate. Figure 7 shows the effect of conductivity for a 10 x 10 mm source size and an 80 x 80 x 5 mm plate. for a given application. An innovative concept from Advanced Thermal Solutions minimizes spreading resistance by using a Forced Thermal Spreader (FTS) in a package [6]. Figure 8 shows the schematic design of such a package. Thermal spreading resistance ( o C/W) 0.25 0.20 0.15 0.10 0.05 L heat source /L baseplate =1/8 Baseplate : 5mm thick solid copper FORCED HEAT SPREADER ACTIVE BGA PACKAGING FAN DIE HEAT SINK 0.00 0 10 20 30 40 50 Side length of heat source (mm) Figure 6. Effect of source planar area on spreading resistance. Thermal spreading resistance ( o C/W) 0.6 0.5 0.4 0.3 0.2 0.1 Aluminum Heat source: 1cm X 1cm Baseplate: 8cm X 8 cm X 5 mm Copper Diamond 0.0 100 1000 10000 Thermal conductivity (W/mK) Figure 7. Effect of heat sink material on spreading resistance. Figure 8. A BGA package with forced thermal spreader, Active BGA (patent pending, Advanced Thermal Solutions, Inc.) [5]. The Forced Thermal Spreader distributes the concentrated heat of the small die to the larger base area of the heat sink. The heat sink then transfers the heat to the ambient. The built-in FTS combines microchannels and minichannels in the silicon package. The water flow rate inside the channels is approximately 0.5~1.0 L/min, and the FTS is directly bonded to the die. Simulation results for this novel packaging are shown in Table 3. Columns one, two and three depict the planar area of the heat sink, the total and the conductive resistance for a heat sink made of a material with thermal conductivity equal to or higher than diamond. The die size for this study was 10 x10 mm. As can be seen from the examples in Figures 6 and 7, substantial reduction in spreading resistance can be attained if the parameters described above are optimized Copyright Advanced Thermal Solutions, inc. 89-27 Access Road Norwood, MA 02062 usa T: 781.769.2800 www.qats.com Page 4
Table 3. Thermal performance of the Active BGA cooling system with a die size of 10 x 10 mm [5]. Heat sink baseplate area (mm) 80X80 100X100 120X120 Total thermal resistance (K/W) 0.077 0.060 0.055 Solid material conductive (K/W) (k 2000 W/mk) 0.048 0.034 0.030 Along with optimizing the spreading resistance, thermal transport needs to be managed, in order to dissipate the high heat fluxes in today s electronics. One such an example is provided by Colgan, et. al., [6]. In their application, the chip needed to operate at 400 W/cm 2. Microchannels were fabricated inside the package, in order to provide the required cooling for operating this chip. Figure 9 shows the schematic of this package, and Figures 10a and 10b show the cross-section and the sub-assemblies required to put the package together. Figure 9. 3-D rendering of the assembled microchannel cooler [6]. 10a Figure 10 a & b. Schematic cross-section of the microchannel cooler integrated in a single chip module, and components for the microchannel SCM assembly [6]. Colgan, et. al. report that the attained heat flux for the desired junction temperature exceeded 400 W/cm 2. The flow rate was 1.2 L/min, and the pressure drop was 30 kpa. Industry trends clearly point to increased power dissipation in modern electronic devices. High power devices - those with heat fluxes exceeding 250 W/cm 2 - pose unique thermal and mechanical packaging issues. The topics and research presented here show that contact and spreading resistances are the mitigating factors for successful design. The work of many researchers shows that successful implementation of high power devices requires a departure from standard packaging. Use of silicon embedded with microchannels, Forced Thermal Spreaders, or other packaging concepts is a departure from the norm that requires rethinking of the entire system architecture. To move these packages from specialty to mainstream electronics will require fundamental restructuring of coolant delivery systems, cooling system reliability and thermal management budgets. References: 1. Azar, K., Advanced cooling concepts and their challenges, Therminic Conference, 2002. 2. Azar, K., Electronics Thermal management - Cooling today s and tomorrow s packages and systems, LTDF, 2000. 3. Sikka, K, et.al., Multi-chip package thermal management of IBM z-server systems, ITHERM, 2006. 4. Yavatkar, R., and Tirumala, M., Platform wide innovations to overcome thermal challenges, THERMES, 2007. 5. Forced thermal spreader characterization for an active_bga, Internal memorandum, R&D Department, Advanced Thermal Solutions, Inc., 2006. 6. Colgan, E., et. al., A practical implementation of silicon microchannel coolers for high power chips, SEMITHERM, 2005. Copyright Advanced Thermal Solutions, inc. 89-27 Access Road Norwood, MA 02062 usa T: 781.769.2800 www.qats.com Page 5 10b