Design and Characterization of Thermal Conductive Wafer Coating in Thin Small Outline Package for Automotive Product Application

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Design and Characterization of Thermal Conductive Wafer Coating in Thin Small Outline Package for Automotive Product Application Azhar Abdul Hamid, Dhanapalan Periathamby, *Suhaimi Azizan, Chee Eng Tan, Siva Kumar S.Nadarajan ON Semiconductor Malaysia Sdn. Bhd. Lot 122, Senawang Industrial Estate, 70450 Seremban, Negeri Sembilan, Malaysia *Email: Suhaimi.Azizan@onsemi.com, Tel: +6-06-682 1130, Fax: +6-06-678 2262 Abstract The thermal conductive die attach (DA) material is very important component and it is function to create a joint between die and leadrame as well as to dissipate heat from die throughout the package. However, the dispensing DA material is giving problems, which is epoxy overflow, die tilted especially when dealing with small die size (ranging 15 to 30 mils). Because of this problem, industries are using nonconductive dispensing epoxy without metal content and resulting good for manufacturing. There is another problem when using nonconductive epoxy which reducing in thermal and performance of the device. In this paper, we presents conductive material coated at backside of wafer (conductive WBC) and giving excellent thermal and device performance and good for integrated device assembly manufacturing. In the most stringent automotive application, device performance is critical to component level. The small and thin die assembled in Thin Small Outline Package (TSOP), good thermal conductive die attach material is required, together with excellent robustness in oxidation control, manufacturability and reliability. Upon completion of multiple material screening, wafer back coating (WBC) material had selected. It is thermal conductivity can reach approximately 2.2- W/mK and which is enough for lower power devices as well as good in thermal conductivity. With all the improved assembly processes, conductive wafer coated material achieved good manufacturability, excellent thermal performance, meeting customer specification and ready for high volume manufacturing. 1. Introduction All major electronic devices require regulators in running the power conversion, mainly from alternate current to direct current (ac to dc) and direct current to direct current (dc to dc) [1, 2]. These devices are widely used in the market, including mobile phone, GPS, smartphones, wireless LAN, Bluetooth, ZigBee, portable medical equipment, solar panel and battery-powered application [1, 2, 3]. A good regulator provides a very stable, accurate voltage with low noise and excellent power dissipation (P D ) [4]. The P D has direct correlation to temperature-junction-to-ambient (θ JA ) [5]; therefore, die attachment to leadframe flag requires a good thermal conductive material. The conventional epoxy dispense method for die attachment technology is common used in the semiconductor packaging industry [6, 7]. There are several problems with this process for instance epoxy shorting to lead-frame, epoxy overflow to die surface, epoxy voiding, tilted die and etc. [6, 7, 8]. Due to these problems, semiconductor industries and their suppliers was introduced wafer back coating (WBC) to overcome this. Many type of WBC technique have developed such as screen print and spin coating [8]. This study is using screen print to process the WBC material. This method is having several advantages. It can use for small gap between die and lead and for small die size [6]. Furthermore, advance adhesive technology, giving WBC material having high modulus even at 300 C [9]. Due to this achievement, hence material is able to pass reflow temperature at 260 C. Superior thermal conductivity more than 10 W/mK is make this material became popular for semiconductor manufacturers [7]. However, this material was required temperature during die attachment process and hence upgrading equipment is required. On top of that, there are some challenges this material. Those challenges will discuss further in this paper. 2. Methodology The assembly started with coating on wafer backside with a layer of thermal conductive material. By utilizing welldesigned stencil and process parameters, material layer can be controlled to be as tight as few microns tolerance. The wafer thickness 200 µm and 150 µm have selected. The thickness had chosen because of process capability and package requirement. Due to automotive application and small package have needed, Thin Shrink Outline Package (TSOP) had selected in this study. The package had designed by having just bare copper on the flag to enhance delamination and package robustness. The leadframe has same design and features for both silver and bare copper flag. Prior to evaluation for die attach process; leadframestaging time has tested for both open and close environment. The staging time is set with 10, 20, 30, and 40 minutes. Figure 1 is shown comparison between silver plated and bare copper flag leadframe. Figure 1: a) Silver plated; b) bare copper flag leadframe The subsequent process is die attach. There is a challenges include oxidation control because work stage requires having bonding temperature and with open environment. The bonding temperature is set at 180 C to bond die coated with WBC epoxy attaching to the leadframe flag.

Overall WBC process step shows in Figure 2. a) Bare wafer b) WBC attach to wafer by Screen print c) B-stage curing cutting step with chilled water were used to saw the wafers. Thinner die is shown better quality compared to thicker die because amount of silicon is lesser for thinner die compared to thicker die. Due to this, the thinner wafer easier to cut and saw blade will able to sustain more longer life span compared to thicker wafer. Details of experiment and characterization of wafer saw process would not discuss in this paper. Figure 4 is shown die crack for 200 µm die while no sign of crack from 150 µm die after running few experiments. d) Wafer mount e) Wafer sawing f) Die attach onto Leadframe Figure 2: WBC process step However, the temperature would also result in oxidation on leadframe surface, which has plating of copper. A strongfeatured close tunnel track was designed and installed to the die attach machine to make sure oxidation stable for manufacturing process. A gas had applied during the die attachment process need further enhance preventing from flag oxidation. Figure 3 shows comparison between standard and tunnel track die bonder. Figure 3: a) Open area; b) Close tunnel track design Figure 4: a) 200 µm die thickness; b) 150 µm die thicknes 3.2 Leadframe staging test There is oxidation was observed for standard die bonder configuration without tunnel after 5 minutes. The oxidation was take place when leadframe attach onto die bonder s heater block. However, after proper installation of track with tunnel kit, the Leadframe had shown no oxidation for 10, 20, 30, and even more than 40 minutes. This is because the leadframe fully covered from the environment even exposed onto high temperature heater block. The inlet gas is also help to prevent the leadframe from oxidize. Figure 5 had shown oxidation had occurred with standard die bonder. Meanwhile Figure 6 had shown no leadframe oxidation with tunnel track. The oxidation easily take place since the leadframe is expose to environment and with high temperature is apply onto it. This is not good for manufacturing especially in pattern recognition system and for reliability delamination. Meanwhile, for close tunnel track design the leadframe able to maintain zero oxidation for longer time. The leadframe had exposed onto die bonder s heater block ranging between 10 to 40 minutes. The process is to ensure tunnel track design robust for oxidation and good for manufacturing. Finish good of the product then subject MSL 1 to check delamination level as well as TMCL, HTSL, and HTOL test. The samples of device have characterized for junction-ambient temperature and power dissipation. a) 5 minutes staging time Figure 5: Oxidation without tunnel track 3. Results and Discussion 3.1 Wafer saw process The 150-µm wafer thickness had shown good quality compared to 200-µm thickness. There was presence of die crack during die attach process for thicker wafer. Two time b) 10 minutes staging time

kilograms c) 20 minuets stagging time d) 30 minutes stagging time e) 40 minutes stagging time Figure 6: No oxidation with tunnel track Figure 9: No WBC material stick onto Mylar tape 3.3 Die bond process The process is continuing which the die had attached onto the leadframe. During this process, there are randomly WBC material remain or stick with Mylar tape after die bond pick and place for 200 µm die. Using high power scope, there is die crack was observed. This is happen due to this die thickness not robust for wafer saw. Figure 7 had shown WBC stick onto Mylar tape while figure 8 is shown die crack from side view. Figure 10: No Die crack from side view The bonding strength between die and ledframe were tested. Die shear test is shown die bonding strength is 1.4 kg in average which is higher than lower specification limit (LSL) 0.320 kg for 20 mils die size area and the Cpk is shown above 1.67 which is good for manufacturing. Figure 11 is shown failure mode of die shear strength. Meanwhile, the chart in Figure 12 is shown die shear strength for WBC material and it had tested for 33 samples. Figure 7: WBC material stick onto mylar tape Figure 11: Die shear failure mode Figure 8: Die crack from side view Meanwhile, the 150 µm die thickness had shown there is no WBC material remains or sticks on Mylar tape. It is no presence of die crack as well from side view. Figure 9 had shown no WBC stick with Mylar and figure 10 had shown there is no die crack from side view. 1,800 1,600 1,400 1,200 1,000 800 600 400 200 0 Die Shear Strength LSL 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 Figure 12: Die shear strength for WBC samples

3.4 Wire bond process The die with WBC had validated for wire bonding process. For initial development, the device has using gold wire. This is to reduce variable or noise factor and focus more on WBC qualification. On top of that, all safe launch lots are running at the same time with the same equipment set, same material batch, as well as same bonding tools. The result is shown very positive and passing all wire bonding requirement. The wires pull and ball shear data have taken from 8 lots and for 30 samples of each lot. The Cpk for wire pull and ball shear strength are more than 1.67. The wire pull strength is 6.9 gram in average and lower specification limit set is 2.5 gram. While 31.4 gram is average for ball shear strength and lower specification limit is set at 8 gram. Based on box plot, wire pull strength had shown very stable for all eight lots in figure 13. In the meantime, in figure 14, balls shear strength also showing very robust for all lots. These results are giving indicator that the WBC material is sticking well between backside die and the leaframe also the material has well cured. There is no wire sweep after molding process. Final test had shown yields are over 99% for three qualification lots. Even there are parametric defect but it has related to device level. 3.5 Reliability test There is no die delamination was observed during pre and post preconditioning by using Scanning Acoustic Tomography (SAT) test. A delamination test result is in figure 15a for before preconditioning and figure 15b for post preconditioning. Figure 15a: SAT result pre preconditioning Wire Pull Strength Lot A Lot B Lot C Lot D Lot E Lot F Lot G Lot H Figure 13: Wire pull strength of safe launch lots Ball Shear Strength Lot A Lot B Lot C Lot D Lot E Lot F Lot G Lot H Figure 15b: SAT result post preconditioning The other thing is TMCL, HTSL, and HTOL have shown passed the entire requirement. The devices have sent to characterization lab and the results able to meet 1.28 watt for P D and 97 C/watt for θ JA for WBC samples, meanwhile nonconductive material (as control material) can only achieve 0.88 watt and 150 C/watt for P D and θ JA respectively. 4. Conclusion Figure 14: Ball shear strength of safe launch lots The equipment kit had successful designed and tooling up with close tunnel track together gas inlet. The combination set have proven stable in oxidation and corrosion on leadframe and provides longer manufacturing processing time for at least 40 minutes had achieved. Wafer saw is able to process with 150 µm or 6 mils wafer thickness with WBC material without any major problem. Die attach process is

shown good adhesion strength between die and leadframe. The wire pull and ball shear have robust and very stable for wire bonding process. Beside that, molding and final test results have shown good quality with minimal defect. The other important results are no die delamination before and after preconditioning, this is giving that WBC material, and processes have passed qualification and meet requirement. Based on all results, TSOP device can pass all the MSL- 1 requirements, together with excellent delamination performance for automotive product. The improved device with thermally conductive wafer coated material achieved good manufacturability, excellent thermal performance, meeting customer specification and ready for high volume manufacturing. 8. Loh Kian Hwa et al, A Comparison Study of Different Wafer Backside Coating Technologies, IEEE 36th International Electronic Manufacturing Technology Conference, 2014. 9. Tony Winster et al, Wafer Backside Coating. of Electrically Conductive Die Attach Adhesives for Packaging of Discrete Semiconductor Devices, IEEE 10 th Electronics Packaging Technology Conference, 2008. 5. Acknowledgements The Authors would like to thank all the members from ON Semiconductor for their hard work throughout the design and development of conductive wafer back coating for TSOP leaded package line. Special thanks to ON Semiconductor Seremban for provide facility, equipment, and materials for this project. 6. References 1. M.Moussa et al, Regulated AC/DC/AC Power Supply using Scott Transformer, IEEE 6 th International Power Electronics, Machinesand Drivers Conference, 2012. 2. Luo-Qi Soh et al, Building of a Portable Solar AC and amp; DC Power Supply, IEEE 5 th International of Intelligent Systems, Modeling and Simulation Conference,2014. 3. Suman Dwari et al, Efficient Low Voltage Direct AC/DC Converters for Self-Powered Wireless Sensor Nodes and Mobile Electronics, IEEE 30 th International Telecomunications Energy Conference, 2008. 4. Hicham et al, Fast Transient Response Low Drop Out Voltage Regulator, International Journal of Embedded Systems and Application, 2014. 5. R. Menozzi et al, A New Method to Extract HBT Thermal Resistance and Its Temperature and Power Dependence, IEEE Transactions on Device and Materials Reliability, 2005. 6. David Chong et al, Feasibility Study on Replacing Conventional Epoxy Dispensing with Wafer Back Coating Epoxy for QFN Packages for Discrete Product, IEEE 33 rd International Electronics Manufacturing Technology Conference, 2008. 7. C.E. Tan et al, Breakthrough Development of New Die Attach Method with High Conductive Wafer Back Coating, IEEE 17 th Electronics Packaging Technology Conference, 2015.