More on VLSI Fabrication Technologies Emanuele Baravelli
Some more details on: 1. VLSI meaning 2. p-si epitaxial layer 3. Lithography 4. Metallization 5. Process timings
What does VLSI mean, by the way? Technology era Date Complexity (# of logic blocks/chip) Single transistor 1959 <1 Unit logic (1 gate) 1960 1 Multi-function 1962 2 4 Complex function 1964 5 20 Medium Scale Integration (MSI) 1968 20 200 Large Scale Integration (LSI) 1972 200 2.000 Very Large Scale Integration (VLSI) 1978 2.000 20.000 Ultra Large Scale Integration (ULSI) 1989 20.000...
p-si epitaxial layer The p+ doping of the substrate reduces the susceptibility to some parasitic phenomena (e.g. Latchup) Furthermore, the p-epitaxial layer provides improved quality and fewer defects P+ substrate thickness: < 1 mm P-epi layer thickness: 5 15 µm p-epitaxial layer Diameter = 75 to 230mm P+ -type wafer < 1mm
Lithography (I) Mask size and wavelengths The desired pattern is projected onto the wafer in either a machine called a stepper or scanner. The stepper/scanner functions similarly to a slide projector. Light from a mercury arc lamp or a particular kind of laser is focused through a complex system of lenses onto a "mask" (also called a reticle) containing the desired image. The light passes through the mask and is then focused to produce the desired image on the wafer through a reduction lens system. The reduction of the system can vary depending on design, but is typically on the order of 4X-5X in magnitude. The ability to project a clear image of a very small feature onto the wafer is limited by the wavelength of the light that is used and the ability of the reduction lens system to capture enough diffraction orders off of the illuminated mask. Current state-of-the-art photolithography tools use Deep Ultraviolet (DUV) light with wavelengths of 248 and 193 nm, which allow minimum feature sizes on the order of 130-90 nm. Also in development are tools that will use 157 nm wavelength in a manner similar to current exposure systems. In addition, Extreme Ultraviolet (EUV) radiation lithography systems are currently under development which will use 13 nm wavelengths, approaching the regime of x-rays.
Lithography (II) Lithography VS Scaling:
Lithography (III) More lithography tricks Sharp features (e.g. corners) are lost because diffraction attenuates & distorts higher spatial frequencies (low-pass optical filtering) Compensate for diffraction effects for features much smaller than exposure λ manage sub-λ constructive & destructive interference Software complexity during mask fabrication Optical proximity correction (OPC) Add scattering features to sharpen corners Phase Shift Masking (PSM) Modulate optical path through mask
Lithography (IV) Stepper The reticle must be stepped across the wafer and exposures made at many different positions in order to replicate the pattern across the entire wafer Typical throughput: 20 wph (= wafers per hour)
Metallization: 2 techniques 1. Chemical Vapor Deposition (CVD) Chemical vapor deposition (CVD) is a method of forming dense structural parts or coatings using the decomposition of relatively high vapor pressure gases. Gaseous compounds of the materials to be deposited (e.g. metals) are transported to a substrate surface where a thermal reaction/deposition occurs. The wafers are mounted in a frame that holds their exposed surfaces toward a crucible containing the material (e.g. Al). When the crucible is heated (the very high temperature, >600 C for Al, is inside the crucible), some of the material evaporates and deposits on the wafer surfaces. 2. Physical Vapor Deposition (PVD) Al metal layers can also be deposited through Physical Vapor Deposition (PVD) by sputtering. Sputtering may be described as a series of four steps: 1) high-energy ions are generated and are used to bombard a target (the source of material for deposition); 2) the ions sputter (eject) atoms from the target; 3) the sputtered atoms reach the substrate; and 4) the sputtered atoms condense and form a thin film over the substrate. This is a low-temperature process
Process timings (data 2000) Throughput of photo equipment (wafers processed per stepper per day): STP = 1000 for logic, 600 for memory Direct labor productivity (wafer layers per operator per day): DLP = 85 for logic, 55 for memory Cycle time per mask layer (days): CTPM = 1.2 for both logic and memory