Memory devices for neuromorphic computing

Transcription

1 Memory devices for neuromorphic computing Fabien ALIBART IEMN-CNRS, Lille Trad: Toutes les questions que je me suis posé sur le neuromorphique sans jamais (oser) les poser

2 Introduction: Why ANNet New needs for computing Recognition, Mining, Synthesis (Intel) Increase of Fault (nanoscale engineering) SEMICONDUCTOR TECHNOLOGY CHALLENGES Saturation of clock frequency + Energy consumption Von Neumann bottleneck Shift toward a new paradigm for computation BIO-INSPIRED COMPUTING to match the brain performances (low power consumption, fault tolerant, performances for RMS)

3 Supercomputer resources Purely digital NNET directions neurons synapses Emerging nanotechnologies New architecture concepts and integration strategies Custom IC, Mix analog/digital Multichip approach, i.e. with conventional technologies

4 BNNs vs ANNs Biological neural network Artificial neural network NEURON: Summation Thresholding Output activation SYNAPSES: Input weighting Weight adaptation The memory is in the processing unit (Direct solution to Von Neumann bottleneck!)

5 Neuromorphic in between BNNs Neuromorphic Eng. ANNs

6 Outline Intro to Artificial Neural Network (ANNs) Intro to biological Neural Network (BNNs) Nanodevices for ANNs Nanodevices for BNNs STDP: somewhere in between

7 Rosenblatt, 1957 Classification of vectors (datas) sgn() ANNs: basics after training Δw x 1 Input (+1 or -1) +1 0 input Perceptron rule x 2-1 x 3 Output after training Δw x 4 x 5 sgn() y= +1 if +1 if -1 if 1 n w i x i > 0-1 if 1 n w i x i < 0 Delta rule Post-neurons x n Pre-neurons Training/learning: find the optimal weight No analytical solution Learning algorithms: iterative correction based on known data Backpropagation

8 Practically, we can do: Pattern classification, Clustering, Prediction x 1 Input (+1 or -1) Two classes Multiple classes ANNs: basics x 1 x 2 x 3 x 4 input Synaptic weight output y 1 y 2 y 3 x 2 x 3 Output x 5 x 4 sgn() y= +1 if -1 if y m x 5 Post-neurons x n x n Pre-neurons Non linearly separable ensembles

9 ANNs: applications 28x28 pixel array 10 classes 7840 symapses 256x256 pixel array 1000 classes synapses

10 ANNs ANNs: Practical application will required ulra high density of nanodevices Main challenge: GPU or FPGA are serious challengers

11 BNNs: neurons The neuron membrane can be seen as a transmission line (RC) When the membrane potential reach a threshold, a spike is triggered Currents are ionic Low speed of propagation Active devices (soma and Ranvier s node)

12 BNNs: synapses The AP release neurotransmitters from the preneuron to the post neuron receptors Neurotransmitters open ionic channels Ionic concentration change the polarization of the post-neuron Various time scale of plasticity Complex dynamics with many species (ions,nt,..) Unidirectionnal

13 BNNs: learning Learning in BNNs: wij ai aj Who fire together wire together, (Hebbs) Synaptic fixe aj Synaptic adaptation Example, the BCM learning fixe aj

14 Variation of Hebbs rule Unsupervised BNNs: learning with STDP

15 BNNs: No charges (i.e. electrons), only ions Slow, with rich dynamics Still unsolved issues Basics of computing in the brain (coding, ) What do we really need for computing (for practical applictions)

16 Neuromorphic: Main stream for nanodevices The crossbar structure is the perfect architecture for massively parallel processing x 1 input Synaptic weight output x 2 x 3 x 4 x 5 y 1 y 2 y 3 y m It is compatible with back end process on top of a CMOS substrate x n x 1 x 2 x 3 x 4 Development SoC x 5 y 1 y 2 y 3 y 4 y 5 Strukov, PNAS 2009 Footprint 4F devices/cm 2

17 NANO FOR ANNs

18 Crossnet ANNs: synapse, digital or analog? Beck, 2000 Chanthbouala, 2012 L= 2n² +1 states From binary to multilevel to analog

19 ANNs: the analog synapse Papandreou, 2011 (A) 1E-4 1E-5 voltage 0 reset read Decrease Weight Increase set Weight Stand-by (Read only) -200mV ( A) time Pulse Number 120 A 60 A 30 A 15 A 7 A

20 W. Lu, Nanoletters,2011 ANNs: implementations 50x50 pasive crossbar array Binary operation (multilevel, more or less) CBRAM technology

21 Strukov, 2015 ANNs: implementations 12x12 Xbar array (TiO2 memristive devices) Online training (variation of delta rule) Three classes, 60 synapses

22 Burr, IEDM 2014 ANNs: implementations Demo of multilayer perceptron (with backprop) PCM analog synapses

23 Crossbar, IEDM, 2014 ANNs: implementations Record density 4Mb Binary only 100nm half pitch Fully functionnal!

24 Nano for ANNs Still a huge gap betwen requirements and what is available (from the memory perspectives) Do we need learning (i.e. smart memory) or pure memory (i.e. storage + analog) Co-integration still not demonstrated

25 NANO FOR BNNs

26 BNNs: synaptic plasticity (1) STP N n neurotransmiter (NT) activated at spike n S D Recovery of NT with a time t d I f N ) n ( n V IN V OUT charge of N n holes in the NP at spike n Pentacene thin film I n f ( N ) n (Alibart, Adv. Funct. Mat, 2011 Gold nanoparticles Discharge of the holes with a time t d

27 BNNs: synaptic plasticity (2)

28 BNNs: network scale implementations

29 Nano for BNNs Still very emerging No clear idea of applications but a very complex (and exciting!) field Can we map BNNs (ionic systems) with electronic devices (instead of ionic)

30 NANO IN BETWEEN: STDP

31 STDP with memristors pre post

32 STDP: practical implementations

33 STDP: triplet rule

34 STDP No hardware demo at the network level One layer OK, what about multi-layers? STDP but what else?

35 Concluding remarks Neuromorphic in between BNNs and ANNs. Maybe an issue for visibility (what is our community?) Neuromorphic as a bridge between ANNs and BNNs? Doing more than identifying neuromorphic in nano, it is time to built it!

36 Thank you! (One final tip: The hippocampus is not an animal)