Perfect ESD Storm! CDM & Class 0 Converge in Backend. TED Dangelmayer President & CEO

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1 Perfect ESD Storm! CDM & Class 0 Converge in Backend TED Dangelmayer President & CEO

2 Outline Introduction CDM Overview Lessons from the recent past Industry Class 0 Trend It is Real This Time! Backend CDM Issues CDM & Class 0 Countermeasures Conclusions Copyright 2007 Dangelmayer Associates 2

3 CDM + Class 0 Trend = The Perfect ESD Storm! Class 0 Rapidly Growing Trend CDM Technology not Understood by Most Co s CDM = 95% of ESD Failures Copyright 2007 Dangelmayer Associates 3

4 CDM Overview Copyright 2007 Dangelmayer Associates 4

5 Emergence of CDM ESD (90% to 95% of ESD Failures Today) Human Body Model Charged Device Model CDM Video Tweezer Video CDM and related metal-metal discharge events cause 95% of current ESD problems. This will continue to be the underlying driver for ESD control. Copyright 2007 Dangelmayer Associates 5

6 HBM CDM Copyright 2007 Dangelmayer Associates 6

7 HBM and CDM Waveforms (500v) Copyright 2007 Dangelmayer Associates 7

8 Lessons from the Recent Past Copyright 2007 Dangelmayer Associates 8

9 Wafer ESD Model Schematic Wafers Will Experience ESD Damage with Technology Trend! Field plate at V V(t) small cap large cap Small features neglected Large bus Bulk resistance neglected Arc model, I(t)- Includes inductance surface resistance Copyright 2007 Dangelmayer Associates 9

10 Wafer Saw Example CDM Threshold 35 Volts 92.2% Defective at Wafer Saw Failure Analysis CDM Damage Copyright 2007 Dangelmayer Associates 10

11 Class 0 Case Study Corresponding Yield Improvements Overall ESD Yield Loss Improvements 25 ESD Yield Loss (%) % Yield Loss Out of Control Consultant Hired 80% EPM Performance Scale Sycorax Caliban Cordelia T10000A Week Copyright 2007 Dangelmayer Associates 11

12 Class 0 CDM Failure Induced by Tape & Reel Packaging Copyright 2007 Dangelmayer Associates 12

13 Industry Trends It is real this time! Copyright 2007 Dangelmayer Associates 13

14 Typical IC With Protection Circuitry Protection Circuits Constrained or Omitted By: Technology Node Feature Sizes Circuit Functionality I/O Density Speed Protection Circuits Functional Circuitry Copyright 2007 Dangelmayer Associates 14

15 2003 ITRS A recent SEMATECH benchmarking study of integrated circuit suppliers indicated that ESD will be one of the top three reliability concerns within the next 5 years and already is with certain products! Copyright 2007 Dangelmayer Associates 15

16 ESD Threshold Populations including high speed applications ESD Populations including high speed applications Distribution becoming bimodal Relative Frequency HS 1996 HS 2002 HS ESD Threshold (volts) Copyright 2007 Dangelmayer Associates 16

17 Class 0 Devices per Factory Class 0 Devices per Factory Class 0: Virtually all Factories by 2010 #Class0/Factory Year Copyright 2007 Dangelmayer Associates 17

18 ESDA Technology Roadmap (IC Chip Design Experts: With Our Best Effort ) IBM; TI; Intel Ph.D. Chip Design Experts 400 chip design patents HBM Volts CDM HBM CDM MM 500 MM Copyright 2007 Dangelmayer Associates 18

19 Sources of Trend Confirmation ESD Association Roadmap SEMETECH ITRI Roadmap DA Customer Reports / Literature Analysis ESD Stress Test Labs Stress Test Equipment Manufacturers IC Mfg/Design: Intel; TI; IBM; AMD etc. Lowering 2000 volts HBM to 1000 volts FA Labs Subcontractors Foxconn; Jabil; Solectron etc. OEM s Cisco, Nokia, etc. Copyright 2007 Dangelmayer Associates 19

20 Backend CDM Issues Copyright 2003 Dangelmayer Associates 20

21 Copyright 2007 Dangelmayer Associates 21

22 Copyright 2007 Dangelmayer Associates 22

23 Copyright 2007 Dangelmayer Associates 23

24 No ESD Events Detected! Bonding Tip Properly Grounded! ESD Events Detected! Bonding Tip Not Grounded! Event Video Copyright 2007 Dangelmayer Associates 24

25 Surface Resistance Test Pick-up Nozzle Too Conductive! Copyright 2007 Dangelmayer Associates 25

26 Copyright 2007 Dangelmayer Associates 26

27 CDM video Copyright 2007 Dangelmayer Associates 27

28 CDM & Class 0 Countermeasures

29 ESDA S20.20 Scope: HBM >100V Best Industry Standard Note: Tailoring is Essential for Class 0 & CDM Copyright 2007 Dangelmayer Associates 29

30 MR Head Lessons Learned Conventional ESD Methods Did Not Work! Below 100 Volts Ionization Too Slow Incomplete Coverage with Ionization Expect a Paradigm 100 volts Assume Device Still Charged! New Control Methods Eliminate Metal-to-Metal Contact Substitute Soft Landings with Dissipative Materials Copyright 2003 Dangelmayer Associates 30

31 Pogo Video Semitron Video Copyright 2003 Dangelmayer Associates 31

32 Conclusions CDM + Class 0 Trend = Perfect ESD Storm! Trend Drivers: Class 0: Virtually All Factories By 2010! It Takes Two Year To Prepare Trends Driven By Exploding Consumer Markets High Volume Production Designed-in Protection Circuits Limited By Speed Of Application And I/O Density Impact On Control Procedures: Standard Control Procedures Insufficient But Necessary Paradigm Shift In Control Techniques Occurs At 100 Volts Must Assume Product Is Still Charged Ionization Often Not Sufficient Metal-to-metal Contact Must Be Eliminated EMI/ESD Event Testing Is Essential Copyright 2007 Dangelmayer Associates 32

33 Class 0 - Are You Ready? It Takes 2 Years! Identify Champion And Team Consult Or develop Expertise Detailed Technical Assessment Scheduling Survey, Report By Site Tool By Tool Solutions Product By Product Solutions Locate Or Develop Suppliers Develop and Document Procedures Implement And Sustain Train Team Train Engineers Train Managers Train Workers Purchase Cycle Time Purchase Cycle Time 4-8 weeks per item 6 months 2-4 months 4-12 months Total time up to 2 years Initiate -> Assess -> Design -> Develop -> Implement HS1203 Copyright 2007 Dangelmayer Associates 33

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