Real-Time and Embedded Systems

Transcription

1 Real-Time and Embedded Systems (CUGS Course) Petru Eles and Zebo Peng Embedded Systems Laboratory (ESLAB) Linköping University Course Organization Module I System-Level Design Methodology Wednesday, March 28, 13:15-18:00 Thursday, March 29, 9:15-12:00 Module II Advanced Real-Time Systems (Dr. Unmesh Bordoloi) Time to plan (13-14 June). Module III Formal Modeling and Verification (Prof. Wang Yi, Uppsala U.) Time to plan (9-10 May). The course gives 4.5 HP credits, 1.5 for each module. 2 1

2 Module I: System-Level Design Methodology Design of embedded systems (0.5h) Architectures and platforms for embedded systems (1.5h) Modeling techniques (1.5h) Performance analysis and co-simulation (1.5h) Optimization techniques for design space exploration (1.5h) System-level power/energy optimization (1.5h) 3 Literature Ernst, Codesign of Embedded Systems: Status and Trends. Keutzer et. al., System-Level Design: Orthogonalization of Concerns and Platform-Based Design. Li et. al., Performance Estimation of Embedded Software with Instruction Cache Modeling. Glover, Tabu Search: A Tutorial. Okuma et al., Software Energy Reduction Techniques for Variable-Voltage Processors. De Micheli el at., Readings in Hardware/software Co- Design. Lecture notes. 4 2

3 Examination for Module 1 Written exam. Open book. Time: Friday, April 27 (?) 13:00-17:00 5 Introduction Embedded and RT systems and their characteristics Design of embedded systems The typical design flows System level design issues 6 3

4 What is an Embedded System? There are many different definitions! A special-purpose computer system that is used for a particular task. A computer based systems embedded in real life machines. Though computer based, it dose not have the usual key-board and monitors. Some highlights what it is (not) used for: Any device which includes a programmable component but itself is not intended to be a general purpose computer. Some focus on what it is built from: A collection of programmable parts surrounded by ASICs and other standard components, that interact continuously with an environment through sensors and actuators. 7 What is a Real-Time System? An information processing system that has to respond to input stimuli within a finite and specified time. The correctness depends not only on the logical result but also the time it was delivered. Failure to respond in time is as bad as the wrong response! 8 4

5 Embedded RT Systems General purpose systems Embedded systems Microprocessor market shares 99% 1% 9 Characteristics of Embedded RT Systems Dedicated computers (not general purpose). One or several applications known at design-time. Contain a programmable component. But usually not programmable by the end-user. Interact (continuously) with the environment: Real-time behavior (faster better). Predictable, safe and reliable. Usually very cost sensitive: Products in competitive markets, demanding low cost. Low power/energy is often preferred. Battery life: High energy consumption short battery life time. Cost issue: High power consumption strong power supply and expensive cooling mechanism. 10 5

6 Embedded Controllers Memory CPU Environment Sensors HW Unit Application-special logic Timers A/D and D/A conversion Actuators Reactive systems. The system never stops. The system responds to signals produced by the environment. 11 Distributed Embedded Systems Actuators Sensors I/O Interface RAM CPU ROM ASIC Network Interface ECU ECU ECU Gateway ECU ECU ECU Gateway 12 6

7 The ES Design Challenges Increasing application complexity (e.g., automotive). Heterogeneous architecture (HW, SW, network, mechatronics, etc.). Stringent time and power constraints. Low cost requirement. Short time to market. Safety and reliability (e.g., very long life-time). In order to achieve all these requirements, systems have to be highly optimized. Both hardware and software aspects have to be considered simultaneously! 13 Co-Design to Reduce Design Time Traditional Design: Specification Partitioning HW/SW Codesign: Specification Partitioning HW Design SW Design Co-sim. Co-verif. HW Design SW Design Integration Test Reduced TTM Integration Test time time 14 7

8 Current ES Design Practice 1. Start from some informal specification and a set of constraints (time, power, and cost constraints). 2. Generate a more formal specification, based on some modeling concept (FSM, data-flow, etc.), using Matlab, Statecharts, SystemC, C, UML, or VHDL. 3. Simulate the model in order to check its functionality. The model is modified, if needed. 4. Choose an architecture such that the cost limit is satisfied, and hopefully that time/power constraints will be fulfilled. 5. Implement both the hardware and software components and build a prototype. 6. Validate the system from both functional and nonfunctional perspective. A usual outcome: Neither time nor power constraints are satisfied, if the functions are correctly implemented!!! 15 The Consequences Delays in the design process: Increased design cost. Delays in time to market missing market window. High cost due to many iterations with implementation and prototyping. Bad design decisions taken under time pressure: Low quality. High cost. The lesson: We need to explore more design alternatives in an efficient manner. At the system level! 16 8

9 System-Level Design Informal Specification, Constraints Modeling Functional Arch. Selection System Model Formal Verification System Architecture Mapping Estimation Not OK Scheduling Not OK Mapped and Scheduled Model OK Structural Formal Verification Lower-Level Design Software Model 17 Hardware Model The Improved Design Flow Several design alternatives are evaluated before going down to the lower-level design. Different architectures, mappings and schedules are explored, before actual implementation and prototyping. Hardware/software trade-offs can be made systematically. Verification and simulation are integrated into the design flow. Used not only for functional validation, but also for other requirements. Used after mapping and scheduling in order to check, for example, timing properties. We get highly optimized solutions in short time. There is a good chance that design iterations at the lowerlevel, including prototyping, can be avoided. 18 9

10 The Lower-Level Issues Software generation: Encoding in an implementation language (C, C++, assembler). Compiling (this can include particular optimizations for application specific processors, DSPs, etc.). Generation of a real-time kernel or adapting to an existing operating system. Hardware synthesis: Encoding in a HDL (VHDL and Verilog). Successive synthesis steps: high-level, register-transfer level, logic-level synthesis. Hardware/software integration: The software is run together with the hardware model (co-simulation). Prototyping: A prototype of the hardware is constructed and the software is executed on the target architecture. 19 Lower-Level Design There are established CAD tools on the market which automatically perform many of the low level tasks: Code generators (software model C, hardware model VHDL) Compilers. Hardware synthesis tools: RT-level synthesis Logic synthesis Layout and physical implementation Test generators and debuggers. and co-simulation tools

11 Focus on System-Level Design Large influence on the quality of the final implementation. Very few commercial tools are available. Mostly experimental and academic tools available. Huge efforts and investments are currently made on developing tools/methods for system-level design. Ad-hoc solutions are less and less likely to be utilized. It is system level design that we are mainly interested in, in this course! 21 11