Failure Modes of Flip Chip Solder Joints Under High Electric Current Density

Transcription

1 C. Basaran H. Ye D. C. Hopkins Electronic Packaging Laboratory, University at Buffalo, SUNY, Buffalo, New York D. Frear J. K. Lin Freescale semiconductor Inc., Tempe, Arizona Failure Modes of Flip Chip Solder Joints Under High Electric Current Density The failure modes of flip chip solder joints under high electrical current density are studied experimentally. Three different failure modes are reported. Only one of the failure modes is caused by the combined effect of electromigration and thermomigration, where void nucleation and growth contribute to the ultimate failure of the module. The Ni under bump metallization solder joint interface is found to be the favorite site for void nucleation and growth. The effect of pre-existing voids on the failure mechanism of a solder joint is also investigated DOI: / Keywords: Flip Chip, Solder Joint Reliability, Electromigration, Thermomigration, Current Stressing, High Current Density, Power Electronics, Nanoelectronics 1 Introduction Electromigration in solder joints under high direct current density is known as a reliability concern for the future high density microelectronic packaging and power electronic packaging 1 7. The trend in flip-chip to increase I/O count drives the interconnecting solder joints to be smaller in size and, thus, carry higher current density. The current density will increase further as chip voltage decrease and absolute current levels increase. The research on electromigration and thermomigration in solder joints is still in its early stages, hence the literature is very poor in publicly available data. The failure modes of flip-chip solder joints under high electric current stressing are not yet well understood. In the experiments, 20 test vehicles flip chip modules were subjected to dc electric current stressing. The stressing current level ranges from 0.5 to 1.5 A and leads to a current density in the solder joint from 0.4 to A/cm 2 dependent on the cross-section area of solder joint. Two test modules were subjected to dc pulse current stressing at a level of 3 10 A. 14 test modules failed due to current stressing; 4 test modules were damaged due to repolishing after the nano-indentation tests; 2 test modules survived more than 3000 h of stressing. Table 1 shows the test vehicle number and applied current levels for each module tested. 2 Experimental Setup The test vehicle flip chip modules were provided by Motorola Corp. The test module has a dummy silicon die with only aluminum Al conductor trace on it. The silicon die is attached on a FR4 printed circuit board PCB through eutectic Pb37/Sn63 solder joints. The copper plates on the PCB provide the wetting surface for the solder joints. The under bump metallization UBM on silicon die side is electroless Ni. The voids between the solder joints are filled with underfill between the silicon die and PCB substrate. The thickness of the Al trace is about 1 m and the width is about 150 m. The height of the solder joint is 100 m. The test module was cross sectioned and finely polished toward the center of the solder joints before current stressing. On each module, two solder joints were tested. The solder joints on each test module are named in such a way that current always flows from copper trace through solder joint A into the Al trace on silicon die side and then flow through solder joint B out Contributed by the Electronic and Photonic Packaging Division for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received December 22, 2003; Final manuscript received September 15, Review conducted by: Stephen McKeown. to another copper trace as shown schematically in Fig. 1. During the course of current stressing, the test modules were taken off circuit for scanning electron microscopy SEM analysis. Since it is very difficult to measure the temperature on a 100 m solder joint directly, the temperature of silicon die was measured during current stressing with a fine-tipped thermal couple thermometer OMEGA HH-602. In a coupled thermal-electrical finite element simulation, Ye et al. 5 have shown that the temperature in the solder joint would be very close to the temperature on the silicon die in this test module. 3 Observed Failure Modes During the experiments 14 modules failed due to electrical current stressing, 4 modules failed during re-polishing after nano indentation tests, and 2 modules survived more than 3000 h of current stressing without failing. Three types of failures modes were observed among the first group: 1 failure in solder joint due to extremely high temperature; 2 failure in the Al trace due to high temperature; 3 failure in solder joint due to void nucleation and growth in solder joint during current stressing. The reason for the first type of failure is obvious since the Pb/Sn eutectic solder has a low melting point of 183 C. M31, M33, and M53 experienced this type of failure. M31 and M33 failed after 30 min of current stressing with a measured Si die temperature of over 200 C. The solder joints in these two test modules melted Fig. 2. The joule heating heat was apparently generated in the Al trace since the solder joint has good wetting with both Ni UBM on the Si die side and Cu plate on the FR4 side. Therefore, Al trace contributed to most of the resistance. For M31 and M33, electromigration and thermomigration should have no contribution to the failure of the module. M53 survived just 22.5 h of current stressing. The initial stressing temperature measured on Si die is 150 C then gradually increased over 180 C. M4, M5, M7, and M54 exhibited type 2 failure, among which M4 and M7 were subjected to pulsed direct current PDC stressing. Tektronix 371 A curve tracer was used for pulse stressing. The pulse frequency is 120 Hz with a pulse width of 80 s. Pulse shape depends on the wiring impedance, but resembles a rectangular wave. The duty factor defined as the ratio of time of the on-period to that of the whole pulse period is calculated to be 0.96%. When M4 was subjected to 10 A peak PDC stressing, its resistance increased to infinity immediately. SEM image shows that the damage of the module was in the Al trace and silicon die as clearly shown in Fig. 3 a. M7 was first subjected to 3 A of PDC stressing for 50 h, then 5 A of PDC stressing for 57 h, and Journal of Electronic Packaging Copyright 2005 by ASME JUNE 2005, Vol. 127 / 157

2 Table 1 Test matrix of flip chip modules finally 7 A of PDC stressing for 23 h. SEM images taken after stressing show that there was no microstructural change in the solder joints at all. When M7 was subjected to 10 A of PDC stressing, it failed immediately. Figure 3 b shows that the Al trace was the actual failure cause of the module. With 7 A of PDC, the peak current density in the solder joints was A/cm 2, which is much higher than that applied in the dc current stressing experiments. The effect of PDC on electromigration has been shown to be dependent on the frequency and duty factor 8. At low frequency electromigration acts as if it were dc for the time on and backdiffusion may occur during the time off 9. In our experiment, the PDC frequency is within the low frequency regime. The reason that we did not observe any damage in the solder joint during PDC stressing when very high current density was applied may be due to the low duty factor 0.96% of PDC. On the other hand, high peak current of PDC generates a lot of heat in the Al trace which leads to its failure when 10 A PDC was applied. M5 and M54 also experienced type 2 failure although they were subjected to dc stressing. For example, the applied current on M5 was 1.5 A and the module immediately failed. SEM secondary Fig. 1 Schematic cross section of the test vehicle module Fig. 3 Failure in the Al trace and Si die, a M4, solder joint A, b M7, solder joint A images of the solder joint B before and after stressing are shown in. Fig. 4: Figure 4 b shows that Si die separated from the solder joint and underfill along the Al trace where tremendous heat was generated. Modules M6, M14, M34, M41, M42, M51, and M56 experienced type 3 failure. This mode of failure happened due to void nucleation and growth in the solder joint under current stressing. In the modules that experienced type 3 failure severe void nucleation was observed in the solder joints Fig. 5. The fact that void nucleation was always on Si die side and mass accumulation on the Cu plate side on the cross-sectioned solder surface indicates that the failure process in solder joint is the combined effect of electromigration and thermo-migration 5. In these modules, solder joint A where the direction of electromigration is the same as that of thermomigration always had much more severe void nucleation than solder joint B where the direction of electromigration is opposite to that of thermo-migration. Therefore, the degradation of solder joint A caused the ultimate failure of the module. Fig. 2 Secondary SEM of M33 after failure: solder joint B 4 Voids Nucleation in Solder Joints To understand type 3 failure which is due to mass migration, both electro and thermo, it is important to analyze the void nucleation modes in solder joints during current stressing and their relationship with the failure of these test modules. Besides the modules that experienced type 3 failure, there were other modules which also underwent void nucleation but never failed after 3000 h, when the test was terminated. We will discuss the void nucleation modes in all these modules. Four void nucleation modes were observed in these solder joints: mode 1 voids nucleate and grow in the Ni under bump metallization UBM solder 158 / Vol. 127, JUNE 2005 Transactions of the ASME

3 Fig. 4 failure Secondary SEM of M5, solder joint B, a initial, b after Fig. 5 Secondary SEM, a M34, solder joint A, 95 h before failure, b M42, solder joint A, 2 h before failure interface; 2 voids nucleate and grow in the region near Ni UBM solder interface; 3 growth of pre-existing voids; 4 no void growth after 3000 h of testing. Table 2 provides mode of void growth for the test vehicles. Some of the modules listed in the table experienced void nucleation and growth, but their failure was due to polishing after nano indentation. For mode 1 voids were observed to nucleate and grow on the Ni UBM solder interface for the majority of the solder joints. This interface was the favorite site for void nucleation and growth. The combined electromigration and thermomigration effect leads to an atomic flux divergence in this region for both solder joints A and B meaning the depletion of mass in the region since Ni UBM acts as a barrier layer for the diffusion of solder joint. The direction of overall diffusion due to the combined effect of thermomigration and electro-migration is from Ni UBM solder interface to Cu plate in both solder joints A and B as reported by Ye et al. 5. Theoretical electromigration analysis indicates that maximum tensile spherical stress will be generated in this region and vacancy condensation will also occur in this region The driving force for void nucleation and growth is proportional to the tensile stress 21. Gleixner and Nix 22 numerically calculated the void nucleation rate in passivated interconnect line due to electromigration and thermal stress based on vacancy condensation theory 23,24, and suggested that void nucleation by vacancy condensation is extremely slow and would not be expected to occur in reality. Flinn 25 proposed the possibility of contaminants at the metal/passivation interface acting as void nucleation sites in passivated metal lines. Gleixner and Nix 22 analyzed the effect of contaminants on void nucleation and found that void formation at a flaw at the interface would require a considerably smaller stress than that in classical void nucleation theory. They further concluded that voids would grow only at the intersection of the grain boundary with the passivation layer due to the large difference between the grain boundary and lattice diffusivities. For void growth to occur atoms must be removed from the void surface and grain boundary acts as an extremely fast path for material removal relative to the lattice 22. Raj 26 showed that heterogeneous nucleation at the triple junction of a second phase particle and a grain boundary was the most probable. Based upon the abovepresented discussion, it is clear that the Ni UBM solder interface is the naturally preferable site for voids nucleation and growth, as observed in our experiments. The voids would nucleate at the interface of Ni layer solder joint intermetallic compound. Contaminants lodged in this interface during manufacturing process make this site a preferred location for void nucleation. This interface has the maximum atomic divergence which is favorable for void growth. Figures 6 and 7 show examples of mode 1 void nucleation and growth on the Ni UBM solder joint interface. Table 2 Summary of voids nucleation and growth modes in the experiments Journal of Electronic Packaging JUNE 2005, Vol. 127 / 159

4 Fig. 6 Secondary SEM of M12, solder joint A: 36 h Fig. 7 Secondary SEM of M42, solder joint A: 178 h Fig h Secondary SEM of M34, solder joint A, a 268 h, b Only three solder joints were observed to have mode 2 void nucleation and growth. Figure 8 a shows the void nucleation in the region near Ni UBM solder joint interface in M34, solder joint A after 268 h of current stressing. Hillocks were observed to build up near the solder Cu plate interface. Figure 8 b shows void growth and development of severe depression in the region near the Ni UBM solder interface after 444 h of current stressing. One unexpected observation is that new voids nucleated in the region of hillocks. The origin of these new voids is not clear, since they were in the downwind region of thermomigration and electromigration, where atoms diffuse into and the material experiences compressive stress. Hence the theory of void nucleation and growth under tensile hydrostatic stress does not apply in this region. One possibility for this behavior is void nucleation and growth under shear stress. Xue et al. 27 reported that the shear bands are the preferred sites for nucleation, growth, and coalescence of voids and are, as such, precursors to failure in titanium and Ti-6Al-4V alloy. In the hillocks region of solder joint A in M34, the material was subjected to biaxial compression stress according to electromigration theory, but in the direction perpendicular to the solder surface the normal stress is zero. Therefore, the material in this region is also subjected to shear stress and this might be the cause of new void nucleation. Voids nucleated in the hillocks regions later become smaller after further current stressing. This probably indicates that after the voids in the hillocks region nucleate and grow to a certain extent, the stresses triggering this void growth in this region are counterbalanced by mass accumulation. Since the hillocks region is where the atoms diffuse into, the healing of the previous voids was observed. On the other hand, the depression near the UBM solder interface continued to grow. The SEM image after the failure indicates that the direct cause of failure was the severe depression and voids growth in the UBM solder interface region. It is worth noting that M34, solder joint A was the only solder joint to be found void of nucleation in the hillocks region among all the modules we tested. Voids nucleation and growth in the region near Ni UBM solder interface was also found in solder joint B of M41 and solder joint B of M56. But they were much less severe compared to solder joint A of M34 because the direction of thermomigration is opposite to that of electromigration in these solder joints. Of all the solder joints that were tested, only three solder joints had mode 2 void nucleation and growth behavior, indicating voids nucleation in the region near UBM solder interface is less favorable than that on the UBM solder interface itself. Some of the solder joints we tested had pre-existing voids. These pre-existing voids are generally produced during the reflowing process. Some of these pre-existing voids lead to mode 3 void growth where the growth of pre-existing voids causes the ultimate failure of the test module. According to our experiment results, whether or not these pre-existing voids would grow or not depends on their locations: if the pre-existing voids are located in the region near Ni UBM solder interface where atoms diffuse out due to the combined effects of thermomigration and electromigration, they are likely to grow; if the voids are not located in UBM solder interface region, they are very unlikely to grow. This observation is best presented in Fig. 9. As shown in Fig. 9 a, there were several pre-existing voids as seen on the crosssectioned surface of solder joint A of module M56. One small void with irregular shape was located in the region near UBM solder interface; and several others were located near Cu solder interface, two of them with round shape and others with irregular shape. It is clearly shown in Fig. 9 b that only the pre-existing 160 / Vol. 127, JUNE 2005 Transactions of the ASME

5 Fig. 10 Backscatter SEM of M56 solder A: initial Figure 11 shows another example of the growth of pre-existing voids. The pre-existing voids in solder joint A of M41 were located very near to the Ni UBM solder interface and were produced during manufacturing. The pre-existing voids were observed to grow rapidly toward the UBM solder interface and lead to the ultimate failure of the module as shown in Fig. 12. Among the modules that were tested, some of them never experienced voids nucleation and growth after 3000 h of current stressing as shown in Table 2. M8, M15, and M26 were all subjected to 0.5 A of dc current stressing. Relatively low current level leads to relatively low current density in the solder joints as well as smaller joule heating Fig. 9 Secondary SEM of M56 solder A, a initial, b 1267 h void in the region near UBM solder interface grew dramatically to form a big crack in that area. On the other hand, other bigger voids near Cu solder interface did not grow very much, no matter what their initial shapes were. Yet, they did change their shape a little bit possibly due to the local stress build up and local surface diffusion. This observation agrees with Lee et al. 1 findings. Figure 9 b shows that besides severe void growth in the region near UBM solder joint interface, two hillocks were gradually built up on the surface and a depression area was formed between these two hillocks. This observation indicates that the diffusion process was not homogeneous within the solder joint. Careful examination of the phase structure reveals that the Pb-rich phase in the depression region was not equiaxially shaped and had a preferred orientation compared to that in hillocks regions as shown in Fig. 10. This preferred Pb phase orientation was formed during manufacturing and was preserved during current stressing. According to Kwok and Ho 28, the effective boundary diffusion coefficient, D a, equals D gb /d, where is the grain boundary width, D gb is the grain boundary diffusivity, and d is the average grain size. Although the Pb phase size is not the actual grain size, there ought to be a proportional relationship between this phase size and grain size; the larger the phase size, the larger the grain size. The orientation in-equiaxed phase structure indicates an orientation inequiaxed grain structure, which leads to the difference of average grain size in different directions. This means the effective diffusivity may not be isotropic in this region, and therefore the diffusivity in the whole solder joint is inhomogeneous. The observation suggests that the phase structure of eutectic Sn/ Pb solder joint affect its diffusion property and therefore, the failure process under current stressing. Fig. 11 Secondary SEM of M41 solder A, a initial, b failure after 61 h Journal of Electronic Packaging JUNE 2005, Vol. 127 / 161

6 models resulted from Joule heating and lack of cooling in the specimen. These failure modes happen very quickly and influence of electromigration and thermomigration is negligible. Most of the modules experienced combined electromigration and thermomigration induced failure. In this mode of failure, thermomigration significantly dominates the failure process. When the direction of the thermomigration is the same as the electromigration the damage very severe. When the direction of the electromigration and thermomigration are opposite the thermomigration forces dominate yet the total damage is smaller. The Ni UBM solder joint interface was the preferred site of the void nucleation and growth. It is believed that the contaminants in the interface also accelerate the void nucleation process. The effect of pre-existing voids on the failure process of a solder joint is found to be dependent on their location. Acknowledgments This project was sponsored by a grant from the US Navy, Office of Naval Research, Advanced Electrical Power Systems, under the supervision of Mr. Terry Ericsen. Help received from the program director Mr. Ericsen is gratefully acknowledged. Fig. 12 within the Al trace. Therefore, both the electromigration and thermo-migration were less severe in these modules than solder joints in other modules where higher level of current was applied. The current density calculated based on the estimated crosssection area in the solder joints of M8 and M26 range from 0.57 to A/cm 2. Pb phase growth was clearly observed in the solder joints in both modules. The Pb phase coarsening indicates that electromigration and thermomigration were operative in these solder joints during current stressing. The authors think that lower current density and lower joule heating lead to longer incubation time for void nucleation. Therefore, the voids in these solder joints did not have enough time to nucleate to an observable size. On the other hand, when the current density and stressing temperature is really low, the effect of migration may become almost invisible even when the module is stressed for an extremely long period of time. This was the case in M15, where the estimated current density was A/cm 2 and the stressing temperature was only 40 C. No micro-structural coarsening in the solder joint A of M15 after an extensive 3000 h of current stressing was observed. This indicates the possibility that there exists a threshold current density under which no electromigration failure would occur. This later observation agrees with earlier findings reported by Blech 11,12 in his electromigration experiments of thin pure metal film Fig Conclusions Backscatter SEM M8 solder A L, initial, R 149 h This paper provides a brief summary of extensive study conducted on failure modes of flip chip solder joints under high current density. Three different failure mode were reported. One failure mode was due to melting of the Al trace in the Si die. Another failure mode was melting of the solder joint. Both of these failure References 1 Lee, T. Y., Tu, K. N., Kuo, S. M., and Frear, D. R., 2001, Electromigration of Eutectic SnPb Solder Interconnects for Flip Chip Technology, J. Appl. Phys., 89 6, pp Lee, T. Y., and Tu, K. N., 2001, Electromigration of Eutectic SnPb and SnAg 3.8 Cu 0.7 Flip Chip Solder Bumps and Under-bump Metallization, J. Appl. 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