High performance and high reliability passives for miniature medical devices based upon Silicon technologies Laurent Dubos INEMI May 2011
IPDIA overview Company located in Caen, Normandy, France Started in June 2009 More than 50 years of experience and success in semi-conductors including 6 years in 3D silicon passive devices Dedicated campus covering 7 hectares, including IPDiA s headquarters Sales and Marketing organization Strong R&D Team 6 wafer fab with integrated passives capacity of 150k wafers/year 2
, a new company based on a unique technology IPDIA s PICS passive integration (IPD) technology is a highly efficient way to integrate 10 s to 100 s of passive components such as resistors, capacitors, inductors and Zener Diodes in a single Silicon die. 3
What is IPD? Integrated Passive Device PICS is IPDiA IPD Passive Integrated Connecting Substrate Single IPD die A highly efficient way to integrate several passive components such as resistors, capacitors, inductors, ESD diodes and PIN diodes in a single. All of them, thanks to our technology very flexible. 4
IPDIA s value proposition Miniaturization Size of electronic devices can be reduced by a factor of 10 Thickness as low as 100 µm Performances High stability (temp, voltage, ageing ) High reliability (no cracking unlike MLC) Low consumption (battery lifetime) Reduced Cost BOM level Simpler manufacturing 5
Solid State Lighting (LEDs) Main activity of today High growth and value potential Mobile phones Transition from past activity Professional electronics First products qualified (e-metering) Aerospace and Defense Starting prospection Products : where? Medical devices First prototypes delivered for miniaturization or performance improvement of CRM and Defibrillators 6
Value proposition in Medical Two main value propositions: 1 ) Silicon capacitor versus Tantalum and Ceramics cap s Volume reduction High performance High reliability Longer battery life time 02/05/2011 7
Value proposition in Medical 2 ) Silicon interposer with/without passive components Volume reduction High performance High reliability 02/05/2011 8
Performances and size advantages of Silicon based integrated passives 02/05/2011 9
Volume reduction example : replacement of an existing cap array by a silicon cap array Current Ceramic capacitor array size: 13mm² and 1mm thickness Silicon Capacitor array using the latest PICS3 node size : 0.72mm² and 130 µm thickness
Silicon capacitors example 0.5 mm x 0.5 mm 8pF16pF32pF Embedded capacitors Market: communication Binary capacitor (8pF, 16pF, 32pF, 64pF, 128pF) 64pF 128pF Frequency range: from 1 to 2GHz Embedded binary capacitor (150µm thickness) Application: decoupling and RF matching Capacitors array Market Application: Medical Frequency range: 1GHz Components: decoupling capacitors. Capacitance matching better than 1.5% Capacitor array (9 x10 nf)
Example of miniaturization with Silicon device: 25 mm 7 mm After, 1 component Die size 49mm2, h=0,85mm Before 2 active dies+ 100 components PCB=600mm2, h= 2mm 12
Example of miniaturization with Silicon device: 25 mm 7 mm DC feeds PA PA matching Band Filter Magnification Zoom on SIP in HVQFN56 Decouplin g, PLL filter Tx balun Transceiv er Rx balun size reduction by factors 12. 13
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3D silicon passive devices with outstanding performances Capacitors (from pf to µf) Superior temperature stability (<20ppm/ C) Technology characterized to +250 C Very low leakage current (<40nA) Superior DC voltage stability (<0.1%/V) No capacitance change over voltage variation. Very low ESR < 40mOhm and ESL < 100pH Negligible aging (<0.001% / 1000 hours) Excellent matching (better than 1.5%) Tolerance: 15% 0 C S e S Coils (up 200nH) Superior Q-factor (> 80) Self-res. freq. > 45GHz Resistors (up to 100K ) Excellent matching (better than 0.2%) Tolerance: 7% Zener Diodes up 150V BV>8V @1mA and ESD Capability 15KV Air discharge (IEC 61000-4-2, level4) Pin Diodes (for RF) Isolation > 20dB @500MHz 15
Silicon capacitors several form factor Jedec Compliant package such as 0201, 0402, up to 1206 1µFarads Wire bonding Applications Flip Chip, bumping Capacitor (different finishing are available: Al, Cu, NiAu, Au, ) For the applications embedding the components into printed circuit board and laminates In package such as 10 µfarads Capacitor 16
Comparison between Silicon passive (PICS) technology and Alternative Capacitor technology Stability /Reliability/ temperature PICS COG NPO X7R Y5R Density of integration 17
Comparison between Silicon passive (PICS) technology and Alternative Capacitor technology Stability /Reliability/ temperature COG NPO 0402 :10nF PICS 0402 : 100nF X7R 0402 : 100nF Y5R 0402 : 10µF Density of integration 18
Capacitance change (%) Capacitance change (%) Capacitance stability in temperature Ceramic & Tantalum vs. PICS 20 Temperature coefficient PICS vs. MLCC capacitors 10 0-10 C0G X8R PICS -20 X7R -30-40 -50-60 Z5U 20 Temperature coefficient PICS vs. Tantalum capacitors -70 Y5V -80-50 0 50 100 150 200 Temperature ( C) 15 10 Excellent temperature accuracy and stability (<20ppm/ C) reached thanks to 3D silicon passive technology 5 0 Ta PICS Large temperature range: from -55 C to +200 C -5-10 -50 0 50 100 150 200 Temperature ( C) No trade off needed with 3D silicon capacitor, it has an excellent temperature stability with a high capacitance density. 19
Capacitance change (%) Capacitance stability in voltage Ceramic capacitors vs. PICS 10 0 DC Voltage stability MLCC capacitors vs. PICS PICS -10-20 -30-40 -50-60 -70-80 -90-100 0 1 2 3 4 5 6 7 Bias voltage (V) C0G X7R Superior DC voltage stability (<0.1%/V) No capacitance change over voltage variation. Y5V 20
ESL(nH) ESL(nH) ESL(nH) ESL : C0G, X7R & Tantalum vs. PICS (capacitors <1nF) 1,1 1 0,9 ESL (nh) @25 C 0402 C0G(NPO) vs. PICS C0G 0,8 0,7 0,6 0,5 0,4 0,3 (capacitors >1nF) 0,2 PICS 0,1 0 2,25 0 50 100 150 200 250 300 350 400 450 500 550 600 650 700 750 800 850 900 950 1000 2 Capacitance (pf) 1,75 1,5 ESL (nh) @25 C 0603 X7R vs. PICS X7R 1,25 1 0,75 0,5 PICS 0,25 0 3,5 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 105 3,25 Capacitance (nf) 3 2,75 (capacitors >0.1µF) ESL (nh) @25 C 3216 Tantalum vs. PICS Tantalum 2,5 2,25 ESL from Silicon capacitor is 10 times lower than others standard SMD capacitors technology 2 1,75 1,5 1,25 1 0,75 0,5 0,25 0 100 200 300 400 500 600 700 800 900 1000 Capacitance (nf) PICS 21
Low leakage current In defibrillator applications for instance, such a low leakage current is equivalent to several hundred days increase in lifetime, compared with what can be obtained with Tantalum devices. 03/05/2011 22
PICS3: Time-Dependent Dielectric Breakdown (TDDB) Results for the linear electrical model predication @ T=100 C for PICS3 capacitors Intrinsic lifetime = 60 years @ 3.6 V (60% C.I.) Intrinsic lifetime = 10 years @ 5 V (60% C.I.) The formula hereunder corresponds to the e-model used for TDDB data analysis and extrapolation to use conditions. t bd E A exp( ) exp( E kt Ao 0 ox where : A 0 = time constant E Ao = activation energy K = Boltzmann constant T = 100 C = field acceleration factor E ox = field across the oxide Nota : the product life time is computed for a cumulative default rate of 0.1%. ) 23
High reliability with silicon passive devices versus SMD s Propagation of micro-crack MLC cracking due to board stress or warpage 24
Ipdia, Silicon Passive integration Passive components network 03/05/2011 25
Passive Integration around AC/DC Converter 02/05/2011 26
Passive network 02/05/2011 27
Benefits from IPDIA Silicon passive technology Increase reliability 27 passives in one silicon die 250 C temperature range Miniaturization Few solder joints to maintain reliability Reduce EMI, thanks to excellent high frequency response 02/05/2011 28
Design rules Comparison between typical design rules of LTCC, Laminate and Silicon PICS IPD based circuits Increased routing density leads to higher performance. High routing density: Area saving Design Rules (all dimensions are given in µm) LTCC Laminate PICS(*) Min. line width 50 65 (standard 80) 3 Min. line space 50 65 (standard 80) 5 (*): For PiCS process: with 5.5µm thickness copper metallization as top layer 29
Way of working: speed, reactivity «Less than two months between feasibility study and custom samples» Samples Development IPD design Wafer foundry Assembly if required Pre-study Phase Feasibility study Die size estimations Architecture Cost estimations Customer Check-List Project definition < 2 weeks < 8 weeks 02/05/2011 30
Technology roadmap: towards higher densities 02/05/2011 31
Capacitance technology roadmap PICS5 1000 nf/mm², 3.6 V PICS3 «HV» 250 nf/mm², 10 V PICS4 «HV» 400 nf/mm², 10 V PICS4 400 nf/mm², 3.6 V Production PICS3 250 nf/mm², 3.6 V R&D 2010 2011 2012 2013
today : enabling technologies Technology provider to support new generations (size, performance, reliability ) of medical implantable devices Same approach with audio hearing aids or cochlear implants manufacturers More advanced objects and demonstrators Tempill, ipill with Philips Research Motion capture and monitoring Implantable sensors 33
Where in Medical applications? Medical implantable devices» cardiac implants such as defibrillators, pace makers» neurological stimulators such as cochlear implants,» drug delivery implants Medical portable devices» audio hearing aids,» cardio monitoring Medical investigation devices» electronic pills» sensors,» micro stimulators 02/05/2011 34
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