PRODUCTION SERVICE OF PRINTED CIRCUIT BOARDS (PCBS)
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1 PRODUCTION SERVICE OF PRINTED CIRCUIT BOARDS (PCBS) TESAT PCB - Manufacturing PROPRIETARY INFORMATION Tesat-Spacecom GmbH & Co. KG reserves all rights including industrial property rights, and all rights of disposal such as copying and passing to third parties
2 OUR PROFILE»In-house experts for design, manufacturing & population of PCBs» ESA-qualified for rigid Pb/Sn-PCBs» Ongoing ESA-Qualification Electroless Nickel / Immersion Palladium / Immersion Gold (ENIPIG)» IST-Testing of PCBs» State of the art production lines» Integr8tor SW for direct respond with external customer»references» Airbus Defense and Space, Jena Optronic» Boeing (Inmarsat), SSL, TAS, Orbital, LM, OHB, TAS, NGST, MDA, CASC, ISRO, MITSUBISHI, NEC,» DLR, ESA, NASA, JPL»Volume/Capacity» ~ PCBs manf. in 2015 / > PCBs capacity
3 DEPARTMENT SPECIFICATION» Employees Total 28» Management 3» Production 16» Planning, CAM 3» Engineering Team 6» Revenue Breakdown» Sales, Internal 90% - 95 % (space)» Sales, External 5% - 10 % (space and commercial)
4 PRODUCTS, TECHNOLOGIES, SURFACE FINISHES» Single and double sided rigid / flex PCBs (plated or non plated)» Rigid-Flex PCBs with thermomechanical adaption» Multilayer up to 18 layers in core-foil technique, sequential or semi sequential build-ups and metall core» Buried and blind vias, laser or mechanically drilled» Plated edges» Size of PCBs up to 245x400 mm» Laminate thicknesses from 0.5 to 3.6 mm» Surface Finishes in PbSn Hot Oil Reflow, Sn-Diffusion Layer, Mixed Surface PbSn/Sn-Diffusions Layer or ENIPIG» Base material epoxide IS420 (Isola), polyimide Arlon 35N and flex PI (Dupont AP)
5 QUALITY»Certifications» ESA (ECSS-Q70-10C/11) since 1976 for rigid PbSn-PCBs» QM-System (DIN EN ISO 9001) since 1994» Calibration (DIN EN ISO 17025) since 2003» Aerospace and Space (DIN EN 9100) since 2006»Documentation» Traceability for the minimum of 10 years» Monitoring of production progress» Protocols for micro sectioning /final inspection» Traceability for each PCB by lot, panel and PCB number
6 QUALITY»Analysis and Test» First piece inspection after each single production step» 100 % control of all layers via AOI-system» Final electrical test of the manufactured PCB» In-house laboratory for continuous analysis of all electrolytes and dips (Specialties: SEM-analysis and EDX-analysis)» Continuous process monitoring by especially designed PCB and IST-testing» Micro sectioning of each panel concerning plating thickness, laminate thickness (as received, after solder shock and rework)» Additional reliability tests like thermal cycling (-65 C +135 C) in N 2 -atmosphere for new materials and processes» Independent Verification by ESA according to ECSS-Q70-10C every two years
7 DELIVERABLES» The deliverables include:» The PCBs + test coupons» Certificate of Conformance (CoC)» Test records» Images of the micro-section (optional)» IST Testing (optional)» Additional deliverables (optional)» Tesat standard packaging:» PCBs are packed and sealed in ESD-bags with a desiccant bag and an humidity indicator» The maximum allowed storage time is 1 year
8 MACHINERY (EXAMPLES)» X-ray Drilling/milling machines (Schmoll) to assure optimal drilling hole characteristics and layer registration» Since 2014: Flying probe tester (ATG-5 neo)» 100% electrical testing» Tesat standard: 500 V /1GΩ Isolation» Since 2015: IST Tester (PWB) industry standard test method for the assessment of PCB interconnect reliability
9 STATE OF THE ART PCB GALVANIC LINES» Since 2012/2013 both new Cu-plating lines for through holes and pattern (Galvabau) are ESA qualified» Since 2014: new ENIPIG line» (electroless nickel, immersion palladium, immersion gold)» since 2015 qualified (e.g. for Au-wire bonding)
10 ROADMAP Estimated project duration: » Installation of a new plasma etching machine» Installations of a new laser drilling machine» Installation of a LDI» Manufacturing capability expansion for HDI-demands
11 Tesat Spacecom Capability Issue B November 2016 Tesat- Spacecom Capability IPC ECSS Product Range Additional Features Materials Construction Feature Sizes Drilling Minimum Distance - Positional Accuracy Single and Double Sided Rigid Yes Yes Yes Single and Double Sided Flex Yes Yes No Multilayer (up to 18 Layers) Yes Yes Yes Rigid-Flex Yes on request No HDI partly on request No Controlled Impedance No No No Blind Vias - mechanical drilled before lamination of half stack Yes Yes Yes Buried Vias - mechanical drilled Yes Yes Yes Blind Micro-Vias - laser drilled Yes Yes Yes Copper Filled Micro-Vias No No No Stacked Vias No No No Staggered Vias Yes Yes No Sequential Build-Up - mechanical drilled Yes Yes Yes Epoxy - Low Tg No No No Epoxy - High Tg Isola IS420 Yes Yes Polyimide (ADS_E_1029 qualified) Arlon 35N Yes No PTFE No No No Polyimide Film ( flexible material ) adhesiveless DuPont AP Yes No Copper-Invar-Copper Yes Yes Yes Molybdenum Insert Yes Yes Yes Finished Board Thickness 3,60 mm 3,60 mm 3,20 mm Thinnest glass reinforced layer 100µm 100µm 100µm Thinnest Layer Flex 75µm 75µm No Maximum drill and lamination sequence Laser via stop pad dia µm smaller on request smaller on request Laser via top pad dia µm smaller on request connect Heatsink Single and Double Sided Rigid PCB Minimum Design Annular Ring (end result 50 µm - IPC class 3 ) FHS dia. + 0,5 mm FHS dia. + 0,5 mm N/A Minimum Design Annular Ring (end result 200µm - ECSS ) FHS dia. + 0,8 mm N/A FHS dia. + 0,8 mm Multilayer PCB - lamination sequence 1x Minimum Design Annular Ring outer layer (end result 50 µm - IPC class 3 ) FHS dia. + 0,5 mm FHS dia. + 0,5 mm N/A Minimum Design Annular Ring inner layer (end result 25 µm - IPC class 3 ) FHS dia. + 0,5 mm FHS dia. + 0,5 mm N/A Minimum Design Annular Ring outer layer (end result 200 µm - ECSS) FHS dia. + 0,8 mm N/A FHS dia. + 0,8 mm Minimum Design Annular Ring inner layer (end result 50 µm - ECSS) FHS dia. + 0,8 mm N/A FHS dia. + 0,8 mm Multilayer PCB - lamination sequence 3x Minimum Design Annular Ring outer layer (end result 50 µm - IPC class 3 ) FHS dia. + 0,7 mm FHS dia. + 0,7 mm N/A Minimum Design Annular Ring inner layer (end result 25 µm - IPC class 3 ) FHS dia. + 0,7 mm FHS dia. + 0,7 mm N/A Minimum Design Annular Ring outer layer (end result 200 µm - ECSS) FHS dia. + 1,0 mm N/A FHS dia. + 1,0 mm Minimum Design Annular Ring inner layer (end result 50 µm - ECSS) FHS dia. + 1,0 mm N/A FHS dia. + 1,0 mm Conductor Width - tent and etch ( assumes 17 µm starting foil ) 100µm 100µm 200µm Conductor Width - plated ( assumes 17 µm starting foil ) 200µm 200µm 200µm Conductor Width - 30 µm plated ( assumes 17 µm starting foil ) - Finepitch 120µm 100µm 120µm Conductor Spacing - tent and etch ( assumes 17 µm starting foil ) 100µm 100µm 300µm Conductor Spacing - plated ( assumes 17 µm starting foil ) 300µm 300µm 300µm Conductor Spacing - 30 µm plated ( assumes 17 µm starting foil ) - Finepitch 150µm 150µm 150µm Conductor Width - tent and etch ( assumes 35 µm starting foil ) 100µm 100µm 200µm Conductor Width - plated ( assumes 35 µm starting foil ) 200µm 200µm 200µm Conductor Spacing - tent and etch ( assumes 35 µm starting foil ) 100µm 100µm 300µm Conductor Spacing - plated ( assumes 35 µm starting foil ) 200µm 200µm 300µm Conductor Width - tent and etch ( assumes 70 µm starting foil ) 150µm 150µm 200µm Conductor Width - plated ( assumes 70 µm starting foil ) 300µm 300µm 300µm Conductor Spacing - tent and etch ( assumes 70 µm starting foil ) 150µm 150µm 300µm Conductor Spacing - plated ( assumes 70 µm starting foil ) 300µm 300µm 300µm Conductor Width - tent and etch ( assumes 105 µm starting foil ) on request on request No Conductor Spacing - tent and etch ( assumes 105 µm starting foil ) on request on request No Minimum Mechanical - drilled hole size for Buried and Blind Via [DHS] 0,30mm smaller on request 0,30mm Minimum Mechanical - drilled hole size for PTH [DHS] 0,40mm smaller on request 0,40mm Minimum Laser drilled hole size [DHS] 300µm smaller on request connect Heatsink Minimum Final PTH size for tin/lead ( 0,60mm partly tin/lead filled) [FHS] 0,40mm 0,40mm 0,40mm Minimum Final PTH size for ENIG /ENIPIG [FHS] 0,40mm smaller on request No Aspect Ratio for PTH, Buried and Blind Via mechanical drilled 8 : 1 8 : 1 6 : 1 Aspect Ratio for Laser drilled Via 0,5 : 1 0,5 : 1 0,5 : 1 Plated Through Hole diameter Tolerance Non Plated Hole diameter Tolerance < 1,3mm Non Plated Hole diameter Tolerance 1,3mm Hole wall to Hole wall for none PTH 1,50mm 1,50mm 1,50mm Hole wall to Image 0,70mm 0,70mm 0,70mm Image to Edge 0,45mm 0,45mm 0,45mm
12 Finishes Copper-Invar-Copper design rules Electroless Nickel / Immersion Palladium / Immersion Gold (ENIPIG) Yes Yes on-going Fused Tin-Lead (ESA-Qualified) Yes Yes Yes Fused Tin-Lead with Tin Diffusion Layer (hard gold replacement) Yes Yes Yes Contained CIC-layers should be identical Yes Yes Yes Individual pads should be removed, it should be one contour Yes Yes Yes If CIC is connected with laser on the location, the thickness of the Copper-foil above should be 17 μm, later it will be reinforced by electroplating Yes Yes Yes It's not allowed to drill the CIC mechanically Yes Yes Yes The distance between invarcore and PCB edge should be 1000 µm Yes Yes Minimum Distance Via (CIC connecting) to CIC edge 1000 µm smaller on request smaller on request Minimum Distance Via (CIC connecting) to Via (CIC connecting) 850 µm smaller on request smaller on request Minimum Distance through hole to CIC drillsize + 2 mm smaller on request smaller on request Solder Mask Elpemer 2469 on request Yes No Data Required Technical Information Layer information Milling-Data Drilling-Data Drawing Text file: -Build up -List of files -name of pcb RS274X (extended Gerber) Excellon inch Leading Absolut Excellon inch Leading Absolut Pdf content: - Drill table with tolerances - Markings (lot#, serial#, q-stamps, date code if needed, and so on -specification -dimensioning Standard Panels 457mm x 304mm ( 18" x 12" ) Standard Standard Standard Working area for 18" x 12" 400mm x 245mm 400mm x 245mm 400mm x 245mm 608mm x 457mm ( 24 x 18" ) on request on request on request Working area for 24" x 18" 550mm x 400mm 550mm x 400mm 550mm x 400mm Optical Inspection (Automatically or visuell) Inner Layers Yes Yes Yes Outer Layers Yes Yes Yes Surface blind vias - laser drilled Yes Yes Yes Electrical Test Specification Open Test - Threshold 1 W Yes Yes Yes Short Test - Threshold 10 MW Yes Yes Yes High Voltage Test - Voltage 500V / Threshold 1 GW / Sustain Time 10 ms Yes Yes Yes Interconnect Stress Test IST - according to ESA MEMO QT/2014/030/SHv2 Yes Yes Yes Isola IS 420 Material Yes Yes Yes Arlon 35N Material (according ADS_E_1029_Issue C) Yes N/A No DuPont AP Yes Yes No Procurement according to ECSS-Q-ST-70-10C /-11C Yes N/A Yes Procurement according to IPC-6012 / Class 3 Yes Yes N/A Procurement according to IPC-6012DS Yes Yes N/A Procurement according to MIL-PRF-55110E/F Yes N/A N/A Procurement according to ADS_E_1029_issueC Yes N/A N/A Abbreviations IPC ECSS ESA ADS MIL HDI Tg PTFE N/A FHS DHS dia. PCB PTH CIC Association Connecting Electronics Industries European Cooperation for Space Standardisation European Space Agency Astrium Dokument System United States Military Standard High Density Interconnect Glass Transition Temperature Polytetrafluorethylen not applicable Finish hole size Drill hole size Diameter Printed Circuit Board Plated Through Hole Copper Invar Copper
13 FOR FURTHER INFORMATION PLEASE CONTACT: TESAT PCB Manufacturing Thomas Maihöfer Application Engineer PCB & Plating Phone: +49(7191) OR Welf Rupp Application Engineer PCB & Plating Phone: +49(7191) Tesat-Spacecom GmbH & Co. KG Gerberstraße Backnang
GRAPHIC MANUFACTURING CAPABILITY Q217-18
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