GENERAL REQUIREMENTS FOR INTEGRATED CIRCUITS JOINT COMPANY STANDARD

Transcription

1 Page of 36 STACK Issue 2.2 Notice 2 GENERAL REQUIREMENTS FOR INTEGRATED CIRCUITS JOINT COMPANY STANDARD This Specification is issued by: STACK INTERNATIONAL Tel: +44 () Fax: +44 () Copyright 9 November 999 STACK International. This document may be reproduced with this copyright notice

2 GENERAL REQUIREMENTS Page 2 of 36 CONTENTS INTRODUCTION... Section Purpose and scope Use of equivalent tests Liaison Order of precedence Translation Compliance with internal company standards REFERENCED STANDARDS... 2 TERMS AND DEFINITIONS... 3 ADMINISTRATION... 4 Registration Suspension of registration Acceptance permit/concession Updates to this specification Waivers PROCEDURES... 5 Product discontinuation ESD protection during manufacture Specification control Internal quality audit Subcontract manufacturing Traceability CHANGE NOTIFICATION (PCN)... 6 SHIPMENT CONTROLS... 7 Date code remarking Inner box formation Date code age on delivery ELECTRICAL... 8 Operating conditions Electrical test MECHANICAL...Section 9 Package dimensions Device marking Moisture sensitivity Robustness of hermetic seals Lead (termination) finishes SHIP TO STOCK... QUALITY ASSURANCE... Quality system Sampling plans Failure analysis support Outgoing quality INCOMING INSPECTION... 2 Lot acceptance Suspension of deliveries Loss of approval AQL/LTPD figures % screening Incoming test schedule...table 3 QUALIFICATION...3 Purpose Samples References In process test results Product monitor results Maintenance of qualification standard Pre qualification questionnaire Technology verification Archiving Qualification test schedule...table 4 QUALIFICATION OF CHANGES...4 SIMILARITY ASSESSMENT... 5 RELIABILITY...Section 6 Operating reliability Failure criteria Corrective action Data accumulation Suspension of qualification approval Table 6 operating life failure rates PRODUCT MONITOR... 7 Monitor program Problem alert Data reporting Samples Production maturity factors Device dissipation Corrective action Suspension of qualification approval Accumulated test data Table 7 product monitor tests ENVIRONMENTAL... 8 Self ignition Toxic materials Environmental regulation compliance SHIPMENT PACKAGING... 9 General Electrostatic properties Magazine reuse Tubes Trays LABELS... 2 General Dry pack Outer box Inner box TEST CODE INFORMATION... 2 DOCUMENT REVISION HISTORY... 22

3 GENERAL REQUIREMENTS Page 3 of 36. INTRODUCTION. Purpose and Scope: This specification defines user quality, reliability and general requirements for integrated circuits..2 Use of equivalent tests: To comply with the requirements of this specification, the supplier shall perform the tests as specified. Other test methods may be used, provided an adequate and documented technical assessment has been performed, which shows the specified test requirement is being met. The technical assessment shall be supplied on request. The user reserves the right to reject on failure using the test as specified..3 Liaison: Enquiries relating to this specification which concern product deliveries or orders shall be addressed to the user. Enquiries relating to registration should be addressed to Stack International, Tyttenhanger House, Coursers Road, Colney Heath, St Albans, AL4 PG, U.K. Tel: () , Fax: () Order of precedence: In case of conflict the following order of precedence shall apply: a) The purchase document. b) The individual device specification. c) This specification. d) Any referenced documents. e) The data sheet..5 Translation: If translated into other languages the English language version of this specification shall govern..6 Compliance with internal standards: This document does not relieve the supplier of their responsibility to meet their own company internal requirements.

4 GENERAL REQUIREMENTS Page 4 of REFERENCED STANDARDS: 2. Unless otherwise specified the following documents form a part of this specification to the extent specified herein. Where no particular document revision is given the latest revision shall be used. EN53 EIA 554 EIA 54 EIA 556 EIA625 IEC JESD22A JESD22A2 JESD22A4 JESD22A6 JESD22A8 JESD22A JESD22A2 JESD22A3 JESD22A4 JESD22B JESD22B2 JESD22B3 JESD22B4 JESD22B7 JESD46 JESD47 JESD78 JStd4 JStd2 MilStd883 MilStd89 UL94 V MilF4256 Protection of electrostatic sensitive devices in clean room environments. Assessment of outgoing nonconforming levels in parts per million. Packaging materials for ESD senstive items. Outer shipping container bar code label standard. Requirements for handling electrostatic discharge sensitive (ESDS) devices. Fire hazard testing Needle flame test. Steady state temperature humidity bias life test. Accelerated moisture resistance unbiased autoclave. Temperature cycling. Thermal shock. Bias life. Highly accelerated temperature and humidity stress test (HAST). Moisture induced stress sensitivity for plastic surface mount devices. Preconditioning of plastic surface mount devices prior to reliability testing. Electrostatic discharge (ESD) sensitivity tesing human body model (HBM). Physical Dimensions. Solderability test method. Vibration, variable frequency. Mechanical shock. Marking permanency. Guidelines for user notification of Product/Process changes by Semiconductor Suppliers. Stress test driven qualification of integrated circuits. IC Latchup test. Requirements for soldering fluxes. Moisture/reflow sensitivity classification for non hermetic solid state surface mount devices Test methods and procedures for microelectronics. Standard DOD bar code symbology. Flammability of plastic materials. Flux soldering liquid (rosin base).

5 GENERAL REQUIREMENTS Page 5 of TERMS AND DEFINITIONS 3. For the purposes of this specification, when the following terms are used in italics, they have the meaning defined in this section: Acceptance Permit /concession: Data Sheet: Device: Device Specification: DPM: Form/Fit/Function Form Fit Function Incoming Lot: Inner Box: LTPD: Manufacturing Lot: Magazine: Outer Box: Shipping Lot: PQQ: PPM: Room Temperature: Specification: Supplier: Topmin: Topmax: Triboelectric Charge: User: Waiver: User agreement to allow the delivery of a shipping lot which does not fully meet the requirements of this specification. A device specification written by the device manufacturer. Any integrated circuit to which this specification is applied. A device specification written by a user and agreed by the supplier. Defect per million. As defined in JESD46 ie: Visual appearance including color, marking and surface finish. External dimensions and associated tolerances. Electrical, mechanical, thermal, quality, and reliability performance characteristics. One or more shipments of a device, grouped together for the purpose of incoming inspection, but including no more than the number of shipments received in one week. A box or bag containing devices in magazines. Lot tolerance percent defective. A definite quantity of devices tracked at each manufacturing operation. It is associated with a travel log and constitutes a group, homogeneously processed through all manufacturing operations under uniform manufacturing conditions. Sticks, tubes, matrix trays, tape/reel etc. An outer shipping container, containing one or more inner boxes. A single lot of one or more outer boxes received by a user. Pre qualification questionnaire. Parts per million. 25 o C ± 5 o C This specification together with all other documents referred to as forming part thereof. The company identified by the logo, or name marked on the device. Minimum operating temperature. Maximum operating temperature. An electrical charge generated by frictional movement or separation of two surfaces. A component purchaser requiring compliance to this specification. A written notice that a requirement of this specification no longer applies or is relaxed.

6 GENERAL REQUIREMENTS Page 6 of ADMINISTRATION 4. Registration: Registration is a formal supplier declaration that the suppliers standard qualification procedure, product monitor program and manufacturing processes are in compliance with this specification and that the other requirements of this specification are met when this specification is invoked by user documentation. 4.2 Suspension of registration: If it is determined that a registered supplier is not fully compliant with this specification, and if after due discussion agreement cannot be reached to resolve the problem, then registration may be suspended until the non compliance is corrected or a corrective action plan has been agreed. 4.3 Acceptance permits/concessions: a) In the event of the supplier wishing to ship devices which deviate from the requirements of the purchase order, relevant specifications, or this specification, prior consent must be obtained from the user. b) Applications for such concessions must contain the following information: Purchase Order Number. Description of items. Supplier type number. User part number. Quantities or time period affected. Description of deviation(s). Cause of deviations. Reason for requesting acceptance. Corrective measures being taken to overcome the deviation on subsequent deliveries. c) Devices subject to application for a concession shall be held at the supplier's premises pending reply unless otherwise instructed by the user. 4.4 Updates to this specification: Updates to this specification will be circulated to all STACK registered suppliers. A period of time will be defined at each release date depending on the extent of the change to allow suppliers to formally accept the new issue. 4.5 Waivers: Any waiver request requires the approval of the STACK membership. If granted the waiver will stand as a change to this specification and as such is applicable to all suppliers. Waivers to this specification will not be given to individual suppliers.

7 GENERAL REQUIREMENTS Page 7 of PROCEDURES 5. Product discontinuation: The supplier shall provide to the user 2 months notice of last order dates for single source devices and 6 months for multi sourced devices. 5.2 ESD protection during manufacture: All integrated circuits are considered to be static sensitive and shall be protected through the supplier's manufacturing operation. Suppliers shall ensure that devices are not exposed to static damage and are not degraded or damaged due to static. EN53, and EIA625 are considered suitable standards for ESD precautions in wafer fab and probe. 5.3 Specification control: The supplier shall: a) Have central or local record of the users part number and specification, against the product to be delivered. b) Ensure the specifications on the purchase documents have been reviewed and accepted by personnel authorized to do so. 5.4 Internal quality audits: The supplier shall periodically audit each internal manufacturing location, to assess compliance with internal quality standards. The results of these audits and the audit acceptance criteria, shall be available for on site inspection during a STACK audit. 5.5 Sub contract manufacturing: The supplier shall qualify and periodically audit all sub contracted operations to a quality standard equivalent to the suppliers internal operations. 5.6 Traceability: a) The supplier shall have traceability for any device in a shipping lot through device marking (preferred on top surface) or magazine marking or inner box marking to identify the manufacturing route, ie: groups of wafer lots wafer fab location assembly location test location b) The route code shall be supplied on request. c) The procedure shall be available for inspection during audit.

8 GENERAL REQUIREMENTS Page 8 of PRODUCT OR PROCESS CHANGE NOTIFICATION (PCN) 6. Notification: In the event of the supplier proposing a change subsequent to the supply of the initial qualification samples, then the supplier shall notify the user, in writing, at least 9 days prior to incorporation in the delivered product. The user will respond within 3 days, to accept the change, reject the change or request further information. 6.2 Notification details: The PCN shall include the following items: a) Title of change. b) Supplier type number(s) affected. c) Supplier notification identification number. d) Estimated last order and shipment dates for unchanged devices to be supplied on request. e) Estimated first shipment date of changed devices. f) Manufacturing location and product line affected. g) A thorough description of the proposed change. h) Means of distinguishing changed devices from unchanged devices. This may be a date code or date code range. i) Sufficient engineering and/or qualification test data, including details of any qualification test vehicle used and its applicability to the product change, shall be available on request to demonstrate that the change will not adversely affect device form, fit, function, quality or reliability, and that the changed product will continue to meet the specified requirements. j) User part number of the affected device (preferred item but not mandatory). 6.3 Notifiable changes: a) Changes which affect device form, fit, function, quality or reliability. b) JESD46 may be used as a guide to changes requiring notification c) Package dimension changes. d) Notifiable changes to tubes, trays or other magazines shall include: Dimensions: Min; Max and typical including wall thickness Cross sectional shape Material of construction Ability to withstand temperature extremes Electrostatic coating material (if any) and electrostatic performance Transparency in so far as it affects visibility of devices and their marking Basic color e.g. Red/green etc. but not shades of color

9 GENERAL REQUIREMENTS Page 9 of SHIPMENT CONTROLS 7. Date code remarking: If the date of assembly and test are both marked, the test date can be remarked if the device is retested at a later date. If only one date is marked to represent the manufacturing date and initial electrical test it shall not be changed. 7.2 Inner box formation: a) An inner box shall contain only devices of the same die revision/stepping level. b) It is preferred that devices shall also be from the same: wafer fab location. assembly site. outgoing QA electrical inspection site. 7.3 Date code age on delivery: The date codes (see paragraph 9.2) of devices shall not be older than 24 months referred to the incoming goods arrival date. 8. ELECTRICAL 8. Operating Conditions: As defined in the device specification or data sheet. 8.2 Electrical Test: All devices shipped must have passed a full electrical test per Test Code a or in the case of user specific devices a test program approved by the user.

10 GENERAL REQUIREMENTS Page of MECHANICAL 9. Package dimensions: 9.. If package dimensions are not specified by the user or by any industry standard, the latest agreed data sheet revision shall be the requirement Fine pitch packages For packages with lead pitch.5mm Coplanarity, Tweeze/Span, Bent lead/skew & Lead Foot Angle shall be as specified in the relevant Jedec package outline. Tweeze span is defined as inward /outward bending of the leads 9.2 Device marking: 9.2. Legibility: All the specified markings on the device shall be clearly legible Top surface: All of the following required markings shall be marked on the top side except where otherwise indicated below: a) Pin shall be identifiable either by a mark or by reference to a physical feature of the device. b) The supplier's name or logo. c) The supplier type number or individual user part number as required. For memory devices the supplier type number shall include a mask revision identifier. d) Date code of assembly or test. Four numerals Year, Year, Week, Week (YYWW) or 3 numerals (YWW) or one year numeral and one month character(ym) are acceptable formats. If both assembly and test date codes are marked the assembly code may be bottom marked. e) A manufacturing route trace code. This item is preferred on the top side but may be on the bottom side Small packages: If the marking area available on the device is too small to include all the required marking, then, the magazine, or inner box containing the device, shall carry the full marking. 9.3 Moisture sensitivity: The moisture sensitivity of all non hermetic surface mount components shall be tested and classified according to JESD22A2 or JSTD2. The classification shall be supplied on request. 9.4 Robustness of hermetic seals: Seal shall not be compromised by any normal handling, testing or manufacturing processes.

11 GENERAL REQUIREMENTS Page of Lead (termination) finishes: a) The following termination finishes are permitted as indicated provided they meet the solderability requirements of this specification. b) Thickness limits shall be met over 95% of termination surface. Appropriate measurement locations shall be selected by the supplier. Note: um = microinch =.3937 Mil 9.5. Hot solder dip: Applicable for Through Hole and SMD packages. It is not necessary for solder dipping to cover the entire lead. The area covered should be appropriate to the type of package: eg. J bend packages area below base plane; Gull wing packages center of bottom radius to trimmed edge of lead. Sn/Pb composition: 7/3 to 5/5. Thickness: 5 um to 5 um Tin lead plate: Applicable for Through Hole and SMD packages. Sn/Pb composition: 95/5 to 6/4. Thickness: 5 to 5um Tin electroplate: Applicable for Through Hole packages only. Surface must be dense, homogenous and free of codeposited organic material. Must be suitably treated to inhibit whisker growth. Thickness: 5 to 5um Gold: Not permitted unless specifically specified in the device specification or purchase documents. Composition: 99.7% gold. Thickness:.27um minimum Palladium over nickel plate : Thickness: Nickel um to 3um. Palladium.76um to.25um.. SHIP TO STOCK The supplier will be expected to work with individual users at their request towards achieving Ship to Stock status, whereby, incoming inspection and test is not performed. Users may have individual Ship to Stock agreements.

12 GENERAL REQUIREMENTS Page 2 of 36. QUALITY ASSURANCE. Quality system: a) The supplier shall have the appropriate ISO9 or QS9 registration and apply TQM approach, or the supplier shall have established and documented a quality management system of equivalent standard. b) The system shall ensure that the requirements of this specification are met. c) The system shall provide for the prevention and ready detection of discrepancies and for timely and positive corrective action..2 Sampling Plans: Appropriate and statistically valid sampling plans shall be used and documented..3 Failure Analysis Support: a) The supplier shall maintain an adequate failure analysis capability and provide a timely response to failures returned for failure verification or failure analysis. b) Representative samples of devices returned as failures, shall be analyzed and a failure analysis report issued to the originating user, typically within 3 days of the receipt by the analytical facility of such returns. c) For failure returns relating to a critical problem at a user, the failure analysis report shall typically be issued within 7 days of receipt by the analytical facility..4 Outgoing quality: Table DEVICE FAMILY or PPM2.4. DPM levels: The supplier shall measure the COMPLEXITY per EIA 554 outgoing quality level in defects per million, for Transistors: Gates: individual devices or device families from uniform SSI 5 5 manufacturing processes. The measurement of outgoing quality via in process measurements is MSI 5 5 acceptable in principle. The number of defects will LSI 5 5 include all devices non conforming to any functional, VLSI K 2K electrical, visual or mechanical specification ULSI K 2K requirement of a device. SLSI M 2K DPM calculation: The assessment method and PPM calculation should be compatible with EIA Corrective action: If the outgoing quality levels given in Table are not met, corrective action shall be taken by the supplier. Memory ASIC Programmable logic when supplied programmed and tested PPM3.4.4 Data reporting: Outgoing quality data shall be reported quarterly on request to individual users. Visual/mechanical per EIA 554 2

13 GENERAL REQUIREMENTS Page 3 of INCOMING INSPECTION 2. Lot acceptance: Users reserve the right to perform incoming lot acceptance on every lot received, using any: a) Incoming test in Table 3. b) Qualification test in Table 4 Table 3 Incoming test Package types: C Hermetic through hole P Plastic through hole H Hermetic SMD B Non hermetic SMD Pkg Test code per section 2 Insp. AQL Type Level % TCa Electrical test II.65 TC2c Visual examination II.4 C H TC7 Hermeticity fine Mil II.65 C H TC7 Hermeticity gross Mil II.25 TC3 Dimensions II. 2.2 Suspension of deliveries: The user may bring to the attention of the supplier any failure to meet a qualification or incoming test and to require the supplier to withhold further deliveries until the cause of the failure has been corrected. 2.3 Loss of approval: A failure of one or more shipping lots of a specific device to meet the requirements of this specification or the device specification shall constitute grounds for loss of approval. The action taken will depend on the nature of the problem found. 2.4 AQL/LTPD figures: The AQL/LTPD figures quoted are for the purpose of individual incoming lot rejection; they do not imply an overall acceptance quality level. 2.5 % Screening: Users reserve the right to perform % screening on individual shipping lots received and to reject to the supplier any devices which do not meet the specified requirements.

14 GENERAL REQUIREMENTS Page 4 of QUALIFICATION 3. Purpose: a) To demonstrate that a device has the CAPABILITY to meet the specified electrical, quality and reliability requirements. b) To demonstrate that there is sufficient margin against the specification, so that, adequate quality and reliability can be expected, in user applications. c) The qualification tests, are not intended to measure the quality or reliability of the device. 3.2 Samples: 3.2. Larger sample sizes: If a larger sample size than specified is used and failures allowed, then the result must meet an LTPD value of: Specified sample size 5 or less LTPD = 5% Specified sample size 76 LTPD = 3% Additional samples: Users reserve the right, to take additional samples for a qualification test, where this is necessary, in order to reach a clear decision. For example, when dimension samples give a coplanarity result very close to the specified limit Consolidation of lots: Where production volumes of a device are low and the sample sizes specified, are not economically feasible from one manufacturing lot, consolidation of lots is permissible Reduced sample sizes: For commercial reasons the suppliers qualification procedures may allow devices to be designated qualified and released to the market after testing to a qualification schedule which does not fully meet STACK requirements, i.e. reduced sample size, reduced test time etc. This is acceptable provided test data continues to be accumulated and corrective actions/repeat testing performed as necessary until the STACK qualification level is reached or exceeded in a reasonable time. 3.3 References: These are given for guidance only. Reference shall always be made to the appropriate Test Code information for full test details. 3.4 In process test results: a) If any of the Inspection or Package qualification tests are performed on a regular basis in the manufacturing line, these tests need not be repeated in new device qualification testing. b) If qualification tests are not performed, manufacturing inspection results showing the current quality level shall be included in the Qualification Report. Manufacturing package test results shall be available on request.

15 GENERAL REQUIREMENTS Page 5 of Product monitor results: The supplier shall make reliability monitor data available on request, as part of the qualification procedure. 3.6 Maintenance of qualification standard: Regular quality and reliability test results, that are obtained from a monitor program, but which are not related to any particular customer shipment, are an acceptable method of maintaining the qualification standard of this specification. 3.7 Prequal questionnaire: When requested by a user, the supplier shall complete a STACK PQQ and return it to the person named on the front sheet. 3.8 Technology verification: a) As part of qualification, a user may assess the technology and materials of a device against the information given in the PQQ. b) Non compliance with the PQQ or the non adequacy of its content are grounds for rejection. 3.9 Archiving: The qualification report and the test specification (not test program), used in the qualification shall be archived for a minimum of 3 years.

16 GENERAL REQUIREMENTS Page 6 of 36 Table 4 Qualification Test Schedule Test Code Package Type note 3 TITLE Test Reference # of lots SS per lot Max rej Note c d a 2b 3 P B PROCESS RELIABILITY Oxide Integrity Electromigration ELECTRICAL EVALUATION Electrical Test & Datalog Electrical Characterisation Input/Output Capacitance LatchUp ESD Human Body Model System level soft error per table 6 INSPECTION External Visual Inspection Internal Visual Inspection XRay Inspection MIL JESD78 JESD 22A4 MIL MIL 8832 MIL CH P B CP C H PACKAGE TESTS Dimensions Solderability (76 leads / 5 devices min) Internal water vapor content Marking Permanency Bond Strength (76 wires/5 devices min) Die Shear Strength Thermal Impedance Flammability Lead integrity (5 leads/3 dev min) Lid torque JESD 22B JESD 22B2 MIL 8838 JESD 22B7 MIL 8832 MIL MIL 8832 UL94V MIL MIL C H THERMAL TESTS Thermal Shock sequence, cycles Temperature cycling sequence JESD 22A6 JESD 22A c a C H C H C H C H C H C H MECHANICAL SEQUENCE Hermeticity (fine/gross) Mechanical shock Vibration, variable frequency Constant acceleration, Y axis Visual examination Guard banded electrical test MIL 8834 JESD 22B4 JESD 22B3 MIL ELECTRICAL ENDURANCE High temperature operating life LTOL / Hot electron injection Write/erase endurance life Data retention bake JESD 22A8 MIL MIL P B P B MOISTURE ENDURANCE THB: 85 o C/85%RH sequence or: HAST sequence Autoclave Note : Number of lots Sample size shown is required from each of 3 lots for qualification of new processes or new device families. For individual device qualifications lot is required. Note 3: Package Types C Hermetic through hole. H Hermetic surface mounted. P Plastic through hole. B Non hermetic surface mounted. JESD 22A JESD 22A JESD 22A2 Note 2: Test Sequences For tests that are specified as sequences, the same samples shall successively receive all the tests in the sequence. Note 4: Sample sizes As an alternative to using the specified sample size it is acceptable to test a range of similar devices with a smaller sample size in order to accumulate the sample size specified

17 GENERAL REQUIREMENTS Page 7 of QUALIFICATION OF CHANGES 4. a) The principle of similarity may be applied in the qualification of changes. b) What constitutes a change which requires qualification work is a matter of judgement, but in general, a change must be qualified if there is a potential effect on performance, quality or reliability, or if there is any degree of uncertainty about the effect of the change. c) Guidance on the qualification tests which the supplier should consider applying, for the various combinations of die, package and process changes, is shown in Table 3 of JEDEC Std 47. The supplier shall perform tests defined in the qualification table, that are appropriate, or relevant to the change. d) ASIC process stability and reproducibility across different manufacturing sites can be verified through measurement of critical electrical and physical process parameters on transistor structures built into every wafer. This is considered equivalent to performing electrical evaluation tests on individual designs produced on the transferred process. On request the supplier shall perform full characterisation of any transferred device to resolve design issues arising from a process transfer. 5. SIMILARITY ASSESSMENT 5. Introduction: The principle of similarity may be applied in qualification, qualification of changes and product monitor testing. Definition of similarity shall be subject to audit. 5.2 Die changes: The supplier shall have documented and operate an appropriate set of die similarity rules. 5.3 Process/wafer fab changes: Process technologies must be examined module by module. Dissimilar modules shall be the focal points of analysis to determine what type of testing is required to properly confirm reliability. 5.4 Package/assembly changes: a) Package families shall be grouped by configuration and materials of construction. In general, all members of the group that are equal to or smaller in dimensions and lead count, can be considered as similar to a qualified package, provided the assembly process technology and the assembly location are identical. b) Packages should be qualified with the largest die they are designed to carry that is currently in production.

18 GENERAL REQUIREMENTS Page 8 of RELIABILITY 6. Operating reliability: a) Unless otherwise specified in the device specification, the failure rate of devices operating in systems, at an ambient temperature of +55 o C, shall not exceed the figures in Table 6 over a period of 2 years. b) Results observed at a temperature other than +55 o C, will be projected to this temperature, with 6% confidence using an activation energy, appropriate to the failure mechanism observed. c) Refer to Test code 6 for calculation of acceleration factors. 6.2 Failure criteria: a) A functional failure relative to the device specification. b) A parameter limit failure relative to the device specification. c) Intermittent faults due to the package pins, or the interconnect system, from the pins to the die surface, shall be regarded as failures. d) Transitory faults attributable to the device shall be regarded as failures. 6.3 Corrective action: If, when used within the specified limits, the device does not satisfy the reliability requirements, the supplier shall investigate and take agreed actions to achieve conformity within the specification. 6.4 Data accumulation: The user reserves the right to apply accelerated life test and accumulate life test data on any device, starting with the life test performed for qualification. 6.5 Suspension of qualification approval: If the reliability data accumulated shows a device does not meet the specified requirement, qualification approval may be suspended or revoked. Table 6 Operating Life Failure Rates FUNCTION COMPLEXITY FIT rate at 6% UCL & Tamb 55 o C Power diss. * = transistors BIP MOS SSI < 35mW SSI > 35mW MSI < 35mW MSI > 35mW LSI VLSI VLSI ULSI SLSI * < 5 * < 5 * < 5 * < 5 * < 5K * < 5K * < k * < k * > M Linear * < 4 * > 4 Prom after programming Eprom or Flash EEPROM SRAM DRAM ASIC PAL FPLA LCA DRAM SRAM EEPROM EPROM FLASH < 4k 6k 64k <M 2M 4M 8M 6M 32M 64M M 4M <4k 6k 64k 256k M 4M 6M 4M 6M 64M 256M The supplier shall on request give a FIT rate prediction (based on a demonstrable methodology) for the application and environmental conditions intended. After programming " System level soft single bit error 9% UCL Write erase endurance & Data retention max reject rate FIT FIT Under review

19 GENERAL REQUIREMENTS Page 9 of PRODUCT MONITOR 7. Monitor program: a) The supplier shall have a continuous monitor program to demonstrate, that the requirements of this specification are met, on an ongoing basis, for each manufacturing operation. b) Statistical Process Control: The supplier shall control wafer production, assembly process and final test using statistical analysis. Any deviation shall be analyzed, the root cause determined and the consequent corrective actions implemented. Parametric and yield data from probe and final tests shall be analyzed against inline or electrical process control data. c) Table 7 shows the minimum test requirements for a conventional stress driven monitor. The use of a Failure Mechanism Driven approach to optimise reliability monitoring is encouraged. Ongoing qualification test data and accumulated reliability monitor test data may be assessed in a structured way to reduce reliability monitor testing when failure mechanisms are shown to be eliminated by process controls and to increase testing or introduce new tests when failures are detected. 7.2 Problem alert: In the case of serious failure the STACK office and individual users shall be notified by a problem ALERT. 7.3 Data reporting: Reliability monitor data accumulated over the preceding six month period, shall be available to users on request, at one months notice. 7.4 Samples: a) Appropriate sample sizes shall be selected. b) Samples shall be randomly selected from representative package and process family devices. c) All package types and all process families but not necessarily all package/process combinations shall be monitored. d) Package tests shall use the largest die size the package is designed to carry that is currently in production. e) Sample lots will be added to the monitor at intervals appropriate for each test. 7.5 Production maturity factors: The FIT rates in Table 6 represent devices in mature production. Maturity factors (MF) may be used to multiply the values in Table 6. Production time (months) Maturity factor (MF) Device dissipation: Where the device dissipation in the oven is significantly less than in normal operation this shall be taken into account in FIT rate calculations.

20 GENERAL REQUIREMENTS Page 2 of Corrective action: Failure to meet the limits in Table 7 shall trigger appropriate corrective action by the supplier. 7.8 Suspension of qualification approval: Continued failure to meet the limits in Table 7 may lead to qualification approval being suspended or revoked. 7.9 Accumulated test data: a) Failure rates and levels may be a rolling average with data accumulation period appropriate to the production quantity level. b) For HTOL test, the minimum total sample size (SS) required over the data 2 9 Chi (B,c) accumulation period, may be calculated using: SS = where: 2 FITS A t Chi 2 (6%,) =.83 Chi 2 (6%,) = 4.4 Chi 2 (6%,2) = 6.2 FITS = see Table 6 c= number of failures B= upper confidence limit A = = AT x AV (see test 6) t = time under bias in oven Table 7 Product Monitor Tests: a) Any test frequently performed in manufacturing need not be repeated in QA product monitor. b) Package types subject to each test are as given in Table 4. Test Codes TITLE Max Failure Notes 6 + a Early life Note 4,2 6 + a Long term life Note 5 2, 6 34 Data retention bake.5% 3 Temperature cycling.5% 3 9 Thermal shocks.5% /85 or HAST + precondition.5% 3 4 Marking permanence.5% 3 2 Water vapor content.5% 3 5 Solderability.5% 3 Notes to table 7:. Duration up to 68h. 2. Failure rate calculated as shown in Test Failure levels are actual number of failures divided by the quantity tested. 4. Early life FIT rate = 2 x Table 6 value x prod. maturity factor (section 7.5). 5. Long term life FIT rate = x Table 6 value x prod. maturity factor. 6. HTOL on devices may be substituted by WLR testing to a STACK approved standard.

21 GENERAL REQUIREMENTS Page 2 of ENVIRONMENTAL 8. Self ignition: When a device fails, whether it is due to an electrical overload or an inherent fault in the device, it shall not ignite, explode or emit harmful or toxic material. 8.2 Toxic materials: No toxic effects shall result from handling, usage or disposal of the item in accordance with the provisions of this, and the referenced specifications and documents. 8.3 Environmental regulation compliance: The supplier shall fully comply with all applicable environmental regulations. The supplier will continuously reduce the impact of its operations and products on the environment by reducing emissions and waste, by the use of post consumer materials, by product stewardship and by other means as necessary. Compliance with the environmental requirements shall be a major consideration for supplier selection. 9 SHIPMENT PACKAGING 9. General: 9.. ESD protection: All integrated circuits are considered to be static sensitive and must be supplied in suitable protective packaging with electrostatic properties meeting the requirements of EIA 54 unless otherwise specified in this section Specification compliance after shipment: The method of packing for land, sea or air transportation shall adequately protect the device from being degraded in any way during transit to the address on the Purchase Order Device orientation: Devices shall all have the same orientation within a magazine User instructions: Any special handling requirements or precautions eg : placing of desiccants resealing of containers maximum number of 24h 25 o C bake cycles allowable which must be observed for storage or reshipment shall be stated on the packing and where necessary, supporting documentation shall be supplied with each inner box. 9.2 Electrostatic properties: See Test Code 44 for information on test methods Electrostatic shield: The inner box or magazine must contain an electrostatic shield of surface resistivity less than 6 ohms/square Magazine surface resistivity: Packing material in direct contact with the device pins shall have a surface resistivity less than 2 ohms/square.

22 GENERAL REQUIREMENTS Page 22 of Inner box surface characteristics: All surfaces of the inner box other than an electrostatic shield shall meet the following: Surface resistivity: 5 to 2 ohms/square. Charge decay in 2 sec: 5kv to less than v. Triboelectric charge: Not to exceed v. 9.3 Magazine reuse: a) Tubes, trays or other magazines which depend for their electrostatic properties on surface coatings shall be limited to a defined number of load/unload cycles. The specified surface resistivity shall be met after the defined number of cycles and data shall be available to justify the limit chosen. Coated magazines may be "reset" to zero load cycles by a suitable recycling process which includes recoating. b) Magazines which utilize bulk material properties may be reused. 9.4 Tubes: 9.4. Cushioning material: Ceramic devices packaged in tubes shall have an adequate amount of cushioning material to ensure that the devices are not damaged as a result of movement within the tubes Partial tubes: Full tubes shall be shipped with a maximum of one partlyfilled tube per inner box Marking access: The material of the tube shall be transparent or contain a slot to allow inspection of top markings Opening: Tubes shall be openable at either end. 9.5 Trays: 9.5. For devices with a moisture sensitivity classification according to JESD22A2 or JSTD2 of 4 or higher, the tray shall have a bake capability of 25 o C min Bake temperature limit to be marked on tray No more than full trays to be stacked in height with one further tray as a cover.

23 GENERAL REQUIREMENTS Page 23 of LABELS 2. General: 2.. Human readable content: The content shown for each label in this section shall be available in human readable form on the outside of the relevant package Machine readable content: Bar codes for those items specified shall be included in 3 of 9 code (bar code 39) per Mil Std 89 or EIA556 or equivalent compatible standard Warning notices: Any necessary warning notices or symbols to ensure the safety of the contents shall be included as appropriate. In the case of electrostatic or moisture sensitive devices, it is preferred that this is indicated in letters at least 4mm high. 2.2 Label Content Dry pack label: (a) Date of sealing and sealed life or expiration date. (b) Time and storage condition limits after opening. (c) Bake conditions if usage conditions after opening are violated. (d) Moisture sensitivity classification per JESD22A2 or JSTD2 Bar code Outer box label: This label is typically implemented as a shipping note attached to the outer box. For security reasons items (d), (e) & (f) can be omitted with the agreement of the user (a) Delivery address. (b) Purchase Order number. * (c) User part number. * (d) Supplier device type number. * (e) The supplier's name. (f) Quantities enclosed of each device type. * Inner box label: (a) Supplier device type number. * (b) User part number. (preferred but not mandatory) * (c) Purchase order number. (preferred but not mandatory) * (d) Quantity of devices. * (e) Date code. * (f) Lot number. * (g) Assembly location. (preferred but not mandatory) (h) Test location. (preferred but not mandatory)

24 GENERAL REQUIREMENTS Page 24 of TEST CODE INFORMATION TEST ELECTRICAL TEST TEST a Guard Banded Electrical Test: Electrical test performed at the worst still air ambient temperature in the range of Topmin to Topmax. If for convenience, the test is carried out at a temperature which is not the worst one then full guard banding allowance shall be made. Characterization data shall be made available on request to justify the test limits chosen for guard banded tests. The test shall include: a) DC test to datasheet. b) AC test to datasheet. c) Functional Test: Fault coverage for stuck at & should typically exceed 95% Special tests where applicable, eg. pattern sensitivity etc. Functionality verification to the device specification. TEST c Electrical Test and Data Log: Devices shall be tested and datalogged at Topmin, 25 o C and Topmax, with results from the datalog made available to the user as a written report containing the following: a) Statistics for each measured parameter, including Min, Max and Mean. Standard deviation and CP/CPK may also be included at the suppliers discretion. b) Histograms of "critical" parameters. TEST d Electrical Characterisation: Purpose: To check variation within the device specification limits and to explore parametric behavior outside the device specification limits to look for marginality in the device design or process. Results: These shall be presented on parameter variation with supply voltage and other relevant parameters. Shmoo plots: Shall be included for "critical" parameters including timings, input and output thresholds vs supply voltage etc. Temperature Trends: Temperature coefficients for "critical" parameters and supply currents shall be given as part of the characterisation. TEST e Population Parameter Drift: Devices shall pass Test a both before and after endurance testing and results of main parameters shall be datalogged. a) Individual devices are not required to be serialized. b) Adequate parameter stability shall be confirmed. c) Statistical measures of population drift shall be reported. The drift of the population mean for any parameter shall be less than % of the initial population mean. d) Functional failures may be excluded from calculation of mean values.

25 GENERAL REQUIREMENTS Page 25 of 36 TEST 2 VISUAL INSPECTION: TEST 2a External Visual Inspection: Purpose, apparatus and procedure shall be as specified in Mil Std 883, Method 29. Hermetic package failure criteria: As per Mil Std 883, Method 29. Plastic package failure criteria: Mil Std 883, Method 29 with the addition of the following moulding defect criteria. Where no measurement criteria is given, the defect is a reject if visible at 3X magnification: a) Incomplete fill of package form. b) Inner lead exposed. c) Rough surface > % of the total area in any site of package. d) Pin holes. e) Surface blister. f) Blister void (surface blister already broken or can be broken by a needle). g) Blister near a power package mounting tab. h) Ejection pin defects in any direction and in any part of the marking area which are >.mm in any direction. i) Any crack or gap at interface of metal and resin visible at X magnification. j) Flash on lead >.5mm from package body. k) Flash on power package mounting tab hole. l) Cap and frame misalignment >.mm. m) Broken package. n) Resin mark around ejector hole >.mm in any direction. TEST 2b Internal Visual Inspection: Mil Std 883, Method 2, Condition B. Only the criteria given which is relevant to the device under inspection need be applied. Normally supplier results prior to encapsulation will be used. If decapsulation is employed, due allowance will be made for damage caused in the decapsulation process. TEST 2c Visual Examination: a) An external examination of the marking shall be performed, without magnification, or with a viewer having a magnification no greater than 3X. b) A visual examination of the case, leads, or seals shall be performed at a magnification between X and 2X. c) Evidence of defects or damage to the case, leads or seals or illegible markings shall be considered a failure. Damage to the marking caused by fixturing or handling during tests, shall not be a cause for device rejection.

26 GENERAL REQUIREMENTS Page 26 of 36 TEST 3 DIMENSIONS: Mil Std 883, Method 26 or JESD22B TEST 4 MARKING PERMANENCY: Not applicable to laser marking. The use of CFC solvents is not a requirement. The sample "groups" may each consist of one device. Each group shall be tested with a different solvent. JESD22B7 solutions a, b and c or Mil Std 883, Method 25 solutions a, b and d TEST 5 SOLDERABILITY: This test is intended to assure that devices stored in the as received condition and packaging shall retain solderability after delivery for a minimum of 2 months in "standard atmospheric conditions" of ambient temperature and relative humidity in the range 5 to 3 o C, 2 to 7%RH. Test Method: JESD22B2 or Mil Std 883, Method 23. Flux: Non activated flux Type R of MilF4256 or Type ROL of JSTD4. Ageing: 8 hours steam. Temperature: a) Through Hole Devices: 245 o C for 5 sec. b) Surface Mount Devices: 25 o C ± 2 o C for 5 sec ± s. Palladium plated devices: The supplier may choose to perform the test at 25 o C ± 2 o C for s ± s but the user reserves the right to perform the test as specified and to reject on failure. TEST 6 BOND STRENGTH: Minimum bond strength as specified in Mil Std 883, Method 2, Test condition D. Recording of failure categories is not required. Plastic packages shall be tested before encapsulation.

27 GENERAL REQUIREMENTS Page 27 of 36 TEST 7 HERMETICITY: Not applicable to non hermetic packages. Fine: Mil Std 883, Method 4, Condition A or B. then Gross: Mil Std 883, Method 4, Condition C. TEST 8 LEAD INTEGRITY: Mil Std 883, Method 24, Condition B2 lead fatigue followed by hermeticity test (TC7) for hermetic packages only. Not applicable to SMD and PGA. Dual in line packages: A minimum of 4 leads on each sample device to receive 3 inward bends of 5 o. If corner pins have reduced width or thickness then at least corner pin shall be tested on each device such that all 4 corner pins are included in the sample. TEST 9 THERMAL SHOCK SEQUENCE: Mil Std 883, Method, Condition B or JESD22A6, Condition C. Liquid to liquid thermal shocks. sec maximum transfer time between liquids. 2 minutes minimum dwell time in each liquid. Applicable to hermetic packages only. End point tests: Hermeticity test code 7. Visual examination test code 2c. Guard banded electrical test test code a. TEST TEMPERATURE CYCLING: Mil Std 883, Method Condition B or JESD22A4 Condition B. air to air thermal cycles. minute maximum transfer time. minutes minimum dwell time. Solder preconditioning to be applied for non hermetic SMD as per test code 26 End point tests: Hermeticity test code 7 (hermetic devices only). Visual examination test code 2c. Guard banded electrical test test code a. The supplier shall apply the specified number of 55 to +25 o C cycles. Alternative number of cycles and temperature extremes with Tmin 4C are acceptable if the supplier can show the stress level is equivalent.

28 GENERAL REQUIREMENTS Page 28 of 36 TEST MECHANICAL SHOCK: JESD22B4 Condition B or Mil Std 883, Method 22, Condition B: 5 pulses 5g, each pulse.5msec duration. TEST 2 VIBRATION (VARIABLE FREQUENCY): JESD22B3 or Mil Std 883, Method 27 Condition A. Peak acceleration: 2g. TEST 3 CONSTANT ACCELERATION: Mil Std 883, Method 2. Applicable only to cavity packages and devices with bonds and solder joints not molded in. Apply Y axis only. The supplier shall select a test condition appropriate to the package mass, area and perimeter length. Condition E: 3,g for mass < 5 gram. Condition D: 2,g for cavity or inner seal perimeter > 5mm. TEST 5 FLAMMABILITY: UL94 V The bulk material test is mandatory but the supplier may meet this test requirement by using material manufacturers test data. If bulk material is not available IEC69522 needle flame is a suitable method for tests on individual devices.

29 GENERAL REQUIREMENTS Page 29 of 36 TEST 6 HTOL TEST: Test Method: JESD22A8 or Mil Std 883, Method 5. The supplier shall apply a static or dynamic life test which best relates to the device type. General: a) Devices shall be cooled to room temperature prior to the removal of bias. b) Interruption of bias for up to one minute for the purpose of moving the devices to cool down positions shall not be considered removal of bias. End point measurements: a) Following bias removal the devices shall be maintained at less than 3 o C ambient until tested. b) Electrical endpoint testing shall be completed within 48 hours of removal of bias. c) Electrical test e population parameter drift. Qualification conditions: a) h at Tamb 25 o C. Higher test temperatures for shorter test times may be used provided the stress is equivalent and anomalous failures do not result from the higher test temperature. b) Maximum operating voltage. c) If internal power dissipation causes Tj to exceed Tjmax or activate a thermal shutdown circuit, the test temperature may be reduced and the test time extended. d) By using the temperature and voltage acceleration factors defined herein, the field life simulated by the qualification test shall be stated in the Qualification Report. Test results assessment: Product monitor results accumulated from periods of accelerated life test may be used to assess early life and long term failure rates, using: FIT = 2 Chi (B,c) 2 N t A A T 9 V Where: Chi 2 (6%,) =.83 Chi 2 (6%,) = 4.4 Chi 2 (6%,2) = 6.2 B = upper confidence limit. c = number of observed defects. N = number of devices tested. AV = voltage acceleration factor. AT = temperature acceleration factor. t = test duration of up to 68 hour for early life calculations or total test duration minus early life period for long term life calculations