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1 Curtiss-Wright & HPEC 15 Fabric40 & HPC Software Demonstration Demo Abstract The information in this document is subject to change without notice and should not be construed as a commitment by Curtiss-Wright Inc. While reasonable precautions have been taken, Curtiss-Wright Inc. assumes no responsibility for any errors that may appear in this document. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Curtiss-Wright Inc. The proprietary information contained in this document must not be disclosed to others for any purpose, nor used for manufacturing purposes, without written permission of Curtiss-Wright Inc. The acceptance of this document will be construed as an acceptance of the foregoing condition by Curtiss-Wright Defense Solutions All rights reserved. Page 1 of 5
2 Revision Notice Version Employee Date Description of Change 1.0 CJA July 27, 2015 Initial Release Page 2 of 5
3 Table of Contents 1. Introduction Block Diagrams & the Demo Conclusions... 5 Figures Figure 1 High Level Block Diagram... 5 Page 3 of 5
4 1. Introduction This document provides a high-level overview for Curtiss-Wright s plans for the Fabric40 Demonstration at HPEC 15. The purpose of this demo is to show how HPC technologies can be effectively leveraged to support Aerospace & Defense HPEC applications, both from a hardware and software point of view. Curtiss-Wright is planning to use HPEC 15 as the launch event to introduce what we believe will be a very important new product announcement for the Aerospace & Defense HPEC market. The vision of this new product offering supported by our broad range of rugged 40 Gigabit Ethernet (GbE)-based modules, is to bring supercomputing tools and software libraries from the commercial HPC market into the Aerospace & Defense embedded space for the first time. Today, HPC software is increasingly coming under many of the same deterministic low-latency and SWaP pressures as those typically found in the embedded COTS market. To support more demanding HPC applications, a new set of best-of-class software, such as profilers that support cluster computers, has emerged that are optimized for throughput, latency, and smaller memory footprints. In addition to profilers, the HPC market has also developed open architecture APIs, debuggers, communication libraries, and vector math libraries. For Aerospace & Defense HPEC system developers, this trend is making it possible to identify and cherry pick the leading HPC software products for use in COTS systems, rather than having to develop new software for our much smaller market. Applying these HPC tools to embedded development will ease and improve the design and verification of multi-node systems while greatly improving their timeto-deployment. The result: HPEC meets HPC! Curtiss-Wright plans to publicly announce our new product offering on the morning of September 15 th at HPEC 15. This product launch will include several press-releases from our strategic HPC partners, as well as trade journal interviews. Demo night and HPEC 15 provide ideal opportunities to introduce this product to our customers and the HPEC market in general. Prior to the official launch, Curtiss-Wright is able to share more details of this upcoming product under NDA. Page 4 of 5
5 2. Block Diagrams & the Demo Curtiss-Wright has developed a demonstration system based on current generation COTS embedded hardware products that features our new software level software. At this demonstration, a 6U OpenVPX system with five payload slots (as shown in Figure 1) will be used. Each processing card uses Mellanox ConnectX3 to provide the 40 GbE/FDR-10 ports. The Dataplane/Control plane switch is based on the SwitchX2, also from Mellanox. The demo will not only show the throughput and latency available with our Fabric40 TM hardware, it will also demonstrate the Curtiss-Wright s easy to use development suite. From an application point of view, the demo system will be running the Air Force Enterprise SAR & GMTI benchmark. This GMTI benchmark will be presented at HPEC 15 under the title Full-Chain Benchmarking for Open Architecture Airborne ISR Systems: A Case Study for GMTI Radar Applications OpenVPX DataPlane & Control Plane Switch Dual Intel Core i7 4 th Gen Processor Card Dual Intel Core i7 4 th Gen Processor Card Dual NVidia Maxwell GPU GTX-970M Intel Core i7 4 th Gen Processor Card Figure 1 High Level Block Diagram 3. Conclusions Curtiss-Wright is excited to be a part of HPEC 15 and is looking forward to this year s conference. Participating in demo night will provide the best possible platform for introducing our plan to help bring open standards based HPC software tools to the HPEC community. By leveraging proven, robust development tools from the supercomputing world, the Aerospace & Defense market will gain access to best-in-class open architecture APIs and tools. These tools are well proven in real-world, high availability, low latency (and extremely scalable) applications. The days of system integrators having to debug proprietary middleware are numbered. Page 5 of 5
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