COVENTOR PREDICTING ACTUAL FROM VIRTUAL

Transcription

1 COVENTOR PREDICTING ACTUAL FROM VIRTUAL Virtual Fabrication Changing the Trajectory of Chip Manufacturing Sandy Wen Semiconductor Process & Integration July 12, 2017

2 AT A GLANCE MARKET LEADER in 3D modeling and simulation software for semiconductor and MEMS industries Worldwide Presence Employees Technology Founded in Offices 5 Countries U.S. HQ 50%+ PhDs Key Patents and IP in MEMS multiphysics simulation Process modeling Software platform for MEMS design and integration MEMS DESIGN AUTOMATION CUSTOMERS: 50% OF THE Top 30 MEMS companies Top 10 MEMS foundries Top 10 R&D centers SEMICONDUCTOR VIRTUAL FABRICATION Software platform for advanced process development CUSTOMERS: Top 5 IDMs/Foundries Top 5 Memory suppliers Top 5 Equipment vendors Leading R&D centers

3 Coventor in NY State Multiple employees work and reside in NY State Supporting the nanotech industry in the Hudson Valley: Semiconductor processing MEMS design and analysis Local engineering support Member

4 Overview Problem Statement: Process Complexity is Increasing Solution: Virtual Fabrication Enabling Collaboration Use Cases Summary

5 Process Complexity is Increasing Dramatic Increase in Structural Device Complexity Planar CMOS FinFET Gate-All-Around Nanowire While Process Development and Fab Costs Follow Suit New Process Cost: > $2B New Fab Cost: > $5B

6 R&D Wafer Budget is Exploding. Exponential Increase in Development Wafer Runs Yet Time-To-Market is Being Pulled In!

7 Old Paradigm: Cycles of Learning with Build and Test Wafer Experiments Test Chip Design Repeat Every ~1 Year Repeat Every ~1-3 Months Analysis Decision-Making

8 Old Paradigm Applied to Advanced Process Development Wafer Experiments More Wafers To Evaluate Process Options Test Chip Design More Test Structures to monitor more processes MUST ELIMINATE CYCLES OF LEARNING TO ACCELERATE DEVELOPMENT More Tests and Measurements Analysis More complex problems to solve Decision-Making

9 Old Process Development Paradigm: Sequential Unit Processes Single Exposure Num of Steps Litho 1 Etch 1 Deposition 1 Single Single Exposure Exposure Patterning Flow

10 New Process Development Paradigm: Parallel Process Integration SAQP Num of Steps Litho 1 Etch 9 Deposition 12 Multi-Patterning Flow for sub-20nm Manufacturing Self Aligned Quadruple Patterning (SAQP)

11 Solution: Virtual Fabrication Virtual Fabrication is a powerful virtualization technology based on advanced 3D process modeling & simulation: Process visualization Integrated process effects at each unit process step Process variation impact on device yield Benefits: Significantly reduced wafer costs Elimination of multiple cycles of learning High speed process-predictive simulation Broad set of applications: Research Path finding Yield ramp up

12 Virtual Fabrication Enables Higher Degree of Collaboration Virtual Fabrication Vendors Equipment Companies Virtual Fabrication Solutions Process Reqs, Use Cases Fabless Design Houses IDMs and Foundries

13 Use Case: Process Variation Reduction SEMICON West 2014 & IEDM 2015 Virtual Fabrication is used to prioritize and synchronize inline specifications for variation reduction

14 Use Case: Cross Wafer Uniformity Improvement Directional Coupler Coupler gap and waveguide dimensions critical for coupling efficiency Unit Process Variations Integrated Process Effects Wafer Data from Upstream Processes Downstream Result Wide Gap Narrow Gap HM Etch Lateral Ratio HM:Si Etch Selectivity Silicon Etch Lateral Ratio DC Gap

15 Use Case: Litho Process Variability Prediction 3D resist contours for M1 Dose: -10% Defocus: -50nm Dose: +10% Defocus: +50nm Net counts identifies short and open failures Full M1 process integration Space checks highlights proximity failures Materials checks locate high resistance regions Virtual Fabrication Enables Accurate Prediction of Integrated Structural Failures

16 Summary Process complexity and process development costs are growing exponentially for sub-20nm chip manufacturing Old paradigms of build & test and silo-based unit process development are simply too expensive and time consuming! Virtual Fabrication is an innovative and powerful integrated process modeling technology that can enable significantly lower wafer costs and reduced cycles of learning Virtual Fabrication enables broad array of use cases in Process R&D and Chip Manufacturing Virtual Fabrication has been widely adopted by the world s leading foundries, memory makers, logic manufacturers, equipment companies, and research institutions

17 COVENTOR PREDICTING ACTUAL FROM VIRTUAL Thank You! 17