Roll-to-roll Vacuum Processing of Organic Thin Film Transistors

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1 Roll-to-roll Vacuum Processing of Organic Thin Film Transistors Hazel Assender Department of Materials University of Oxford DALMATIAN TECHNOLOGY 1

industry. - Flexible, polymer substrate (web) - High

2 Aim of the Research To demonstrate the ability to fabricate all-evaporated transistors in a R2R vacuum web process environment exploiting the technology that is used in the packaging industry. - Flexible, polymer substrate (web) - High speed (e.g. 1m/s web speed) - R2R process - Low cost materials Possible application: anticounterfeiting/product tracking tags for packaging. 2

3 Issues to consider 1) Process parameters in R2R environment building and testing transistors. 2) Circuit design tailored for the properties achievable with this manufacturing route 3) Materials (organic semiconductor and polymer gate insulator layer) developed for this manufacturing route 4) Patterning processes 5) Robustness of final devices Source and Drain (Metal) e.g. 90nm pentacene L Org. Semiconductor Gate Substrate W Insulator e.g. 0.5µm acrylic e.g. 125µm thick PEN 3

4 Roll-to-roll devices Gate insulator layer: Flash evaporated monomers then cure Perhaps surface modification layer: Various options Molecular semiconductor: Evaporation Source and Drain (Metal) Gate: pattern metallization Possible interlayer L W Org. Semiconductor Gate Insulator (e.g. acrylic dielectric) Source and Drain: pattern metallization Polymer smoothing layer: Flash evaporated monomers then cure Substrate (e.g. PET) Build complete device structure on the substrate Possible surface modification Encapsulation layer/gas barrier 4

5 Materials: pattern metallization Anilox Roller and Oil Boiler Winding zone Evaporation zone mbar Unwind Cliché Plate PRINTING RESOLUTION MD: micron TD: micron Process Drum Rewind Magnification x 60 Magnification x 200 { Source/Drain Electrodes------} 5

6 Depositing the gate-insulator In-line process High speed Smooth Acrylic layer Heat Tank 250 C Vacuum i. Evaporate monomer (liquid) ii. Monomer condenses onto substrate (web) as a liquid (flat) iii. Polymerize (cure) in-situ to a solid 6

7 Patterning the organic layers Insulator: Development of solventless printing (e.g. flexoprint and inkjet) of liquid monomer prior to e-beam or UV cure Semiconductor: High speed organic vapour jet printing. We have demonstrated working devices made with OVJP. Doctor blade Printing plate Cure Carrier gas in Nozzle Anilox roller Substrate Ink bath Gas out Gas heating furnace Semiconductor furnace 7

8 Gate insulator deposition V D (V) V D (V) I D (na) First devices V G -10V -20V -24V -30V -40V -44V Increase e-beam cure current I D (na) E-beam cured V G 0V -10V -20V -30V -40V 0 0 Anneal (150ºC 1hr) I D (µa) -1-10V -2-20V -30V -40V -3-50V V D (V) Plasma cured, single pass Make R2R process I D (µa) I on /I off = 1.3x10 3 V th = 15V µ = 0.1cm 2 /Vs -10V -20V -30V -40V V D (V) E-beam cured + annealed 8

9 Modification of the insulator surface Spin coat a thin (20-40nm) polymer layer: Ester:carbon ratio 1µm Mobility (cm 2 /Vs) PNP PS PVS PBM TPGDA PMMA Polar part surface energy (mn/m) 9

10 Materials developments DNTT, dinaphtho[2,3-b:2,3 -f]thieno[3,2-b]thiophene, has better environmental stability due to a reduced tendency to oxidize. Synthetic route for DNTT: DNTT synthesised and processed via A, literature route and B, an evolved method. 10

11 DNTT devices TPGDA / DNTT TPGDA / Pentacene TPGDA / PS / DNTT TPGDA / PS / Pentacene V T (V) µ (cm 2 V -1 s -1 ) I on /I off S (V/decade) ± ± Yields, tested over batches of 96 transistors Made with solution-cast PS dielectric: 66% Made with evaporated TPGDA/PS dielectric: 100% V g (V) E I d (A) 1E-6 1E I d 0.5 (A 0.5 ) DNTT µ=1 cm 2 /Vs Pentaceneµ=0.6 cm 2 /Vs 1E-10 1E

12 Modelling DNTT devices I D (ma) Log 10 (I D /A) V D (V) Vg=-0.5V -2.5V -4.0V -30.0V V G (V) Vg=0V -5V -10V -15V -20V -25V -30V Parameter Solutiondeposited PS insulator Evaporated acrylic insulator Evaporated acrylic insulator with PS buffer Ambient Air Air Vacuum W(µm) L(µm) C i (nf/cm 2 ) V T (V) V 0 (V) V ACC µ ACC (cm 2 /Vs) γ x10-7 λ M SAT A SAT I 0 (fa) σ 0 (S) 7x x x10-13 R S (kω) R D (kω)

13 -V Invertor Enhancement Load V OUT V IN Driver OTFT Experimental Response Transfer Plot 13

14 Logic Circuits NAND NOR Truth Table NAND V IN 1 V IN 2 V OUT Truth Table NOR V IN 1 V IN 2 V OUT

15 Ring Oscillator V DD (V) Frequency (khz) Sim Expt Amplitude(V) Sim Expt

16 I d (A) 1E-4 1E-6 1E-8 1E-10 Environmental testing Vac Dry air DNTT with acrylate/ps insulator Vacuum vs. dry air Small V T shift Apparently stable performance over weeks if stored in dry conditions V g (V) Dry vs. damp air Increase in I off Mobility and V T unaffected Effect of water recoverable e.g. by exposing sample to vacuum. I d (A) 1E-4 1E-6 1E-8 1E-10 Dry air RH 50% V g (V) Lamination and in-line encapsulation (e.g. TPGDA followed by SiO x ) tried good working devices. 16

17 Mechanical testing Polymer dielectric 17th Oct 2013 AlOx dielectric 17

18 Progress so far.. 1) Process parameters in R2R environment building and testing transistors Plastic flexible substrates (125 µm thick PEN substrate) Al gate electrode Improved in-line curing method (10 m/min webspeed) Interface buffer layer (evaporated PS thin layer) Low hysteresis in devices and good stability Very high yield 18

19 Progress so far 2) Circuit design tailored for the properties achievable with this manufacturing route Transistor characteristics modelled 3) Materials (semiconductor and gate insulator layer) developed for this manufacturing route New SC synthesised, more under development Tried new insulator materials 4) Robustness of final devices Strain to failure much greater than devices with ceramic insulators Device mobility stable on bending Devices can survive lamination 5) Patterning processes Favoured options for SC and insulator layers under development 19

20 Acknowledgements Bangor Prof Martin Taylor Mr Aled Williams Mr Eifion Patchett Oxford Dr Gamal Abbas Mr Ziqian Ding Dr Kanad Mallik Leeds Prof Long Lin Dr Weidong He Manchester Prof Steve Yeates Dr John Morrison 20

EXCIMER LASER ANNEALING FOR LOW- TEMPERATURE POLYSILICON THIN FILM TRANSISTOR FABRICATION ON PLASTIC SUBSTRATES

EXCIMER LASER ANNEALING FOR LOW- TEMPERATURE POLYSILICON THIN FILM TRANSISTOR FABRICATION ON PLASTIC SUBSTRATES G. Fortunato, A. Pecora, L. Maiolo, M. Cuscunà, D. Simeone, A. Minotti, and L. Mariucci CNR-IMM,