Assembly of planar array components using anisotropic conducting adhesives: a benchmark study. Part I - experiment

Size: px
Start display at page:

Download "Assembly of planar array components using anisotropic conducting adhesives: a benchmark study. Part I - experiment"

Transcription

1 Loughborough University Institutional Repository Assembly of planar array components using anisotropic conducting adhesives: a benchmark study. Part I - experiment This item was submitted to Loughborough University's Institutional Repository by the/an author. Citation: OGUNJIMI, A. O....et al, Assembly of planar array components using anisotropic conducting adhesives: a benchmark study. Part I - experiment. IEEE transactions on components, packaging and manufacturing technology - Part C, 19 (4), pp Additional Information: This is a journal article. It was published in the journal IEEE transactions on components, packaging and manufacturing technology - Part C [ c IEEE], and is available from: Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. Metadata Record: Publisher: c Institute of Electrical and Electronics Engineers (IEEE) Please cite the published version.

2 This item was submitted to Loughborough s Institutional Repository ( by the author and is made available under the following Creative Commons Licence conditions. For the full text of this licence, please go to:

3 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING, AND MANUFACTURING TECHNOLOGY PART C, VOL. 19, NO. 4, OCTOBER Assembly of Planar Array Components Using Anisotropic Conducting Adhesives A Benchmark Study: Part I Experiment Adebayo Oluyinka Ogunjimi, Samjid H. Mannan, David C. Whalley, and David J. Williams Abstract This paper presents new results from an experimental and theoretical program to evaluate relevant process parameters in the assembly of a 500 m pitch area array component using anisotropic conductive adhesive (ACA) materials. This experimental configuration has features of micro ball grid array (BGA), chip scale packaging (CSP), and also flip-chip and conventional ball grid array (BGA) package structures. A range of materials combinations have been evaluated, including (random filled) adhesive materials based on both thermoplastic and thermosetting resin systems, combined with both organic and thick-film on ceramic substrate materials. The ACA s used have all been applied as films, and hence are also known as anisotropic conducting films (ACF). The test assemblies have been constructed using a specially developed instrumented assembly system which allows the measurement of the process temperatures and pressures and the consequent bondline thickness reduction and conductivity development. The effects of the process parameters on the resulting properties, particularly conductivity and yield, are reported. A complementary paper [1] indicates the results of computational fluid dynamics (CFD) models of the early stages of the assembly process which allow the extrapolation of the present results to finer pitch geometries. Index Terms Anisotropic conducting adhesive, flip-chip, micro-electronics assembly. I. INTRODUCTION THE APPLICATION of anisotropic conductive adhesives (ACA s) to electronic interconnection has a number of potential advantages [2], but the impact of the assembly process on the properties of these materials is not fully understood, despite an extensive amount of work done in the area [3] [7]. The last reference [7] in particular examines many different approaches to the subject. The work presented in this paper is part of an ongoing program focused on understanding the behavior of these materials during the assembly/manufacturing process and how this contributes to their resulting properties and long term Manuscript received May 1996; revised November This work was supported by the Engineering and Physical Sciences Research Council (EP- SRC) Contract GR/J68410 and a consortium of industrial partners which include Cooksons Technology Centre and their associated company Alpha Metals Advanced Products, Eltek Semiconductors Ltd., Lucas Electronics, Rolls-Royce Plc, Design 2 Distribution Ltd., IBM (U.K.) Ltd., and Mitel Telecom. This paper was presented at the 2nd International Conference Adhesives in Electronics, Stockholm, Sweden, June 3 5, The authors are with the Department of Manufacturing Engineering, Loughborough University, Leics, LE11 3TU UK. Publisher Item Identifier S (96)01529-X. performance. This present work addresses the choice of manufacturing process parameters, subsequent work will address the interrelationships between processing conditions and reliability. The key issues in the use of anisotropic conductive adhesives are the achievement of acceptable interconnection conductance with satisfactory yield and the retention of this conductivity during the product life. Most anisotropic adhesives achieve conduction through the formation of a pressure contact between the conductive filler particles and the substrate/component metalizations. The overall electrical performance of an anisotropic adhesive joint is therefore dependent not only on the resistivity of the joining materials but also on the final conductor particle distribution and the contact pressures locked in to the material by processing. The properties of these materials therefore evolve with the process and there is a clear need to understand the effects of the chosen processing parameters on this process and the resulting quality of the interconnections formed. II. DESIGN OF THE EXPERIMENTAL TRIALS The trials reported here were designed to provide a benchmark comparison of a range of existing commercially available materials combined with substrate geometries readily achievable with current technology, and to establish the relative sensitivity of these materials combinations to the processing conditions. A. Materials Selection and Test Vehicle Design The trials were designed around a 10 mm square device with 500 m pitch area array connections. The bump metallization was thick film printed AgPd. This experimental configuration is equivalent to that of style CSP, but is also broadly representative of BGA and flip-chip devices. The test vehicles were designed to enable a specially instrumented assembly system to monitor 16 joints (of the total of 400 connections) throughout the assembly process. Two different substrate technologies were employed AgPd thick film on alumina and conventional PCB using 1 oz Cu clad FR5 laminate (with a sub-micron coating of Au on top of the Cu). The decision to use FR5 laminate was prompted by the reportedly poor performance of the more generally used FR4 laminates in ACA bonded assemblies [8]. FR5 is much stiffer at the high process temperatures being used and has a more uniform distribution /96$ IEEE

4 258 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING, AND MANUFACTURING TECHNOLOGY PART C, VOL. 19, NO. 4, OCTOBER 1996 TABLE I ADHESIVE CHARACTERISTICS TABLE II INTERPRETATION OF LEVELS Fig. 1. Instrumented test rig setup. of resin and reinforcement. It was therefore expected to suffer less from the problems associated with FR4. Three different adhesive films supplied by two vendors were investigated. The adhesives were selected to reflect the state of the art in thermoset and thermoplastic based adhesives and to cover a range of conducting particle sizes and compositions. Table I summarizes the characteristics of the adhesives used in the trials. B. The Instrumented Test Rig The test assemblies were constructed using a specially developed instrumented assembly system which allows measurement of the process temperatures and pressures and the consequent bondline thickness reduction and conductivity development. This test rig is shown schematically in Fig. 1. The device was aligned, placed and tacked down on the substrate separately on a manual flip-chip bonder with split beam optics to obtain alignment, and then brought over to the instrumented test rig for application of pressure and curing. The planarity was checked using pressure sensitive paper (Fuji prescale film). C. Factor Selection and Experimental Design Since the level of interaction between the relevant processing parameters was not known full factorial experiments were designed. The key parameters thought to affect the quality of the interconnection were pressure, rate of application of pressure, temperature and substrate type which gave four factors which were each tested at two levels. Table II shows the factors and levels considered in the experimental design. This resulted in a total of 16 experiments which were repeated three times for each of the adhesives. The difference in material properties (especially thermal properties) of the test vehicle substrates had to be taken into consideration in designing and performing experiments. The parameters used in the experiment were designed around the recommended parameters as shown in Table I. The quantifiable dependent variables in the experiments were the joint contact resistances, of which 16 spatially distributed joints were monitored on each substrate, and the yield as defined in Section III. III. RESULTS There are three important parameters that have been derived from the raw experimental results: the average conductance of the monitored connections; the proportion of pads that actually conducted i.e. the yield (any contact resistances below 1 have been taken to be conducting in the analyzes presented); and the coefficient of variance of conductance (which is the ratio of the standard deviation to the mean of the conductances). The coefficient of variance gives an indication of the uniformity of the conductances achieved. Analysis of variance (ANOVA) was also conducted in order to understand the

5 OGUNJIMI et al.: ASSEMBLY OF PLANAR ARRAY COMPONENTS 259 TABLE III RESULTS (a) (b) (c) Fig. 2. (d) (e) (f) Effect of different factors on process yield. statistical level of significance of the effect of the different parameters (factors) and the first order interactions between the different process parameters (Table III). The results for each type of substrate were analyzed individually as the initial analysis showed this to be the most significant factor in all of the experiments and to interact strongly with the other factors. A. Process Yields Fig. 2(a) (f) shows the effect on the average (for three sets of trials) process yield for the different factors. Here the yield is defined as the percentage of good contacts. It may be clearly seen that the yield obtained for the six possible materials combinations have significant differences in their sensitivity to the process parameters. While these figures show the average over three different set of trials, they are interpreted in conjunction with the results of the more accurate estimate of the significance of the factors as investigated using ANOVA. 1) Ceramic Substrate: Temperature and rate of application of pressure are shown to have equal effect on the process yield for adhesive A1 [Fig. 2(a)], the thermoplastic adhesive with a polymer cored conducting particle. Pressure has a smaller effect on yield. Fig. 2(a) also shows that high temperature

6 260 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING, AND MANUFACTURING TECHNOLOGY PART C, VOL. 19, NO. 4, OCTOBER 1996 Fig. 3. Device process yield. (a) (b) (c) and rate of application of pressure combined with low pressure are the best combination of parameters for high yield. However, ANOVA reveals that for this material, temperature is the only factor that is statistically significant above 90% confidence level. As depicted in Fig. 2(b) and (c), adhesives A2 (thermosetting matrix with a polymer cored particle) and A3 (thermosetting matrix with a Ni particle) behaved similarly, as is perhaps expected since they are understood to have similar resin matrix materials properties (similar curing reactions based on an epoxy chemistry). None of the factors showed a statistical significance above 90% confidence level, but temperature seems to have the smallest effect on yield. The rate of application of pressure has the greatest effect on yield for material A3 but this result is only significant at 87% confidence level. However, for both A2 and A3 thermosetting materials low level factors (closer to the originally recommended factors) gave the highest yields. 2) Organic Substrate: Fig. 2(d) (f) (A1 A3) shows for the organic substrates the effect of the process factors on yield. The observed behavior with the organic substrate is significantly different to that with the ceramic substrates. In this case, temperature has the largest effect for A1 at a significance of above the 90% confidence level. The interaction between pressure and temperature has the next largest effect, also at above the 90% confidence level. The combination of high pressure and low temperature and rate of change of pressure gave best yield. For A2, pressure has the greatest effect and is significant at the 95% confidence level. The interaction of pressure and temperature have the next greatest effect, but this is not a significant result at 90% confidence levels. For A3, the thermosetting material with solid conducting particles, temperature has the greatest effect and is significant at the 95% confidence level. The effect of interaction of temperature and pressure are the next significant but not at 90% confidence level. Rate of application of pressure has the least effect for this material, Therefore, a low temperature and pressure together with a high rate of application of pressure lead to a high process yield for adhesive A2 and all low process factors, i.e. closest to those recommended by the manufacturer, give a high yield for A3. Since the manufacturer s data sheets specify only temperature and pressure, the recommendations for settings based on these results agree with the data sheet. A more practical definition of yield is that if any of the connections on a board have contact resistances greater than 1 then the whole board is classed as a failure. Since there are only three replications for each combination of factors, the data is rather sparse and the yield can only be 0%, 33%, 66%, or 100%. Some useful conclusions can however be obtained from an analysis of these component yields. The plots in Fig. 3(a) (c) (A1 A3) compare the yields obtained with the FR5 substrate with those obtained with ceramic substrates from which it can be seen that for all three adhesive materials far better yields are obtainable with the organic substrates and that whilst reasonable component yields are obtainable with both A1 and A2, the material containing very small particles, A3, gives generally poor results. B. Conductance Fig. 4(a) (f) shows the effect of the different factors on the average conductance at the end of the manufacturing process. The distribution of resistances is discussed in Section IV. 1) Ceramic Substrate: On a ceramic substrate, the level of conductance can be seen to be higher with the thermoplastic adhesive with polymer cored particles, A1. ANOVA reveals that the first order interaction of pressure and rate of change of application of pressure was found to have the greatest effect followed by temperature which has a marginally greater effect than the two other main factors. All other factors and their interactions however had a statistical level of significance lower than 90%. Adhesive A1 [Fig. 4(a)] performs better at the high level of the tested factors, perhaps reflecting the importance of improved matrix flow and increased particle deformation under these conditions. For A3 [Fig. 4(c)], the thermosetting material with small solid particles, the rate of application of pressure was found to have the most significant effect at more than a 95%

7 OGUNJIMI et al.: ASSEMBLY OF PLANAR ARRAY COMPONENTS 261 (a) (b) (c) Fig. 4. (d) (e) (f) Effect of different factors on conductance. confidence level. Higher order interactions of the factors were found to be less significant for either of the thermosetting materials A2 or A3 and all main factors had statistical levels of significance considerably lower than 90%. Both materials however followed the same trend with low level combination of parameters yielding higher conductance. 2) Organic Substrate: [Fig. 4(d) (f)] The interaction between pressure and temperature has the greatest effect on conductance of the thermoplastic material A1, with polymer cored conducting particles. This is followed closely by pressure [Fig. 4(d)]. Pressure and rate of change of pressure are significant for A2 followed by pressure and temperature interaction. Pressure however, is the most significant factor. Low temperature and pressure combined with high rate of application of pressure generally give high conductance for both A2 and A3. 3) Uniformity of resistance across the board: The uniformity of conduction across the board was investigated by computing the coefficient of variance of the conductances (i.e. the ratio of standard deviation to the mean). It can be seen from the data in Table III that the coefficient of variance is generally lower for the organic substrates. ANOVA however reveals that the rate of application of pressure and its first order interaction with temperature are the most significant at greater than 90% confidence level for the thermosetting material A2 on alumina substrate. Pressure was also found to be the most significant parameter (factor) at greater than 95% confidence level for the same material on FR5. None of the other combination of factors investigated shows significance at statistical confidence level greater than 90%. IV. DISCUSSION OF EXPERIMENTAL RESULTS The good performance of the organic substrate in these experiments may be attributable to the topography of the pads and the mating bump on the component. The component was made out of alumina printed with thick film Ag Pd Fig. 5. (a) Cross sections of the substrate pads. bumps. The topography of the two substrates is as is indicated in Fig. 5. It is considered that the flat top of the pads on the organic substrate makes it easy to retain a sufficient number of conductive particles for electrical conduction. It was also observed that the Au coated chemically etched Cu PCB pads on organic substrate are more consistent in shape than those on the thick film AgPd printed on ceramic substrates. This is perhaps responsible for the more uniform distribution of resistance observed with the organic substrates. It also shows that the organic substrate has a wider tolerance for misalignment than ceramic substrates. It should be observed that although CFD modeling indicates that the inclined walls of the ceramic bump will encourage flow of particles back onto the pad [1] during the process the difference in the effective areas of the ceramic and organic bumps is thought to have a more significant effect on the likelihood of achieving satisfactory conductance. The coefficient of thermal expansion (CTE) of the substrate with the device is worse for the organic substrate and hence is not the reason for its better results. The experiments show that the preferred processing parameters for the thermosetting matrix adhesives A2 and A3 are those originally specified by the manufacturers. This suggests that the process has probably been optimized for these products, and that these optimized conditions must be achieved to give good process yields. The thermoplastic adhesive A1 is more tolerant to variations in process conditions and has a wide process window which allows for flexibility in the process set up. (b)

8 262 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING, AND MANUFACTURING TECHNOLOGY PART C, VOL. 19, NO. 4, OCTOBER 1996 TABLE IV OPTIMUM PROCESS PARAMETERS FOR THE DIFFERENT MATERIALS COMBINATIONS Fig. 6. Scaled bump and joint resistances for A1 (peak at 20 m is probably a measurement error). Fig. 7. Scaled bump and joint resistances for A2. Further factors that may influence the performance of the adhesives is the conducting particle size and composition. Fig. 3 shows that the larger, polymer cored particles are more forgiving for the joint configurations investigated here since the smallest particle size adhesive, A3, performed worst overall. This conclusion is further supported by the fact that the largest particle size adhesive, A1 performed better than A2 on the ceramic substrate, where the gaps between substrate and device were most variable. The optimum process conditions for the different materials combinations which have been determined from the experimental results are given in Table IV. Finally Figs. 6 8 show the distribution of resistances found for each adhesive in these experiments. In each graph, the distribution of internal device resistances (bump resistance), measured using a standard wafer probe tester, are also plotted Fig. 8. Scaled bump and joint resistances for A3. (the total measured resistance equals the actual joint resistance this internal resistance). Only 38 internal resistance measurements were taken, but on the graphs the frequencies have been scaled up so that the total number of measurements for each of the three lines are the same. The final point on each line at 1 represents the number of opens. The results from all the trials with different parameter settings have been lumped together. If the actual joint resistances were zero, then all the lines on each graph would coincide but the graphs all show long tails in the joint resistance distributions extending well above 1 indicating that many actual joint resistances exceed this value. The reason for these high resistance joints is either that the particles have been crushed and the outer conducting skin ruptured, or that a thin film of insulating material separates the conducting particles from the electrode surfaces. This phenomena is currently under investigation. V. CONCLUSION It can be concluded that uniform conductivity and high yield are more readily obtained with the organic PCB than the thick-film ceramic substrates. However, improvements to the thick film pad geometries may improve the thick film substrate performance. It has also been shown that the optimum process conditions and adhesive material choice can be very different for ceramic and organic substrates. Significant differences in assembly performance between the adhesive materials also emerged whilst finer particle sizes have been shown to have statistical yield advantages in fine pitch applications, the larger

9 OGUNJIMI et al.: ASSEMBLY OF PLANAR ARRAY COMPONENTS 263 particle size materials with soft cores have proved superior in these trials. It can also be seen that the thermoplastic material has a greater process latitude in addition to its rework potential. Reliability testing will now be used to determine whether these advantages carry through to long term product performance. REFERENCES [1] S. H. Mannan, D. C. Whalley, A. O. Ogunjimi, and D. J. Williams, Assembly of planar array components using anisotropic conducting adhesives A benchmark study: Part II Theory, this issue, pp. XXX XXX. [2] A. O. Ogunjimi, O. A. Boyle, D. C. Whalley, and D. J. Williams A review of the impact of conductive adhesive technology on interconnection, J. Electron. Manufact., vol. 2, pp , Sept [3] I. Watanabe, K. Takemura, N. Shiozawa, O. Watanabe, K. Kojima, and T. Ohta, Flip-chip interconnection to various substrates using anisotropic conducting adhesive films, in Proc. Latest Achievements Conducting Adhesive Joining Electron. Packag., Sept. 1995, Eindhoven, The Netherlands, pp [4] L. Li and J. E. Morris, Structure and selection models for anisotropic conductive adhesive films, in Proc. 1st Int. Conf. Adhesive Joining Technol. Electron. Manufact., Berlin, Germany, Nov [5] D. J. Williams and D. C. Whalley, The effects of conducting particle distribution on the behavior of anisotropic conducting adhesives: nonuniform conductivity and shorting between connections, J. Electron. Manufact., vol. 3, pp , [6] K. Gustafsson, J. Liu, and Z. Lai, Surface characteristics, reliability, and failure mechanisms of tin, copper, and gold metallizations, in Proc. Adhesives Electron. 96, Stockholm, Sweden, 1996, pp [7] J. H. Lau, Ed., Flip Chip Technologies. New York: McGraw-Hill, 1996, chs. 6 10, pp [8] H. M. van Noort, M. J. H. Kloos, and H. E. A. Schafer Anisotropic conductive adhesives for chip on glass and other flip chip applications, in Proc. 1st Int. Conf. Adhesive Joining Technol. Electron. Manufact., Berlin, Germany, Nov Adebayo Oluyinka Ogunjimi received the Ph.D. degree from Loughborough University, U.K. After graduating he has worked as a Postdoctoral Research Associate at both Loughborough and at CALCE EPRC, and is currently working for PERA International Ltd. He has been employed in electronic s manufacturing research and development since 1990 and has taken part in projects in surface mount technology including the use of conductive adhesives, both isotropic and anisotropic, as replacements for solder in electronics interconnection. He has undertaken research in the physics of failure approach to electronics reliability. His experience includes manufacturing process modeling and design evaluation using classical theory and finite element analysis. Samjid H. Mannan received the B.A. degree in physics from Oxford University, U.K., in 1988 and the Ph.D. degree in theoretical elementary particle physics from Southampton University, U.K., in After working as a Research Assistant at Salford University and Loughborough University in the area of electronics interconnection (solder paste and ACA s), he is currently working in the same area as a Research Fellow at Loughborough University. He is the author of over 20 scientific papers. David C. Whalley received the B.Sc. and MPhil. degrees from Loughborough University, U.K. Since then he has been involved in research into electronic interconnection reliability, the use of engineering analysis techniques both in electronic product design, in process simulation, and on new interconnection technologies such as conducting adhesives. He has worked as an Engineer both at Loughborough University and at Lucas Industries Advanced Engineering Centre, Solihull, Birmingham, before being appointed in 1990 as lecturer in Processes for Electronic Manufacture within Loughborough University s Department of Manufacturing Engineering. He is the author of over 60 papers and reports in the areas of electronics manufacturing processes, interconnection technology, and electronic thermal design. David J. Williams received the B.Sc. degree at UMIST, and the Ph.D. degree at Cambridge University, Manchester, U.K. He has been Professor of Manufacturing Processes, Loughborough University, since January He was Head of the Department of Manufacturing Engineering from 1991 to His present research focuses on the resolution of problems within electronics manufacturing. This research includes work at the process engineering science level, understanding of the interaction between process understanding and design for manufacture (encompassing take back), and business globalization. This follows a number of years of control oriented work in CIM. Before taking up his present post he was a Lecturer in Manufacturing Engineering and Design in the Engineering Department, Cambridge University, U.K., and worked for industry for Metal Box and GKN. He has published three books and more than 200 papers and contributions to books in the area of manufacturing. He is Editor-in-Chief of the IJCIM and JEM, and is an Active Consultant to the manufacturing industry and various governments.

High Reliable Non-Conductive Adhesives for Flip Chip CSP Applications

High Reliable Non-Conductive Adhesives for Flip Chip CSP Applications High Reliable Non-Conductive Adhesives for Flip Chip CSP Applications Myung-Jin Yim, Jin-Sang Hwang ACA/F Div., Telephus Co. 25-11, Jang-dong, Yusong-gu,, Taejon 35-71, Korea Tel.: +82-42-866-1461, Fax:

More information

The effect of temperature ramp rate on flip-chip joint quality and reliability using anisotropically conductive adhesive on FR-4 substrate

The effect of temperature ramp rate on flip-chip joint quality and reliability using anisotropically conductive adhesive on FR-4 substrate Loughborough University Institutional Repository The effect of temperature ramp rate on flip-chip joint quality and reliability using anisotropically conductive adhesive on FR-4 substrate This item was

More information

Anisotropic Conductive Films (ACFs)

Anisotropic Conductive Films (ACFs) Anisotropic Conductive Films (ACFs) ACF = Thermosetting epoxy resin film + Conductive particles Chip or substrate 1 Heat Pressure ACF Substrate 2 Chip or substrate 1 ACF Substrate 2 Applications Chip-on-Board

More information

Design for Plastic Ball Grid Array Solder Joint Reliability. S.-W. R. Lee, J. H. Lau*

Design for Plastic Ball Grid Array Solder Joint Reliability. S.-W. R. Lee, J. H. Lau* Page 1 of 9 Design for Plastic Ball Grid Array Solder Joint Reliability The Authors S.-W. R. Lee, J. H. Lau* S.-W. R. Lee, Department of Mechanical Engineering, The Hong Kong University of Science and

More information

Flip Chip Joining on FR-4 Substrate Using ACFs

Flip Chip Joining on FR-4 Substrate Using ACFs Flip Chip Joining on FR-4 Substrate Using ACFs Anne Seppälä, Seppo Pienimaa*, Eero Ristolainen Tampere University of Technology Electronics Laboratory P.O. Box 692 FIN-33101 Tampere Fax: +358 3 365 2620

More information

Thermomechanical Response of Anisotropically Conductive Film

Thermomechanical Response of Anisotropically Conductive Film Thermomechanical Response of Anisotropically Conductive Film Yung Neng Cheng, Shyong Lee and Fuang Yuan Huang Department of Mechanical Engineering National Central University, Chung-li, Taiwan shyong@cc.ncu.edu.tw

More information

Conductive Adhesive Applications to Imprint Circuitry

Conductive Adhesive Applications to Imprint Circuitry Conductive Adhesive Applications to Imprint Circuitry Liye Fang Department of Electrical Engineering, T. J. Watson School of Engineering and Applied Science, State University of New York at Binghamton,

More information

ENHANCING MECHANICAL SHOCK PERFORMANCE USING EDGEBOND TECHNOLOGY

ENHANCING MECHANICAL SHOCK PERFORMANCE USING EDGEBOND TECHNOLOGY ENHANCING MECHANICAL SHOCK PERFORMANCE USING EDGEBOND TECHNOLOGY Steven Perng, Tae-Kyu Lee, and Cherif Guirguis Cisco Systems, Inc. San Jose, CA, USA sperng@cisco.com Edward S. Ibe Zymet, Inc. East Hanover,

More information

Y.C. Chan *, D.Y. Luk

Y.C. Chan *, D.Y. Luk Microelectronics Reliability 42 (2002) 1195 1204 www.elsevier.com/locate/microrel Effects of bonding parameters on the reliability performance of anisotropic conductive adhesive interconnects for flip-chip-on-flex

More information

Effects of Solder Reflow on the Reliability of Flip-Chip on Flex Interconnections Using Anisotropic Conductive Adhesives

Effects of Solder Reflow on the Reliability of Flip-Chip on Flex Interconnections Using Anisotropic Conductive Adhesives 254 IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, VOL. 27, NO. 4, OCTOBER 2004 Effects of Solder Reflow on the Reliability of Flip-Chip on Flex Interconnections Using Anisotropic Conductive

More information

Solder joint reliability of cavity-down plastic ball grid array assemblies

Solder joint reliability of cavity-down plastic ball grid array assemblies cavity-down plastic ball grid array S.-W. Ricky Lee Department of Mechanical Engineering, The Hong Kong University of Science and, Kowloon, Hong Kong John H. Lau Express Packaging Systems, Inc., Palo Alto,

More information

TRANSIENT THERMAL ANALYSIS OF AN ANISOTROPIC CONDUCTIVE FILM PACKAGE ASSEMBLY PROCESS

TRANSIENT THERMAL ANALYSIS OF AN ANISOTROPIC CONDUCTIVE FILM PACKAGE ASSEMBLY PROCESS 9-th International Flotherm User Conference October 16-19, 2000 - Orlando, Florida TRANSIENT THERMAL ANALYSIS OF AN ANISOTROPIC CONDUCTIVE FILM PACKAGE ASSEMBLY PROCESS Victor Adrian Chiriac 1 and Tien-Yu

More information

Solder joint reliability of plastic ball grid array with solder bumped flip chip

Solder joint reliability of plastic ball grid array with solder bumped flip chip ball grid array with solder bumped Shi-Wei Ricky Lee Department of Mechanical Engineering, The Hong Kong University of Science and, Kowloon, Hong Kong John H. Lau Express Packaging Systems, Inc., Palo

More information

The Effect of Fillers in Nonconductive Adhesive on the Reliability of Chip-on-Glass Bonding with Sn/Cu Bumps

The Effect of Fillers in Nonconductive Adhesive on the Reliability of Chip-on-Glass Bonding with Sn/Cu Bumps Materials Transactions, Vol. 52, No. 11 (2011) pp. 2106 to 2110 #2011 The Japan Institute of Metals The Effect of Fillers in Nonconductive Adhesive on the Reliability of Chip-on-Glass Bonding with Sn/Cu

More information

Effect of Chip Dimension and Substrate Thickness on the Solder Joint Reliability of Plastic Ball Grid Array Packages* S.-W. Lee, J.H.

Effect of Chip Dimension and Substrate Thickness on the Solder Joint Reliability of Plastic Ball Grid Array Packages* S.-W. Lee, J.H. Page 1 of 9 Effect of Chip Dimension and Substrate Thickness on the Solder Joint Reliability of Plastic Ball Grid Array Packages* The Authors S.-W. Lee, J.H. Lau** S.-W. Lee, Center for Advanced Engineering

More information

Selection and Application of Board Level Underfill Materials

Selection and Application of Board Level Underfill Materials Selection and Application of Board Level Underfill Materials Developed by the Underfill Materials Design, Selection and Process Task Group (5-24f) of the Assembly and Joining Committee (5-20) of IPC Supersedes:

More information

ALTERNATIVES TO SOLDER IN INTERCONNECT, PACKAGING, AND ASSEMBLY

ALTERNATIVES TO SOLDER IN INTERCONNECT, PACKAGING, AND ASSEMBLY ALTERNATIVES TO SOLDER IN INTERCONNECT, PACKAGING, AND ASSEMBLY Herbert J. Neuhaus, Ph.D., and Charles E. Bauer, Ph.D. TechLead Corporation Portland, OR, USA herb.neuhaus@techleadcorp.com ABSTRACT Solder

More information

Simulations and Characterizations for Stress Reduction Designs in Wafer Level Chip Scale Packages

Simulations and Characterizations for Stress Reduction Designs in Wafer Level Chip Scale Packages Simulations and Characterizations for Stress Reduction Designs in Wafer Level Chip Scale Packages by Ming-Che Hsieh STATS ChipPAC Taiwan Co. Ltd. Copyright 2013. Reprinted from 2013 International Microsystems,

More information

Future Developments in Electrically Conductive Adhesives Technology

Future Developments in Electrically Conductive Adhesives Technology Future Developments in Electrically Conductive Adhesives Technology James E. Morris State University of New York at Binghamton Key words: Electrically conductive adhesives, ECA, ICA, ACA. Abstract The

More information

Study of anisotropic conductive adhesive joint behavior under 3-point bending

Study of anisotropic conductive adhesive joint behavior under 3-point bending Microelectronics Reliability 45 (2005) 589 596 www.elsevier.com/locate/microrel Study of anisotropic conductive adhesive joint behavior under 3-point bending M.J. Rizvi a,b, Y.C. Chan a, *, C. Bailey b,h.lu

More information

Adaption to scientific and technical progress under Directive 2002/95/EC

Adaption to scientific and technical progress under Directive 2002/95/EC . Adaption to scientific and technical progress under Directive 2002/95/EC Results previous evaluation Exemption No. 15 Lead in solders to complete a viable electrical connection between semiconductor

More information

New Technology for High-Density LSI Mounting in Consumer Products

New Technology for High-Density LSI Mounting in Consumer Products New Technology for High-Density Mounting in Consumer Products V Hidehiko Kira V Akira Takashima V Yukio Ozaki (Manuscript received May 29, 2006) The ongoing trend toward downsizing and the growing sophistication

More information

Adaption to scientific and technical progress under Directive 2002/95/EC

Adaption to scientific and technical progress under Directive 2002/95/EC . Adaption to scientific and technical progress under Directive 2002/95/EC Results previous evaluation Exemption No. 7 a a) Lead in high melting temperature type solders (i.e. lead-based alloys containing

More information

Chapter 4 Fabrication Process of Silicon Carrier and. Gold-Gold Thermocompression Bonding

Chapter 4 Fabrication Process of Silicon Carrier and. Gold-Gold Thermocompression Bonding Chapter 4 Fabrication Process of Silicon Carrier and Gold-Gold Thermocompression Bonding 4.1 Introduction As mentioned in chapter 2, the MEMs carrier is designed to integrate the micro-machined inductor

More information

Study of Self-Alignment of BGA Packages

Study of Self-Alignment of BGA Packages IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 23, NO. 4, NOVEMBER 2000 631 Study of Self-Alignment of BGA Packages K. C. Hung, Y. C. Chan, Senior Member, IEEE, P. L. Tu, H. C. Ong, D. P. Webb, and J. K.

More information

Development of a Fluxless Flip Chip Bonding Process for Optical Military Electronics

Development of a Fluxless Flip Chip Bonding Process for Optical Military Electronics Development of a Fluxless Flip Chip Bonding Process for Optical Military Electronics Michael Girardi, Daric Laughlin, Philip Abel, Steve Goldammer, John Smoot NNSA s Kansas City Plant managed by Honeywell

More information

Editorial Manager(tm) for Microsystem Technologies Manuscript Draft

Editorial Manager(tm) for Microsystem Technologies Manuscript Draft Editorial Manager(tm) for Microsystem Technologies Manuscript Draft Manuscript Number: Title: Electrical and Reliability Properties of Isotropic Conductive Adhesives on Immersion Silver Printed-Circuit

More information

Sherlock 4.0 and Printed Circuit Boards

Sherlock 4.0 and Printed Circuit Boards Sherlock 4.0 and Printed Circuit Boards DfR Solutions January 22, 2015 Presented by: Dr. Nathan Blattau Senior Vice President 9000 Virginia Manor Rd Ste 290, Beltsville MD 20705 301-474-0607 www.dfrsolutions.com

More information

Chips Face-up Panelization Approach For Fan-out Packaging

Chips Face-up Panelization Approach For Fan-out Packaging Chips Face-up Panelization Approach For Fan-out Packaging Oct. 15, 2015 B. Rogers, D. Sanchez, C. Bishop, C. Sandstrom, C. Scanlan, TOlson T. REV A Background on FOWLP Fan-Out Wafer Level Packaging o Chips

More information

Mechanical Behavior of Flip Chip Packages under Thermal Loading

Mechanical Behavior of Flip Chip Packages under Thermal Loading Mechanical Behavior of Flip Packages under Thermal Loading *Shoulung Chen 1,2, C.Z. Tsai 1,3, Nicholas Kao 1,4, Enboa Wu 1 1 Institute of Applied Mechanics, National Taiwan University 2 Electronics Research

More information

Electrical and reliability properties of isotropic conductive adhesives on immersion silver printed-circuit boards

Electrical and reliability properties of isotropic conductive adhesives on immersion silver printed-circuit boards DOI 10.1007/s00542-008-0678-0 TECHNICAL PAPER Electrical and reliability properties of isotropic conductive adhesives on immersion silver printed-circuit boards J. Lee Æ C. S. Cho Æ J. E. Morris Received:

More information

Wire Bonding Integrity Assessment for Combined Extreme Environments

Wire Bonding Integrity Assessment for Combined Extreme Environments Wire Bonding Integrity Assessment for Combined Extreme Environments Maria Mirgkizoudi¹, Changqing Liu¹, Paul Conway¹, Steve Riches² ¹Wolfson School of Mechanical and Manufacturing Engineering, Loughborough

More information

PEC (Printed Electronic Circuit) process for LED interconnection

PEC (Printed Electronic Circuit) process for LED interconnection PEC (Printed Electronic Circuit) process for LED interconnection Higher wattage LED s/ power components or their placement in higher densities, requires a larger dissipation of heat in a more effective

More information

ANISOTROPIC conductive film (ACF) is a film-type

ANISOTROPIC conductive film (ACF) is a film-type 1350 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 5, NO. 9, SEPTEMBER 2015 Effects of Bonding Pressures and Bonding Temperatures on Solder Joint Morphology and Reliability

More information

Research Article A Study on the Conductivity Variation of Au Coated Conductive Particles in ACF Packaging Process

Research Article A Study on the Conductivity Variation of Au Coated Conductive Particles in ACF Packaging Process Nanomaterials Volume 2015, Article ID 485276, 8 pages http://dx.doi.org/10.1155/2015/485276 Research Article A Study on the Conductivity Variation of Au Coated Conductive Particles in ACF Packaging Process

More information

Building HDI Structures using Thin Films and Low Temperature Sintering Paste

Building HDI Structures using Thin Films and Low Temperature Sintering Paste Building HDI Structures using Thin Films and Low Temperature Sintering Paste Catherine Shearer, James Haley and Chris Hunrath Ormet Circuits Inc. - Integral Technology California, USA chunrath@integral-hdi.com

More information

JOINT INDUSTRY STANDARD

JOINT INDUSTRY STANDARD JOINT INDUSTRY STANDARD AUGUST 1999 Semiconductor Design Standard for Flip Chip Applications ASSOCIATION CONNECTING ELECTRONICS INDUSTRIES Semiconductor Design Standard for Flip Chip Applications About

More information

Electrical and Fluidic Microbumps and Interconnects for 3D-IC and Silicon Interposer

Electrical and Fluidic Microbumps and Interconnects for 3D-IC and Silicon Interposer Electrical and Fluidic Microbumps and Interconnects for 3D-IC and Silicon Interposer Li Zheng, Student Member, IEEE, and Muhannad S. Bakir, Senior Member, IEEE Georgia Institute of Technology Atlanta,

More information

IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES, VOL. 32, NO. 2, JUNE /$ IEEE

IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES, VOL. 32, NO. 2, JUNE /$ IEEE IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES, VOL. 32, NO. 2, JUNE 2009 339 Effects of Heating Rate on Material Properties of Anisotropic Conductive Film (ACF) and Thermal Cycling Reliability

More information

Beam Leads. Spider bonding, a precursor of TAB with all-metal tape

Beam Leads. Spider bonding, a precursor of TAB with all-metal tape Beam Leads The vast majority of chips are intended for connection with thermosonic bonds: all other methods require some modification to the wafer. As early as 1972, Jordan described three gang-bonding

More information

Optimizing Immersion Silver Chemistries For Copper

Optimizing Immersion Silver Chemistries For Copper Optimizing Immersion Silver Chemistries For Copper Ms Dagmara Charyk, Mr. Tom Tyson, Mr. Eric Stafstrom, Dr. Ron Morrissey, Technic Inc Cranston RI Abstract: Immersion silver chemistry has been promoted

More information

ANISOTROPIC EFFECT WHEN USING ISOTROPIC CONDUCTIVE ADHESIVES

ANISOTROPIC EFFECT WHEN USING ISOTROPIC CONDUCTIVE ADHESIVES ANISOTROPIC EFFECT WHEN USING ISOTROPIC CONDUCTIVE ADHESIVES Jan Felba Marcin Bereski Andrzej Mościcki Wroclaw University of Technology, Poland AMEPOX Microelectronics, Ltd Łódź, Poland Electrically Conductive

More information

White Paper 0.3mm Pitch Chip Scale Packages: Changes and Challenges

White Paper 0.3mm Pitch Chip Scale Packages: Changes and Challenges White Paper 0.3mm Pitch Chip Scale Packages: Changes and Challenges 0.3mm Pitch Chip Scale Packages: Changes and Challenges Industry Trend The movement to 0.3mm pitch in chip scale packages (CSPs) can

More information

Microelectronics Reliability

Microelectronics Reliability Microelectronics Reliability 52 (2012) 217 224 Contents lists available at SciVerse ScienceDirect Microelectronics Reliability journal homepage: www.elsevier.com/locate/microrel Enhancement of electrical

More information

IMPACT OF MICROVIA-IN-PAD DESIGN ON VOID FORMATION

IMPACT OF MICROVIA-IN-PAD DESIGN ON VOID FORMATION IMPACT OF MICROVIA-IN-PAD DESIGN ON VOID FORMATION Frank Grano, Felix Bruno Huntsville, AL Dana Korf, Eamon O Keeffe San Jose, CA Cheryl Kelley Salem, NH Joint Paper by Sanmina-SCI Corporation EMS, GTS

More information

Fabrication of Smart Card using UV Curable Anisotropic Conductive Adhesive (ACA) Part II: Reliability Performance of the ACA Joints

Fabrication of Smart Card using UV Curable Anisotropic Conductive Adhesive (ACA) Part II: Reliability Performance of the ACA Joints Fabrication of Smart Card using UV Curable Anisotropic Conductive Adhesive (ACA) Part II: Reliability Performance of the ACA Joints C. W. Tan, Y M Siu, K. K. Lee, *Y. C. Chan & L. M. Cheng Department of

More information

PCB Technologies for LED Applications Application note

PCB Technologies for LED Applications Application note PCB Technologies for LED Applications Application note Abstract This application note provides a general survey of the various available Printed Circuit Board (PCB) technologies for use in LED applications.

More information

IMPLEMENTATION OF A FULLY MOLDED FAN-OUT PACKAGING TECHNOLOGY

IMPLEMENTATION OF A FULLY MOLDED FAN-OUT PACKAGING TECHNOLOGY IMPLEMENTATION OF A FULLY MOLDED FAN-OUT PACKAGING TECHNOLOGY B. Rogers, C. Scanlan, and T. Olson Deca Technologies, Inc. Tempe, AZ USA boyd.rogers@decatechnologies.com ABSTRACT Fan-Out Wafer-Level Packaging

More information

Effect of Process Variations on Solder Joint Reliability for Nickel-based Surface Finishes

Effect of Process Variations on Solder Joint Reliability for Nickel-based Surface Finishes Effect of Process Variations on Solder Joint Reliability for Nickel-based Surface Finishes Hugh Roberts Atotech USA Inc., Rock Hill, SC, USA Sven Lamprecht, Gustavo Ramos and Christian Sebald Atotech Deutschland

More information

Bonding Parameters of Anisotropic Conductive Adhesive Film and Peeling Strength

Bonding Parameters of Anisotropic Conductive Adhesive Film and Peeling Strength Key Engineering Materials Online: 5-11-15 ISSN: 1-9795, Vols. 97-3, pp 91-9 doi:1./www.scientific.net/kem.97-3.91 5 Trans Tech Publications, Switzerland Bonding Parameters of Anisotropic Conductive Adhesive

More information

Modeling Printed Circuit Boards with Sherlock 3.2

Modeling Printed Circuit Boards with Sherlock 3.2 Modeling Printed Circuit Boards with Sherlock 3.2 DfR Solutions September 23, 2014 Presented by: Dr. Nathan Blattau Senior Vice President 9000 Virginia Manor Rd Ste 290, Beltsville MD 20705 301-474-0607

More information

Fabrication of Smart Card using UV Curable Anisotropic Conductive Adhesive (ACA) Part I: Optimization of the curing conditions

Fabrication of Smart Card using UV Curable Anisotropic Conductive Adhesive (ACA) Part I: Optimization of the curing conditions Fabrication of Smart Card using UV Curable Anisotropic Conductive Adhesive (ACA) Part I: Optimization of the curing conditions K. K. Lee, K T Ng, C. W. Tan, *Y. C. Chan & L. M. Cheng Department of Electronic

More information

Loughborough University Institutional Repository. This item was submitted to Loughborough University's Institutional Repository by the/an author.

Loughborough University Institutional Repository. This item was submitted to Loughborough University's Institutional Repository by the/an author. Loughborough University Institutional Repository Effect of tongue jewellery and orthodontist metallic braces on the SAR due to mobile phones in different anatomical human head models including children

More information

This document is downloaded from DR-NTU, Nanyang Technological University Library, Singapore.

This document is downloaded from DR-NTU, Nanyang Technological University Library, Singapore. This document is downloaded from DR-NTU, Nanyang Technological University Library, Singapore. Title Temperature and stress distribution in the SOI structure during fabrication( Published version ) Author(s)

More information

Challenges of Fan-Out WLP and Solution Alternatives John Almiranez

Challenges of Fan-Out WLP and Solution Alternatives John Almiranez Challenges of Fan-Out WLP and Solution Alternatives John Almiranez Advanced Packaging Business Development Asia Introduction to Fan-Out WLP Introduction World of mobile gadgetry continues to rapidly evolve

More information

FEM Analysis on Warpage and Stress at the Micro Joint of Multiple Chip Stacking

FEM Analysis on Warpage and Stress at the Micro Joint of Multiple Chip Stacking Hisada et al.: FEM Analysis on Warpage and Stress at the Micro Joint (1/6) [Technical Paper] FEM Analysis on Warpage and Stress at the Micro Joint of Multiple Chip Stacking Takashi Hisada*, Yasuharu Yamada*,

More information

Optimizing Immersion Silver Chemistries For Copper

Optimizing Immersion Silver Chemistries For Copper Optimizing Immersion Silver Chemistries For Copper Ms Dagmara Charyk, Mr. Tom Tyson, Mr. Eric Stafstrom, Dr. Ron Morrissey, Technic Inc Cranston RI Abstract: Immersion silver chemistry has been promoted

More information

EP A2 (19) (11) EP A2 (12) EUROPEAN PATENT APPLICATION. (43) Date of publication: Bulletin 2006/23

EP A2 (19) (11) EP A2 (12) EUROPEAN PATENT APPLICATION. (43) Date of publication: Bulletin 2006/23 (19) Europäisches Patentamt European Patent Office Office européen des brevets (12) EUROPEAN PATENT APPLICATION (11) EP 1 667 226 A2 (43) Date of publication: 07.06.06 Bulletin 06/23 (1) Int Cl.: H01L

More information

3M Anisotropic Conductive Film (for Touch Screen Panel)

3M Anisotropic Conductive Film (for Touch Screen Panel) Technical Data November 2013 3M Anisotropic Conductive Film 7371-20 (for Touch Screen Panel) Product Description 3M Anisotropic Conductive Film (ACF) 7371-20 is a heat-bondable, electrically conductive

More information

Novel Materials and Activities for Next Generation Package. Hitachi Chemical., Co.Ltd. Packaging Solution Center Hiroaki Miyajima

Novel Materials and Activities for Next Generation Package. Hitachi Chemical., Co.Ltd. Packaging Solution Center Hiroaki Miyajima Novel Materials and Activities for Next Generation Package Hitachi Chemical., Co.Ltd. Packaging Solution Center Hiroaki Miyajima 1. Activities of Packaging Solution Center 2. Novel Materials for Next Gen.

More information

Dispersion Analysis of Finite Dielectric Coplanar Waveguide (FCPW) on Alumina and FR4 Substrate

Dispersion Analysis of Finite Dielectric Coplanar Waveguide (FCPW) on Alumina and FR4 Substrate Dispersion Analysis of Finite Dielectric Coplanar Waveguide (FCPW) on Alumina and FR4 Substrate Shanu Sharma #1, Alok Kumar Rastogi (FIETE) # 1, Gazala Parvin #1 #1 Institute for Excellence in Higher Education,

More information

A study aimed at characterizing the interfacial structure in a tin silver solder on nickel-coated copper plate during aging

A study aimed at characterizing the interfacial structure in a tin silver solder on nickel-coated copper plate during aging Sādhanā Vol. 33, Part 3, June 2008, pp. 251 259. Printed in India A study aimed at characterizing the interfacial structure in a tin silver solder on nickel-coated copper plate during aging D C LIN 1,

More information

ENHANCING WLCSP RELIABILITY THROUGH BUILD-UP STRUCTURE IMPROVEMENTS AND NEW SOLDER ALLOYS

ENHANCING WLCSP RELIABILITY THROUGH BUILD-UP STRUCTURE IMPROVEMENTS AND NEW SOLDER ALLOYS ENHANCING WLCSP RELIABILITY THROUGH BUILD-UP STRUCTURE IMPROVEMENTS AND NEW SOLDER ALLOYS B. Rogers, M. Melgo, M. Almonte, S. Jayaraman, C. Scanlan, and T. Olson Deca Technologies, Inc 7855 S. River Parkway,

More information

Recent Advances in Die Attach Film

Recent Advances in Die Attach Film Recent Advances in Die Attach Film Frederick Lo, Maurice Leblon, Richard Amigh, and Kevin Chung. AI Technology, Inc. 70 Washington Road, Princeton Junction, NJ 08550 www.aitechnology.com Abstract: The

More information

Basic PCB Level Assembly Process Methodology for 3D Package-on-Package

Basic PCB Level Assembly Process Methodology for 3D Package-on-Package Basic PCB Level Assembly Process Methodology for 3D Package-on-Package Vern Solberg STC-Madison Madison, Wisconsin USA Abstract The motivation for developing higher density IC packaging continues to be

More information

CONDUCTIVE ADHESIVES FOR LOW-STRESS INTERCONNECTION OF THIN BACK-CONTACT SOLAR CELLS

CONDUCTIVE ADHESIVES FOR LOW-STRESS INTERCONNECTION OF THIN BACK-CONTACT SOLAR CELLS ECN-RX--02-027 CONDUCTIVE ADHESIVES FOR LOW-STRESS INTERCONNECTION OF THIN BACK-CONTACT SOLAR CELLS D.W.K. Eikelboom J.H. Bultman A. Schönecker M.H.H. Meuwissen * M.A.J.C. van den Nieuwenhof * D.L. Meier

More information

Flip Chip - Integrated In A Standard SMT Process

Flip Chip - Integrated In A Standard SMT Process Flip Chip - Integrated In A Standard SMT Process By Wilhelm Prinz von Hessen, Universal Instruments Corporation, Binghamton, NY This paper reviews the implementation of a flip chip product in a typical

More information

The Optimal Passive Thermal Management Soldering and Electrically-Isolating Power Semiconductors to Within 33-micron (1.3 mil) of The Heat Sink

The Optimal Passive Thermal Management Soldering and Electrically-Isolating Power Semiconductors to Within 33-micron (1.3 mil) of The Heat Sink The Optimal Passive Thermal Management ing and Electrically-Isolating Power Semiconductors to Within 33-micron (1.3 mil) of The Heat Sink Jim Fraivillig Fraivillig Technologies 3315 Toro Canyon Road Austin,

More information

Heriot-Watt University

Heriot-Watt University Heriot-Watt University Heriot-Watt University Research Gateway Optimization and characterisation of bonding of piezoelectric transducers using anisotropic conductive adhesive Cummins, Gerard; Gao, Jun;

More information

EPOXY FLUX MATERIAL AND PROCESS FOR ENHANCING ELECTRICAL INTERCONNECTIONS

EPOXY FLUX MATERIAL AND PROCESS FOR ENHANCING ELECTRICAL INTERCONNECTIONS As originally published in the SMTA Proceedings. EPOXY FLUX MATERIAL AND PROCESS FOR ENHANCING ELECTRICAL INTERCONNECTIONS Neil Poole, Ph.D., Elvira Vasquez, and Brian J. Toleno, Ph.D. Henkel Electronic

More information

II. A. Basic Concept of Package.

II. A. Basic Concept of Package. Wafer Level Package for Image Sensor Module Won Kyu Jeung, Chang Hyun Lim, Jingli Yuan, Seung Wook Park Samsung Electro-Mechanics Co., LTD 314, Maetan3-Dong, Yeongtong-Gu, Suwon, Gyunggi-Do, Korea 440-743

More information

Bonding Technology of FPD(Flat Panel Display)

Bonding Technology of FPD(Flat Panel Display) Bonding Technology of FPD(Flat Panel Display) OSAKI ENGINEERING CO., LTD.(OEC) has been playing the pioneering role in bonding technology development of FPD, and obtained reliance as a leading maker. This

More information

Copyright 2009 Year IEEE. Reprinted from 2009 Electronic Components and Technology Conference. Such permission of the IEEE does not in any way imply

Copyright 2009 Year IEEE. Reprinted from 2009 Electronic Components and Technology Conference. Such permission of the IEEE does not in any way imply Copyright 2009 Year IEEE. Reprinted from 2009 Electronic Components and Technology Conference. Such permission of the IEEE does not in any way imply IEEE endorsement of any of Institute of Microelectronics

More information

3M Anisotropic Conductive Film 5363

3M Anisotropic Conductive Film 5363 Technical Data November 2013 Product Description 3M Anisotropic Conductive Film (ACF) 5363 is a heat-bondable, electrically conductive adhesive film. The unbonded film is non-tacky at room temperature

More information

EVALUATION OF HIGH RELIABILITY REWORKABLE EDGE BOND ADHESIVES FOR BGA APPLICATIONS

EVALUATION OF HIGH RELIABILITY REWORKABLE EDGE BOND ADHESIVES FOR BGA APPLICATIONS As originally published in the SMTA Proceedings. EVALUATION OF HIGH RELIABILITY REWORKABLE EDGE BOND ADHESIVES FOR BGA APPLICATIONS Fei Xie, Ph.D., Han Wu, Daniel F. Baldwin, Ph.D., Swapan Bhattacharya,

More information

Chapter 14. Designing with FineLine BGA Packages

Chapter 14. Designing with FineLine BGA Packages Chapter 14. Designing with FineLine BGA Packages S53009-1.3 Chapter 14, Designing with FineLine BGA Packages, replaces AN 114: Designing with FineLine BGA Packages. Introduction As programmable logic devices

More information

EFFECT OF Ag COMPOSITION, DWELL TIME AND COOLING RATE ON THE RELIABILITY OF Sn-Ag-Cu SOLDER JOINTS. Mulugeta Abtew

EFFECT OF Ag COMPOSITION, DWELL TIME AND COOLING RATE ON THE RELIABILITY OF Sn-Ag-Cu SOLDER JOINTS. Mulugeta Abtew EFFECT OF Ag COMPOSITION, DWELL TIME AND COOLING RATE ON THE RELIABILITY OF Sn-Ag-Cu SOLDER JOINTS Mulugeta Abtew Typical PCB Assembly Process PCB Loading Solder Paste Application Solder Paste Inspection

More information

Solder paste reflow modeling for flip chip assembly

Solder paste reflow modeling for flip chip assembly Loughborough University Institutional Repository Solder paste reflow modeling for flip chip assembly This item was submitted to Loughborough University's Institutional Repository by the/an author. Citation:

More information

Designing With High-Density BGA Packages for Altera Devices. Introduction. Overview of BGA Packages

Designing With High-Density BGA Packages for Altera Devices. Introduction. Overview of BGA Packages Designing With High-Density BGA Packages for Altera Devices December 2007, ver. 5.1 Application Note 114 Introduction As programmable logic devices (PLDs) increase in density and I/O pins, the demand for

More information

Y.C. Chan *, D.Y. Luk

Y.C. Chan *, D.Y. Luk Microelectronics Reliability 42 (2002) 1185 1194 www.elsevier.com/locate/microrel Effects of bonding parameters on the reliability performance of anisotropic conductive adhesive interconnects for flip-chip-on-flex

More information

Study of the Interface Microstructure of Sn-Ag-Cu Lead-Free Solders and the Effect of Solder Volume on Intermetallic Layer Formation.

Study of the Interface Microstructure of Sn-Ag-Cu Lead-Free Solders and the Effect of Solder Volume on Intermetallic Layer Formation. Study of the Interface Microstructure of Sn-Ag-Cu Lead-Free Solders and the Effect of Solder Volume on Intermetallic Layer Formation. B. Salam +, N. N. Ekere, D. Rajkumar Electronics Manufacturing Engineering

More information

5. Packaging Technologies Trends

5. Packaging Technologies Trends 5. Packaging Technologies Trends Electronic products and microsystems continue to find new applications in personal, healthcare, home, automotive, environmental and security systems. Advancements in packaging

More information

Economical aluminum substrates make light work of visible LED circuits

Economical aluminum substrates make light work of visible LED circuits Economical aluminum substrates make light work of visible LED circuits Advances in solid state light emitting diodes (LEDs) over the last several years have opened new applications for these devices. Traditionally

More information

Non-Conductive Adhesive (NCA) Trapping Study in Chip on Glass Joints Fabricated Using Sn Bumps and NCA

Non-Conductive Adhesive (NCA) Trapping Study in Chip on Glass Joints Fabricated Using Sn Bumps and NCA Materials Transactions, Vol. 49, No. 9 (2008) pp. 2100 to 2106 #2008 The Japan Institute of Metals Non-Conductive Adhesive (NCA) Trapping Study in Chip on Glass Joints Fabricated Using Sn Bumps and NCA

More information

Reliability Evaluation of CIF (chip-in-flex) and COF (chip-on-flex) packages

Reliability Evaluation of CIF (chip-in-flex) and COF (chip-on-flex) packages Reliability Evaluation of CIF (chip-in-flex) and COF (chip-on-flex) packages Jae-Won Jang* a, Kyoung-Lim Suk b, Kyung-Wook Paik b, and Soon-Bok Lee a a Dept. of Mechanical Engineering, KAIST, 335 Gwahangno

More information

Using Argon Plasma to Remove Fluorine, Organic and Metal Oxide Contamination for Improved Wire Bonding Performance

Using Argon Plasma to Remove Fluorine, Organic and Metal Oxide Contamination for Improved Wire Bonding Performance Using Argon Plasma to Remove Fluorine, Organic and Metal Oxide Contamination for Improved Wire Bonding Performance Scott D. Szymanski March Plasma Systems Concord, California, U.S.A. sszymanski@marchplasma.com

More information

3D-WLCSP Package Technology: Processing and Reliability Characterization

3D-WLCSP Package Technology: Processing and Reliability Characterization 3D-WLCSP Package Technology: Processing and Reliability Characterization, Paul N. Houston, Brian Lewis, Fei Xie, Ph.D., Zhaozhi Li, Ph.D.* ENGENT Inc. * Auburn University ENGENT, Inc. 2012 1 Outline Packaging

More information

Characterization of 0.6mils Ag Alloy Wire in BGA Package

Characterization of 0.6mils Ag Alloy Wire in BGA Package Characterization of 0.6mils Ag Alloy Wire in BGA Package Toh Lee Chew, Alan Lumapar Visarra, *Fabien Quercia, *Eric Perriaud STMicroelectronics Muar, Tanjung Agas Industrial, P.O.Box 28, 84007, Muar, Johor

More information

Thermal Analysis of High Power Pulse Laser Module

Thermal Analysis of High Power Pulse Laser Module Thermal Analysis of High Power Pulse Laser Module JinHan Ju PerkinElmer Optoelectronics Salem MA 01970 Abstract Thermal management is very critical in laser diode packaging, especially for a high power

More information

Observation of Copper Ionic Migration in Insulation Layer by Pulsed Electroacoustic Method

Observation of Copper Ionic Migration in Insulation Layer by Pulsed Electroacoustic Method IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES, VOL. 25, NO. 2, JUNE 2002 239 Observation of Copper Ionic Migration in Insulation Layer by Pulsed Electroacoustic Method Kenji Okamoto, Kaori

More information

Using PDMS Micro-Transfer Moulding for Polymer Flip Chip Packaging on MEMS

Using PDMS Micro-Transfer Moulding for Polymer Flip Chip Packaging on MEMS Using PDMS Micro-Transfer Moulding for Polymer Flip Chip Packaging on MEMS Edward K.L. Chan, Cell K.Y. Wong, M. Lee, Matthew M.F. Yuen, Yi-Kuen Lee Department of Mechanical Engineering Hong Kong University

More information

A Cofired Bump Bonding Technique for Chip Scale Package Fabrication Using Zero X-Y Shrinkage Low Temperature Cofired Ceramic Substrate

A Cofired Bump Bonding Technique for Chip Scale Package Fabrication Using Zero X-Y Shrinkage Low Temperature Cofired Ceramic Substrate A Cofired Bump Bonding Technique for Chip Scale Package Fabrication Using Zero X-Y Shrinkage Low Temperature Cofired Ceramic Substrate Minehiro Itagaki, Nobuhiro Hase, Satoru Yuhaku, Yoshihiro Bessho and

More information

Thermal Management of LEDs: Looking Beyond Thermal Conductivity Values

Thermal Management of LEDs: Looking Beyond Thermal Conductivity Values Thermal Management of LEDs: Looking Beyond Thermal Conductivity Values Specifically designed and formulated chemical products are widely used in the electronics industry for a vast array of applications.

More information

Wire-Bond CABGA A New Near Die Size Packaging Innovation Yeonho Choi February 1, 2017

Wire-Bond CABGA A New Near Die Size Packaging Innovation Yeonho Choi February 1, 2017 Amkor Technology, Inc. White Paper Wire-Bond CABGA A New Near Die Size Packaging Innovation Yeonho Choi February 1, 2017 Abstract Expanding its ChipArray Ball Grid Array (CABGA) package form factor miniaturization

More information

ONE of the aspects of the continuous miniaturization in

ONE of the aspects of the continuous miniaturization in IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES, VOL. 28, NO. 3, SEPTEMBER 2005 499 SMT-Compatibility of Adhesive Flip Chip on Foil Interconnections With 40-m Pitch Hans de Vries, Jan van Delft,

More information

Thermo-Mechanical FEM Analysis of Lead Free and Lead Containing Solder for Flip Chip Applications

Thermo-Mechanical FEM Analysis of Lead Free and Lead Containing Solder for Flip Chip Applications Thermo-Mechanical FEM Analysis of Lead Free and Lead Containing Solder for Flip Chip Applications M. Gonzalez 1, B. Vandevelde 1, Jan Vanfleteren 2 and D. Manessis 3 1 IMEC, Kapeldreef 75, 3001, Leuven,

More information

Improvement of Laser Fuse Processing of Fine Pitch Link Structures for Advanced Memory Designs

Improvement of Laser Fuse Processing of Fine Pitch Link Structures for Advanced Memory Designs Improvement of Laser Fuse Processing of Fine Pitch Link Structures for Advanced Memory Designs Joohan Lee, Joseph J. Griffiths, and James Cordingley GSI Group Inc. 60 Fordham Rd. Wilmington, MA 01887 jlee@gsig.com

More information

Development of Anisotropic Conductive Film for Narrow Pitch Circuits

Development of Anisotropic Conductive Film for Narrow Pitch Circuits ELECTRONICS Development of Anisotropic Conductive Film for Narrow Pitch Circuits Hideaki TOSHIOKA*, Kyoichiro NAKATSUGI, Masamichi YAMAMOTO, Katsuhiro SATO, Naoki SHIMBARA and Yasuhiro OKUDA Anisotropic

More information

Relative Reliability Measurements for Electrically Conductive Adhesive Joints on Subtractive Thermoplastic Substrates

Relative Reliability Measurements for Electrically Conductive Adhesive Joints on Subtractive Thermoplastic Substrates Relative Reliability Measurements for Electrically Conductive Adhesive Joints on Subtractive Thermoplastic Substrates Summary This Note describes a new combinational test method for the measurement of

More information