RAIN (RAndom INsertion) Scheduling Algorithm for SoC Test

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1 RAIN (RAnom INsertion) Sheuling Algorithm for SoC Test Jung-Been Im Sunghoon Chun Geune Kim Jin-Ho An Sungho Kng Deprtment of Eletril n Eletroni Engineering Yonsei University 134, Shinhon-Dong Seoemoon-Gu, Seoul, Kore Tel: , Fx: {jozo, shhun, kg9572, sominy}@so.yonsei..kr shkng@yonsei..kr Astrt This pper presents new SoC (System-on-Chip) test sheuling lgorithm. Reuing the test pplition time is n importnt issue for ore-se SoC test. In this pper, eh ore is represente y retngle, the height of whih is equl to the TAM with n the with of whih is equl to the test time. A one-element-exhnge lgorithm is use for optimizing the test time of eh ore n the RAIN sheuling lgorithm is use for optimizing the test time of SoC. The RAIN sheuling lgorithm uses sequene pir t struture to represent the plement of retngles, n otins the optimize results y inserting into rnom position on the sequene pir. The results of the experiments onute using ITC 02 SoC enhmrks show tht the propose lgorithm gives the shortest test pplition time ompre with erlier reserhes for most of the ses. 1. Introution The numer of ores emee in SoC is inresing rpily, n ores re more eeply emee in hip. Therefore, testing the ores y mens of iret ess through hip s I/O pins is lmost impossile. To solve this prolem, methos like the IEEE P1500 test wrpper [1] n the TAM (Test Aess Mehnism) hve een propose. A test wrpper provies isoltion of the ore from surrouning logis n the interfe etween ore n TAM. The TAM is the mehnism to trnsfer test t from SoC s I/O pins to the ore wrppers. However, the essiility is only prolem for the SoC test. Test ost reution is nother, n muh reserh is eing onute to reue the test ost. SoC test sheuling is one pproh. SoC test sheuling is proess to minimize the test pplition time of whole ores in SoC uner the given onstrints like TAM nwith n power. It inlues the optimiztion of the test wrpper esign, the ssignment of TAM with to eh ore, n the etermintion of test strt n finish time for eh ore. Severl prior reserhes re relte to the SoC test sheuling prolems. In [2], mixe integer liner progrmming (MILP) ws use to solve the test sheuling. In [3], the SoC test sheuling prolem is formulte s 2- imensionl in pking prolem, n eh ore ws represente y retngle, the with of whih ws the numer of SoC pins llote n the height of whih ws the ore test time given the numer of SoC pins. Retngle representtion ws lso use in [4], n tehnique se on retngle pking ws use for wrpper/tam ooptimiztion n test sheuling for SoCs. Power ws reently e s onstrint of test sheuling. A restrite 3-imensionl in-pking moel [5] n tehniques se on retngle pking [6] were use for power onstrine test sheuling. A reonfigurle power-onsious ore test wrpper ws propose in [7] n pplie to the preemptive test sheuling. Though it gives the lowest test time results in mny ses, it requires itionl logis n ontrols. Severl reent ppers strte to use sequene pir representtion for test sheuling prolems. In [8], heuristi lgorithms using k-tuples se on the sequene pir nottion were propose. A simulte nneling-se lgorithm with the sequene pir representtion ws use in [9]. Most reently, n evolutionry lgorithm-se pproh tht uses sequene pir representtion ws propose [10]. Sine [9] n [10] give the lowest test time results for most of the ses, their results re presente in the experimentl results setion for omprison with our results. In this pper, we use sequene pir representtion n propose the RAIN (RAnom INsertion) sheuling lgorithm to minimize the test pplition time for ll ores in SoC. Sine the insertion into rnom position of the sequene pir is mjor opertion of our lgorithm, we nme our lgorithm RAIN (RAnom INsertion). This pper is orgnize s follows. In Setions 2, we riefly esrie the sequene pir representtion. Wrpper esign optimiztion n new 'one-element-exhnge' lgorithm re presente in Setion 3, n our SoC test sheuling lgorithm is presente in Setion 4. Setion 5 ontins our experimentl results for four ITC '02 enhmrks. Setion 6 onlues the pper. 2. Sequene Pir Representtion When ore is represente y retngle, the height of the retngle is the TAM with ssigne to the ore, n the

2 with of the retngle is the test pplition time for tht TAM with. To sheule the ores represente y retngles, we use sequene pir representtion. Sequene pir representtion ws first introue in [11] for the purpose of VLSI plement. In SoC test sheuling, [8], [9], n [10] use sequene pir representtion. The sequene pir representtion uses two permuttions ( +, - ) to esrie the plement of retngles. The plement of retngles is etermine y the following rules. ( +, - ) = (, ) : is ple to the left of ( +, - ) = (, ) : is ple elow To erive the plement of retngles from sequene pir, one n onstrut 45-egree olique gri s shown in Figure 1 (). () Olique gri () Retngle plement Figure 1. Sequene pir ( +, - ) = (, ) Two vertex weighte irete yli grphs n e onstrute from the sequene pir, s shown in Figure 2. One is the horizontl irete grph G H n the other is the vertil irete grph G V. The weight of eh vertex in G H is the with of the retngle, or the test pplition time of the ore. The weight of eh vertex in the G V is the height of the retngle, or the TAM with ssigne to the ore. One n pply the well-known longest pth lgorithm for the G H (G V ) to erive the overll SoC test time (mximum TAM with). () Horizontl irete grph G H () Vertil irete grph G V Figure 2. Two irete grphs of the sequene pir given in Figure 1 The vntge of sequene pir representtion is tht only two permuttions re suffiient to represent the plement of retngles. However, it hs isvntge. As the numer of retngles inreses, the totl numer of possile sequene pirs inreses very rpily. 3. Core Wrpper Design Optimiztion 3.1. Wrpper Design A test wrpper is DFT logi for testing ores emee in SoC. If fewer wrpper pins re ssigne thn I/O ports of the ore, it is importnt to optimize test wrppers of the ore in orer to minimize test time. To lulte the test pplition time T, we use the well-known formul given in [12] n esrie elow, T = { 1 + mx (S i, S o ) } P + min (S i, S o ) where P enotes the numer of test ptterns n S i (S o ) is the length of the longest wrpper sn-in (sn-out) hin. Sine the numer of test ptterns is fixe, reuing the length of the longest wrpper sn-in n sn-out hin is neessry. To stisfy this nee, sn hins must e ssigne to the wrpper hins so tht the lengths of the wrpper sn hins re s similr s possile. Funtionl input, output, n iiretionl ports must e ssigne the sme wy s the sn hins. This ore wrpper esign prolem is known s NPhr [13]. The first step in ore wrpper esign is to prtition the sn hins in ore. The prolem of PSC (Prtitioning of Sn Chins) is equivlent to the well-known prolem of multi-proessor sheuling, n severl lgorithms re use to solve the prolem [12]. One of the wiely use lgorithms is the lgorithm se on Best Fit Deresing (BFD) heuristis [13]. In this pper, we use Lrgest Proessing Time (LPT) lgorithm [12]. Given set {T 1, T 2,, T n } of tsks, eh tsk hs n exeution length l(t i ). First, the tsks re sorte suh tht l(t 1 ) l(t 2 ) l(t n ) n then they re ssigne to the minimlly loe proessor in suession. In the PSC prolem, the tsk is the sn hin; l(t i ) is the length of the sn hin, n the minimlly loe proessor is the shortest wrpper sn hin. We use the LPT lgorithm inste of the wiely use BFD lgorithm sine the LPT lgorithm gives etter results in more ses fter the oneelement-exhnge lgorithm, expline in Setion 3.3, is pplie. The next step of ore wrpper esign is the ssignment of funtionl I/O ports in ore. Funtionl I/O ports re ssigne to wrpper sn hins using the sme lgorithm. When there re no sn hins in ore, unlne esign [9] n e use to ssign ifferent numer of wrpper ports to sn-in n sn-out. Though it n reue the length of the longest wrpper sn hin in omprison with lne esign, it requires tht TAM supports iiretionl I/Os of test t. In this pper, the unlne esign is use for omprison with the results of [9] n [10] One-Element-Exhnge The results erive from pplying the lgorithm like LPT re not lwys the est-optimize results. Sine the PSC prolem oes not require rel time solution, we pplie n itionl one-element exhnge lgorithm to the results of the LPT lgorithm. This lgorithm first fins the longest wrpper sn hin mong the urrent wrpper sn hins, n then serhes the others to fin sn hin element tht

3 n reue the length of the longest wrpper sn hin through n exhnge with the sn hin element of the urrent longest wrpper sn hin. If suh elements re foun, they re exhnge. This proeure is repete until tht there re no exhngele elements in the wrpper sn hins. The pseuo-oe of the one-element-exhnge lgorithm is given in Figure Apply the LPT lgorithm to the PSC prolem of n wrpper sn hin; 2. for i = 1 to n-1 3. Sort the wrpper sn hins in eresing orer; 4. WC L = the longest wrpper sn hin; 5. l(wc L ) = length of the longest wrpper sn hin; 6. WC S = the ith shortest wrpper sn hin; 7. l(wc S ) = length of the ith shortest wrpper sn hin; 8. Fin two sn hins, SC L n SC S, in WC L n WC S, respetively suh tht { l (SC L )- l (SC S ) } is mximize n { 0 < { l (SC L ) - l (SC S ) }<={ l (WC L ) - l (WC S )}/2 } is stisfie; 9. if suh sn hins exist then i = 0; 10. en for; Exhnge them; Figure 3. One-element-exhnge lgorithm By using this lgorithm, it is possile to reue the length of the longest wrpper sn hin; therefore, the test pplition time is reue for the ore. The run time for this lgorithm is less thn 1 seon for ll ores in ny enhmrk. Figure 4 illustrtes n exmple for ore 6 in p93791 enhmrk. Here, ore 6 hs 46 internl sn hins: 9 sn hins x its, 30 sn hins x its, n 7 sn hins x 500 its. The result using only the LPT lgorithm for the 5 TAM with shows tht the length of the longest wrpper sn hin is 5142 its (the result of BFD is the sme). However, the result fter pplying the one-elementexhnge lgorithm is 5060 its. In ition, the test pplition time is reue y lok-yles, from to TAM 1 TAM 2 TAM 3 TAM 4 TAM 5 TAM 1 TAM 2 TAM 3 TAM 4 TAM () Result of pplying LPT lgorithm only () Result of pplying one-element-exhnge lgorithm to () Figure 4. Result of pplying one-element-exhnge lgorithm for ore 6 in p93791 When n lgorithm se on BFD inste of LPT is use efore pplying the one-element-exhnge lgorithm, etter results n e otine for some ses. If the minimum vlue of the results erive from these lgorithms is selete, more optimize wrpper esign will e hieve. However, only the LPT lgorithm is use for experiments in this pper. 4. RAIN Sheuling Algorithm 4.1. Exess-Are One n otin reltion etween TAM with n test time using the eqution presente in Setion 2 following the ore wrpper esign in Setion 3. The test time vries with TAM with s stirse funtion [13], n only pretooptiml points [13] re onsiere for the SoC test sheuling. We e new ftor, exess-re, to the reltion etween TAM with n test time. Exess-re n e otine with the following sequenes. First, the vlue orresponing to the re of retngle is lulte y multiplying TAM with n test time for eh TAM with se; the exess-re is then lulte y sutrtion of the smllest re from eh re. The smllest re is generlly 1 TAM with se, ut euse of unlne esign this is not lwys the se. An exmple for the preto-optiml point of the ore 6 from p93791 is presente in Tle 1. Using the exess-re informtion, we selet the elements tht hve n exess-re over the esignte limit, n exlue them from the nites set for wrpper esign seletion, sine they inrese the proility of less optimize sheuling results n the run time of the lgorithm. We set the limit of the exess-re s shown Figure 5. Cores re ivie into two groups (lrge n smll) n the limit vlues of the exess-re re set to e ifferent in the two groups, sine the vlue of the lrge group is too lrge for the smll group. Though we set the limit using the results of 695 enhmrk, it is pplie well to other enhmrks. 1. Otin n verge_re from TAM 1 res of eh ore; 2. Divie ores into two groups : for eh ore if (TAM 1 re >= 80% of verge_re) then ore is memer of Group_L (Lrge); else ore is memer of Group_S (Smll); 3. Fin the smllest exess-re for ores in Group_L (SEA L ) whih stisfies tht t lest one preto-optiml, time n TAM with of whih re less or equl thn trget ones, exists; 4. Limittion_of_Group_L = SEA L 1.4; 5. Fin the smllest exess-re for ores in Group_S (SEA S ) s sme wy s Group_L; 6. if (SEA S < SEA L /2) then Limittion_of_Group_S = Limittion_of_Group_L / 2; else Limittion_of_Group_S = SEA S ; Figure 5. Proeure of setting the limit of the exess-re

4 TAM With (1) Tle 1. Exess-re lultion for the preto-optiml points of the ore 6 from p97391 Longest Wrpper Longest Wrpper Test Time (4) Are (5) Exess-Are Sn-In Chin (2) Sn-Out Chin (3) = ((2)+1) X (3) = (4)X(1) = (5) Bsi Ie of RAIN Sheuling Algorithm The si ie of the RAIN sheuling lgorithm omes from the following hrteristi of sequene pir. As shown in Figure 6, the reltive plement of retngles (,, n ) is not hnge y inserting new element () into ritrry positions of the sequene pir. Therefore, it is possile to sheule new ore without reking own the lreyotine well-sheule results. It is only neessry to hek whether ll onstrints re stisfie fter eh insertion. () ( +, - ) = (, ) () ( +, - ) = (, ) () ( +, - ) = (, ) () ( +, - ) = (, ) Figure 6. Insertion of new element,, into the ritrry positions of sequene pir 4.3. RAIN Sheuling Algorithm The sheuling lgorithm use in this pper is nme RAIN (RAnom INsertion) euse it inserts new ore into n ritrry position in sequene pir when sheuling new ore. The pseuo-oe of the lgorithm is shown in Figure 7. After the etermintion of the trget TAM with n initil test time, the wrpper esign is selete uner onstrints, n the ore orer for sheuling is etermine (line 2 ~ 10 in Figure 7). The initil solution set S_4 is me for the first 4 ores y rnom seletion n swpping in sequene pirs (line 11). The 5th ore is inserte into the elements of the urrent solution set S_4, n solution set S_5 is generte (line 13). This insertion proeure is repete until the lst ore is inserte (line 14). If the sheuling is suessful, the trget test time is erese n sheuling is reissue. If not, the trget test time is inrese n sheuling is reissue (line 5 ~ 17 loop). Designing the wrpper (line 2 in Figure 7) n setting the exess-re (line 8) re expline in Setion 3 n 4.1, respetively. Setting the trget test time (line 6) is inreses n ereses the trget test time etween the initil n minimum time until the mount of time hnge is erese to less thn the esignte limit. The mount of time hnge is ivie y 2 t every setting. The ore orer for sheuling is etermine y sorting the test times of the ores for TAM 1 in eresing orer to sheule the lrgest ore first (line 10). If the numer of preto-optiml points for ore in the urrent wrpper esign set is equl to or less thn 5, the test time use for orering is multiplie y 2. Sine inserting the ore, whih hs smll numer of preto-optiml points, lter on in the sheuling proess is not goo for the suessful sheuling, this nees to e sheule fst. A solution set S_i is me y inserting the ith ore into the elements of S_(i-1)

5 (line 13 ~ 14). The ith ore, with rnomly selete wrpper esign, is inserte into rnomly selete position in the sequene pir of the element of S_(i-1). All onstrints (trget time n TAM) re heke t eh insertion n, if they re stisfie, the generte element is inlue in S_i. This proeure is repete until the numer of elements in S_i or the insertion filures eomes the esignte numer. Sine the RAIN sheuling lgorithm rnomly selets the position n the wrpper to e inserte, its results n e ifferent for every run. To reue this rnomness, the memers of the initil solution set S_4 re fully me (line 11 in Figure 7) n S_5 is generte for ll ses of S_4 (line 12 ~ 16 loop). However, the run time of the lgorithm is inrese s result of suh justments. One wy to reue suh n inrese is to hek the sum of the minimum re n exess-res t every insertion. Sine the element, whih hs lrge sum of exess-res, hs low proility of suess in sheuling the remining ores into trget test time, it is not selete for the next solution set. 1. N = Numer of Cores in SoC 2. Design wrpper; 3. T W = Trget TAM with; 4. Selet wrpper esigns uner onstrints (T W ); 5. o 6. T T = Set trget test time; 7. Selet wrpper esigns uner onstrints (T W, T T ); 8. EA = Set exess-re; 9. Selet wrpper esigns uner onstrints (T W, T T, EA); 10. Determine ore orer for sheuling; 11. S_4 = Mke initil solution set for first 4 ores; 12. o 13. S_5 = Mke solution set y inserting 5th ore into S_4; 14. for i = 6 to N S_i = Mke solution set y inserting ith ore into S_(i-1); 15. if (Sheuling suees) then rek; 16. while (Different element in S_5 n e generte); 17. while (Trget test time n e juste); Figure 7. RAIN sheuling lgorithm 5. Experimentl Results The experiments were onute using the ITC 02 enhmrks [14] n the results re presente in Tle 2. We set the numer of elements of the solution set S_i to 20, exept for S_4. The experimentl results were otine using 1.2 Ghz Sun Ble 2000 worksttion. All experiments were repete 10 times, n the minimum n mximum vlues of time results re presente. The verge sheuling run times re presente in Tle 3. As shown in the results, our test time results re the lowest in most ses. However, the lgorithm run times vry from less thn 5 seons to more thn 20 minutes. The lrge run times result from the repetitive runs neessry to reue the influene of rnomness. Another use of lrge run time is tht too muh time is spent isovering tht the trget time is too smll for suessful sheuling. Tle 4 shows suh se, in whih trget time less thn fils to sheule. However, too muh time (663), more thn two times of ll suessful sheuling times (245), is require to onlue tht sheuling into time less thn is impossile. To run the sheuling lgorithm more quikly, it is neessry to reue suh time. Setting the initil vlue of the trget test time to the result of the previous pper n mke the lgorithm run more quikly. This reues the numer of resetting trget test times n reissuing the sheuling. Another wy to run the lgorithm more quikly is to set lower limit of time hnge to lrge vlue (6 in our experiments). Though this n reue the numer of sheuling filures fter result time, it lso n e n ostle to otining more optimize result time. One of the results is illustrte in Figure 8. This is the result using 695 with 16 TAM wires n unlne esign. The test time is reue from lok-yles in [10] to lok-yles. The mximum vlue of the exess-re is 1016 of ore 6, n the sum of exess-res of 10 ores is less thn In the se of 695, the test time reution y the 'one-element-exhnge' lgorithm is so low tht only 3 lokyles re reue in Figure 8. Though we use unlne wrpper esign to erive the result shown in Tle 3, the experiments using lne wrpper esign gve the est time results in most ses. Figure 8. Sheuling result of 695 SoC enhmrk using 16 TAM wires 6. Conlusion In this pper, we present new lgorithm to minimize the test pplition time of SoC. First, the one-elementexhnge lgorithm is use for optimizing the wrpper esign of the ores. Then, the RAIN sheuling lgorithm - whih is motivte y the insertion hrteristi of the sequene pir - is pplie to the optimize wrpper esign to minimize the test pplition time of SoC. The experiments re onute on the ITC 02 enhmrk, n their results re presente. Though our lgorithm requires lrge run time n its result time is not fixe euse of rnomness, it gives the est results for most of the enhmrks. Referenes [1] IEEE P1500 Wesite. [2] K. Chkrrty, "Test Sheuling for Core-Bse Systems Using Mixe-Integer Liner Progrmming," IEEE TCAD, pp , 2000.

6 Benhmrk D695 10ores P ores P ores P ores Tle 2. Test pplition times for ITC 02 enhmrks with unlne esign Algorithm Numer of TAM Wires RA min RA mx EA C [7] EA nc [7] SA1 [6] RA min RA mx EA C [7] EA nc [7] SA1 [6] RA min RA mx EA C [7] EA nc [7] SA1 [6] RA min RA mx EA C [7] EA nc [7] SA1 [6] Tle 3. Run times for ITC 02 enhmrks with unlne esign (seons) Benhmrk Numer of TAM Wires D695 men ores stev P22810 men ores stev P34392 men ores stev P93791 men ores stev [3] Y. Hung, W.-T. Cheng, C.-C. Tsi, N, N. Mukherjee, O. Smmn, Y. Zin n S. M. Rey, Resoure Allotion n Test Sheuling for Conurrent Test of Core-Bse SOC Design, ATS, pp , 2001 [4] V. Iyengr, K. Chkrrty n E. J. Mrinissen, "On using Retngle Pking for SOC Wrpper/TAM Co-optimiztion," VTS, pp , [5] Y. Hung, S. M. Rey, W.-T. Cheng, P. Reuter, N. Mukherjee, C.-C. Tsi, O. Smmn, Y. Zin, "Optiml Core Wrpper With Seletion n SOC Test Sheuling Bse on 3-D Bin Pking Algorithm," ITC, pp , [6] V. Iyengr, K. Chkrrty n E. J. Mrinissen, "Wrpper/TAM Co-optimiztion, Constrint-Driven Test Sheuling, n Test Dt Volume Reution for SOCs," DAC, pp , [7] E. Lrsson n Z. Peng, A Reonfigurle Power-Consious Core Wrpper n its Applition to SOC Test Sheuling, ITC, pp , [8] S. Kornne n V. Iyengr, "On the Use of k-tuples for SoC Test Sheule Representtion," ITC, pp , [9] W. Zou, S. R. Rey, I. Pomernz n Y. Hung, "SOC Test Sheuling Using Simulte Anneling," VTS 2003 [10] Y. Xi, M. Chrznowsk-Jeske, B. Wng n M Jeske, "Using Distriute Retngle Bin-Pking Approh for Core-se SoC Test Sheuling with Power Constrints," ICCAD, pp , 2003 [11] H. Murt, K. Fujiyoshi, S. Nktke n Y. Kjtni, "VLSI Moule Plement Bse on Retngle-Pking y the Sequene- Pir," IEEE TCAD, pp , [12] E. J. Mrinissen, S. K. Goel n M. Louserg, "Wrpper Design for Emee Core Test," ITC, pp , Tle 4. Run time of sheuling p22810 enhmrk using 16 TAM wires Trget Run Run Trget Result Time Time Time Time Time Chnge (Suess) (Filure) File File File File File Sum [13] V. Iyengr, K. Chkrrty n E. J. Mrinissen, "Test Wrpper n Test Aess Mehnism Co-Optimiztion for System-op-Chip," ITC, pp , 2001 [14] E. J. Mrinissen, V. Iyengr n K. Chkrrty, ITC'02 SoC