Rapid Deployment of Data Mining in Engineering Applications IEEE STC 2014
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1 Rapid Deployment of Data Mining in Engineering Applications IEEE STC 2014 Nikhil Dakwala Broadcom Corporation, Irvine, CA 3/30/2014 1
2 Presentation Outline Terms and acronyms Need for data mining Supervised learning-based data mining Cluster analysis through Fuzzy clustering Decision trees Rapid deployment in Perl Conclusion 3/30/2014 IEEE STC
3 Terms and Acronyms Silicon: Integrated circuit (IC) chip ATE: Automatic Test Equipment (testers) ATPG: Automatic Test Pattern Generation TVF: Three operating corners: temperature, voltage, and frequency SA: Short at VDD or short at ground faults Shmoo: Steady ramp up/down of voltage vs. frequency in regular steps, for a pattern or group of patterns, on ATE CDC: Clock Domain Crossing DM: Data Mining DT: Decision Tree 3/30/2014 IEEE STC
4 IC Test and Debug Flow Software Model of IC Chip Debug and Fix Fail ATPG ATE Pass Ship to Customer 3/30/2014 IEEE STC
5 Need for Data Mining $ Profit Debug Window Volume Production Net $$s Cost $ Cost NRE Design Mask Time Tremendous Amount of Failure Data 3/30/2014 IEEE STC
6 Data Mining: Supervised Knowledge Discovery Visual Inspection Repeated patterns? Yes No Stop Custom Stats, Avg/Median Sort Automate Pattern Inspection 3/30/2014 IEEE STC
7 Data Mining Techniques Cluster analysis Fuzzy clustering Decision trees 3/30/2014 IEEE STC
8 Clustering: Mine ATE Logs Outliers ATE Fails DM Failure Pin Stats T/V/F Sensitivity Failure Test Stats 3/30/2014 IEEE STC
9 Fuzzy Clustering i_rx1_e1/ifo_mem_/data_from_mem_pipeline_reg_39_/q i_rx2_e0/ifo_mem_/data_from_mem_pipeline_reg_3_/q i_rx3_e1/ifo_mem_/data_from_mem_pipeline_reg_89_/q i_cfd_e1/ifo_mem_/data_from_mem_pipeline_reg_5_/q i_txrx_e1/ifo_mem_/data_from_mem_pipeline_reg_02_/q i_rxtx_e1/ifo_mem_/data_from_mem_pipeline_reg_1_/q i_nm_e1/ifo_mem_/data_from_mem_pipeline_reg_04_/q i_ps_e1/ifo_mem_/data_from_mem_pipeline_reg_62_/q 3/30/2014 IEEE STC
10 Decision Trees: Analyze Failure ATE Fails Data DM Failure Pin Stats T/V/F ASCII Shmoo Plot Pattern Name ===> chain.pat Freq_Start = MHz Freq_Stop = MHz Freq_Inc = MHz CoreV_Start = 0.900V CoreV_Max = 1.300V CoreV_Inc = 0.100V PASS = '*' FAIL = '-' CORE VOLTAGE MHZ --** MHZ -*** MHZ -*** MHZ -*** MHZ -*** MHZ -*** 3/30/2014 IEEE STC
11 Voltage Sensitivity Decision Tree N Bad Part Tests Pass at 1V? N ATE Fails Tests Pass at 1.2V? Y Voltage Sensitive Part Y Good Part DM Failure Pin Stats If-then-else parsing, T/V/F failure statistics T/V/F ASCII Shmoo Plot Pattern Name ===> chain.pat Freq_Start = MHz Freq_Stop = MHz Freq_Inc = MHz CoreV_Start = 0.900V CoreV_Max = 1.300V CoreV_Inc = 0.100V PASS = '*' FAIL = '-' CORE VOLTAGE MHZ --** MHZ -*** MHZ -*** MHZ -*** MHZ -*** MHZ -*** 3/30/2014 IEEE STC
12 Rapid Deployment: Clock Domain Crossing (CDC) Clock A Clock B Source Logic Destination 3/30/2014 IEEE STC
13 Problem: Testing Huge Cones Clock A Clock B Source Destination Source Destination 3/30/2014 IEEE STC
14 Perl-Based Rapid Deployment Regular expressions. Pattern matching and substitutions are ideal for fuzzy clustering. Hash tables and sorting. 3/30/2014 IEEE STC
15 DM: Parse CDC Data #extract clock #extract end-point #process_store_node ($clock,$end_point,"end_point") 3rd argument is data-direction in hash data storage #extract start-point #process_store_node($clock, $start_point,"start_point ) 3/30/2014 IEEE STC
16 Cluster Subroutine #store node according to data-direction, and update counts Data structure to store full nodes $dat_hash{full}{$direction}{$node}{count}++; $dat_hash{full}{$direction}{$node}{clocks} Fuzzify and store fuzzy statistics $fuzed_node = &fuzzify_name($node); $dat_hash{fuz}{$direction}{$fuzed_node}{count}++; $dat_hash{fuz}{$direction}{$fuzed_node}{clocks} 3/30/2014 IEEE STC
17 Fuzzy Clustering in Perl sub fuzzify_name { local ($fn_name) $fn_name =~ s/reg_*//ig; $fn_name =~ s/inst_*//ig; $fn_name =~ s/_top//g; $fn_name =~ s/\d+_*//ig; $fn_name =~ s/_+/_/g; return $fn_name; } #sub fuzzify_name #remove register string #remove instance string #remove hierarchy #remove bit indices #remove hierarchy delimiter 3/30/2014 IEEE STC
18 Conclusion Rapid deployment of data mining. Leverage engineer s knowledge. Extract intelligence, outliers. Higher-level programming languages like Perl, Python, TCL, etc. 3/30/2014 IEEE STC
19 Q&A 3/30/2014 IEEE STC
20 Chip Life-Cycle & Defect Costs 1000 x 1000 x 1000 x.. $$ 100 $ 10 $ 1 $ 0.1 $ 0.01 $ Customer/Field Returns/Legal Burn in/stress Test System Test ATE: Post-Assembly Individual Module Test Wafer Probe Test Test Generation & Validation $ Assumed cost Software Model Test Costs 3/30/2014 IEEE STC
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