Escape prevention. & RMA management. Dan Glotter CEO & Founder OptimalTest

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1 Escape prevention & RMA management Dan Glotter CEO & Founder OptimalTest

2 Trends driving quality (1) -- Wafer level packaging -- (WLCSP WCSP WLP WLBGA) For the last few years new Wafer Level Packaging technology is being used for many products like mobile phones, laptop, MP3, GPS etc After the FAB process the wafer goes through those steps: wafer bumping, wafer level test, back grind, dicing, and packing in tape & reel to support a full turn-key WLCSP solution That means that THERE IS NO MORE FT/BI/SLT OPERATION!!! The tape is going directly to the customer for board level mounting Thus, Quality becomes critical since there is no other gate keeper 7/1/2013 2

3 Trends driving quality (2) -- Multi Chip Packaging (2D, 2.5D & 3D) -- MCP refers to a packaging configuration containing up-to 8 chips, connected via wirebonds to a multilayer circuit board, and protected by either a molded encapsulant or a ceramic package. A common example is a memory card containing 2 devices An expensive flash say 128GB ~10$ device A cheap controller a few cents device The problem is if the package fails due to the cheap controller The problem intensify when it evolves many devices 7/1/2013 3

4 Future Trends driving quality -- Next Generation complex 3D package -- Wafer to Wafer Through Silicon Via (TSV) Through Silicon Via (TSV) enable 3D IC by stacking silicon wafers (and/or dies) and interconnecting them vertically so that they behave as a single device. Common examples: combining full wafers of CMOS logic, DRAM and III-V materials into a single IC problem is if the wafer s quality level vary from the other wafer s quality level The problem intensify when it evolves multiple wafers 7/1/2013 4

5 Financial Trends driving quality -- Dual design wins changed the game rules Devices Quality drive profitability -- Key OEMs will use the following strategy in the design will selection: Chip Performance Vs the overall electronic device characteristics; The Price; Ability to meet supply demand, Having 2 design wins for Nego purposes & Supply demand Quality levels and previous DPM preformance Once decision is made on the 2 design wins, and assuming that the winners meet the 5 criteria, the next critical priority is QUALITY Failure to meet contractual committed DPM will drive 2 actions: Immediate Exposure to the CEO of the chip manufacturer + Task force Temporarily lowering immediate purchase and choosing the other design win to SIGNAL the importance of Quality If DPM levels are not controlled and it becomes an ongoing issue than most probably it will affect the ability to win NEW design wins 7/1/2013 5

6 The need Handling potential escapes requires a comprehensive system which covers the end-to-end supply chain: Analysis and simulation tools to evaluate potential escapes and outlier algorithms on historical data Rule generation and publication processes to deploy escape prevention and outlier rules at test houses Execution of the escape prevention and outlier rules on OptimalTest's servers once testing is completed anywhere in the supply-chain Fully integrated and automated modification of inkless bin maps for assembly or in Final-Test anywhere in the supply-chain Monitoring and feedback tools to track the actual performance of the escape prevention and outlier detection 7/1/2013 6

7 Tight quality safety net The solution should be an Escape Prevention Solution (EPS) enables a tight safety net that becomes the escape gatekeeper in any of your testing operations The solution should offer Fabless or IDM Business-Units the ability to create & activate rules vis-à-vis their Foundry, OSAT or IDM Factory -The rules should be executed through a integrated supply chain infrastructure to provide full Quality & health control 7/1/2013 7

8 Some facts about OptimalTest Strategic supplier of top Fabless, IDM & OSAT #1 Fabless #2 Fabless #3 Fabless #4 Fabless #5 Fabless #5 IDM #3 OSAT Installed across whole world-wide Fabless/Foundry/OSAT supply chain at : ~3,300 testers - over 25M units run on OT per day ~10B per year. and growing 7/1/2013 8

9 Escape Prevention Solution OptimalTest s Escape Prevention Solution consist of the following elements: RMA database for thorough management of the escapes 3 families of Outlier Detection capabilities for Wafer Sort & Final Test: Parametric, Geographical & Cross-Operational OT-Detect: an excursion prevention system that automatically tracks after ALL your products for ANY changes in BASELINE production (HB, SB, Params) Dozens of unique algorithms that were created with blood following many escapes and thorough RMAs analysis OptimalTest is the only Outlier Detection provider that has an infrastructure embedded into ALL the Foundries & OSATs operation 7/1/2013 9

10 Wafer Sort - Outlier Detection Parametric & Geographic DPAT: "Dynamic Part Average Testing" NNR: "Nearest Neighbor Residual" is the best algorithm to use for avoiding yield overkill caused by Fab-related geographical differences It can also use "bivariate" tests - virtual tests created as a regression of the two real parametric tests. Z-PAT: "Z-Axis Part Average Testing" GDBN: "Good Die in Bad Neighborhood" Bad Reticule Detection: "Bad Reticule Detection" Zonal: Low yield zone based detection" 7/1/

11 Final Test - Parametric Outlier Detection OptimalTest s Outlier Detection for Final Test is based on 2 type of algorithms: 1) Post Final-Test operation and Based on Die-ID (ULT/OTP/ECID) a) Option a: Next Operation execution (i.e SLT or WH) b) Option b: FT-PAT operation (Short TP that reads only Die ID) 2) In real-time at Final-Test operation without Die-ID the downside of this method is the outlier baseline statistical size 7/1/

12 Cross Operational Outlier Detection Cross operational Quality based on Die-ID Contributing operations ETEST/PCM/WAT Wafer Sort Final-Test Burn-In System Level Test Example: E-Test based bin switching post WS The ability to identify potential bad devices based on E-test data geographical analysis The bin switching post wafer sort - Requires data feed forward within the supply chain. 7/1/

13 RMA Database The new RMA Database will provide detailed information about parts returned from customers. Data Entry: Users can identify parts by ECID and mark them as returned in the database, together with categorization data. Data Retrieval: The RMA database is searchable and is summarized in standard summary tables so that information about RMA s can be analyzed in OT-Portal. Historical Analysis: Lots containing parts which are returned are flagged in the database as unpurgable. It impacts all operations in which the part or wafer was tested. Cross operation reports can be used to analyze the cause of the failure. 7/1/

14 Example of Escape Prevention Rules Probe mark tracking The algorithm tracks probe marks per each die at wafer sort and compares with a spec value. The rule takes into account restests & multiple operations as well as hidden probe marks in parallel testing when dice are touched but not tested. Other rules: Good die/device with out of spec test results Failing tests in good parts PRR validation (Part Results Record) ULT validation Freeze detection Parametric trend Process capability (CPk) 7/1/

15 OptimalTest Escape Prevention Its time to check if good is really good? Thank you! 7/1/