Al 2 O 3 SiO 2 stack with enhanced reliability

Transcription

1 Al 2 O 3 SiO 2 stack with enhanced reliability M. Lisiansky, a A. Fenigstein, A. Heiman, Y. Raskin, and Y. Roizin Tower Semiconductor Ltd., P.O. Box 619, Migdal HaEmek 23105, Israel L. Bartholomew and J. Owyang Aviza Technology Inc., 440 Kings Village Road, Scotts Valley, California A. Gladkikh Wolfson Applied Material Research Center, Tel Aviv University, Tel Aviv 69978, Israel R. Brener, I. Geppert, E. Lyakin, B. Meyler, Y. Shnieder, S. Yofis, and M. Eizenberg Technion Israel Institute of Technology (Technion), Haifa 32000, Israel Received 16 July 2008; accepted 22 September 2008; published 9 February 2009 The authors developed a new Al 2 O 3 SiO 2 A-O stack for application as a high voltage complementary metal oxide semiconductor CMOS dielectric and/or top oxide in electrically erasable programmable read only memory floating gate and polysilicon-oxide-nitride-oxide-silicon embedded memories in advanced technology nodes. An amorphous atomic layer deposited alumina is doped with nitrogen and transformed into the crystalline phase by further rapid thermal process annealing. The 65 Å effective oxide thickness EOT stack allows operating voltages twice exceeding the values for thermal SiO 2 of the same EOT, has extremely low leakage currents, has negligible charge trapping, and is immune to degradation. Moreover, after alumina removal, the remaining strongly nitrided bottom oxide layer can be used as the gate dielectric of CMOS devices American Vacuum Society. DOI: / I. INTRODUCTION High-k materials have been widely employed in advanced complementary metal oxide semiconductor CMOS processes for aggressive scaling of the transistor gate dielectric effective oxide thickness. For a long time, high-k application was limited because of high local leakage currents, decreased mobility of channel electrons, strong charge trapping, and reliability problems. 1 The breakthrough was achieved after broad implementation of chemical vapor atomic layer deposition ALD technique. HfO 2 and its derivatives, ZrO 2, LnO 2,Al 2 O 3, and other oxide materials are extensively investigated. Alumina Al 2 O 3 having a relatively low dielectric constant k =8 10 is not considered as a candidate for silicon oxynitride substitution in advanced technologies nodes 65 nm and below but is one of the best candidates for replacing silicon dioxide in the next generations of floating gate FG and nitride based memory devices. 2,3 In addition to lower equivalent oxide thickness EOT, alumina provides efficient blocking of electron injection from the gate electrode, eliminating the erase saturation effect and thus increasing the erase efficiency. As demonstrated in our previous papers, 4,5 a special surface processing prior to Al 2 O 3 deposition combined with the postdeposition annealing PDA in special conditions allowed strong improvement of the nitride memory retention parameters. It was shown 6 that surface preparation of FG poly, is also critically important for alumina quality as an interpoly dielectric in FG memories. Al 2 O 3 is a friendly material in common CMOS technologies and does not require special front-end process lines for a Electronic mail: michaelx@towersemi.com its implementation. Several companies are already successfully using this material in electrically erasable programmable read only memory EEPROM devices. 7 In this article, we show that PDA similar to that reported before 4 but in combination with low-energy nitrogen doping of alumina further improves the alumina-oxide stack reliability. The obtained stack can be used as a high voltage CMOS dielectric in the embedded memory designs. Moreover, after alumina removal, the remaining strongly nitrided bottom oxide BOX layer is a promising gate dielectric in CMOS devices. II. EXPERIMENT Different alumina-oxide combinations on poly- and crystalline silicon were studied. The present article reports a structural and electrical study of the optimized A-O stack The 80 Å Al 2 O 3 films were deposited by ALD technique onto the 40 Å dry thermal BOX layers grown on p-si substrates by the reaction of trimethylaluminum TMA and ozone at 450 C in an Aviza Technology single wafer ALD system. The TMA was supplied to the reaction chamber by bubbling Ar carrier gas through the liquid held at a controlled temperature to maintain a fixed TMA vapor pressure. Ozone was generated in a remote unit by corona discharge at a controlled concentration of 180 g/m 3. TMA was injected first in a 0.2 s dose, followed by an Ar purge for 1.0 s; then O 3 was injected for 2.0 s to oxidize the precursor layer adsorbed on the surface, with another 2.0 s Ar purge before repeating the process cycle. Ar dilution gas was introduced in place of the chemicals during the purge cycles to maintain the same gas flow for a process pressure of 1.0 Torr in the chamber. The advantage of the ALD mode of deposition is the well-controlled thickness proportional to the number of 476 J. Vac. Sci. Technol. B 27 1, Jan/Feb /2009/27 1 /476/6/$ American Vacuum Society 476

2 477 Lisiansky et al.: Al 2 O 3 SiO 2 stack with enhanced reliability 477 FIG. 1. Optical thickness of alumina layer vs the number of process cycles; the typical thickness uniformity over a wafer is also denoted. deposition cycles. A plot of the optical thickness as measured on a KLA-Tencor F5x instrument versus the number of deposition cycles yields a growth rate of Å/cycle, as calculated by the slope of the curve in Fig. 1. The typical thickness uniformity for these process conditions was 1.0% sigma/mean or 2.0% range by 49-point, 3 mm edge exclusion on 200 mm wafers. After deposition the alumina layer was strongly doped with low energy nitrogen ions. After doping the dielectric stack was rapid thermal annealed in the N 2 /O 2 gas mixture at temperatures exceeding 830 C. 4 The reference dielectric stack without nitrogen doping but with the same PDA was produced to distinguish the effect of nitrogen in the modification of the A-O stack parameters The structural and chemical analysis of the as-grown alumina-oxide stack and its transformation induced by PDA was performed by using several characterization techniques. The properties of interfaces between the dielectric stack and metal or Si electrodes were controlled in parallel. Cross sections of multilayered structures were visualized using high resolution transmission electron microscopy HR TEM. The alumina film microstructure was controlled by atomic-force microscopy AFM in the contact mode. The alumina crystallographic structure was determined by x-ray diffraction XRD using a Cu K source. For identification of the chemical bonding of the nitrogen dopant, high-energy resolution x-ray photoelectron spectroscopy XPS measurements of the N 1s spectrum were performed with a monochromatized x-ray Al K ev source. All spectra were referenced to the Al 2p peak of alumina at 74.4 ev. XPS and auger electron spectroscopy in the depth profiling mode combined with time of flight secondary ion mass spectrometry TOF SIMS in front-side and back-side profiling modes were used for the analysis of the alumina film stoichiometry and chemical content of the whole dielectric stack. Electrical characterization was performed using Si-OAmetal capacitors with mm 2 electrodes. To increase the barrier height for electron injection into Al 2 O 3, a large work function metal Pt was used as the gate electrode FIG. 2. HR TEM image of A-O stack after PDA at T=950 C: a nitrogen doped stack; b reference undoped stack metal was sputtered through a shadow mask. Aluminum was sputtered at the back side of the Si wafer and served as the back contact. Charge to breakdown QBD and time to breakdown TDDB characteristics were measured to characterize the dielectric stack reliability. EOT, initial built-in charge, and trapping characteristics were extracted from the analysis of I-V and C-V characteristics. Mechanisms of carrier transport through the dielectric stack were analyzed using I-V characteristics measured at different temperatures. III. RESULTS AND DISCUSSION HR TEM images of the as-grown and annealed A-O stacks show that the PDA of nitrogen doped stack layer results in the densification of the amorphous alumina film from 80 to 68 Å; 15% thickness decrease at PDA temperature 950 C and its transformation into the crystalline phase Fig. 2 a. Crystallization and densification are observed also for the reference specimen that was not doped with nitrogen but underwent the same PDA procedure Fig. 2 b. The structure of the nitrogen doped and reference specimens have significant differences: 1 The interface with the BOX is abrupt while the thickness of the BOX does not change after annealing in the stack JVST B-Microelectronics and Nanometer Structures

3 478 Lisiansky et al.: Al 2 O 3 SiO 2 stack with enhanced reliability 478 FIG. 3. XRD spectra with diffraction peaks attributed to alumina hexagonal structure with nitrided alumina Fig. 2 a. On the contrary, an interfacial layer 1 nm is clearly seen in the reference stack while the total BOX thickness exceeds the 40 Å thickness of the initial BOX. This is consistent with the suppressed dopant diffusion through the nitrided poly-sio 2 boundary. 8 2 As was shown in our previous study, 4 the PDA of undoped alumina induces -Al 2 O 3 -like polymorph spinel, which is one of the alumina metastable crystalline phases. On the contrary, XRD pattern of the nitrogen doped alumina layer Fig. 3 corresponds to a thermodynamically stable -Al 2 O 3 polymorph corundum form, dominating in the crystalline structure of the alumina layer. Usually this phase forms at temperatures close to 1100 C. 9 Since our annealing temperature does not exceed 1000 C the difference may be attributed to nitrogen doping that stimulates -Al 2 O 3 polymorph formation at reduced temperatures. 10 AFM study shows an increase in the surface roughness after crystallization from 1.5 to 3 Å Fig. 4. Nevertheless, alumina roughness still remains at a very low level, indicating transformation of amorphous alumina into high quality texture. XPS analysis shows excellent stoichiometry of the asgrown ALD alumina layer with the Al/O ratio close to the ideal 2/ /59.89 at. % sapphire substrate was used as a reference in the XPS measurements. PDA of the reference stack generates deviation from this ideal stoichiometry chemical analysis shows the clear excess of metal in alumina layer, increasing with the PDA temperature. For the nitrogen doped samples the N 1s spectrum in amorphous alumina shows the presence of a well defined peak at ev which can be related either to molecular nitrogen or to nitrogen bonded to oxygen trapped at sites surrounded by oxygen atoms. No nitrogen signal was detected in the alumina layer after PDA probably due to nitrogen strong out-diffusion from alumina see below the results of TOF SIMS. TOF SIMS profiles of nitrogen in dielectric stack measured prior and after PDA are shown in Fig. 5 a. Prior to FIG. 4. AFM three dimensional images of alumina: a as deposited; b after annealing; 1 1 m 2 scanning scale. annealing nitrogen is concentrated in amorphous alumina curve 1 but in the process of crystallization a pronounced part of dopant out-diffuses to BOX and accumulates near the SiO 2 Si interface curves 2 4. The amount of nitrogen outdiffused from alumina into the BOX increases with PDA temperature and saturates at 950 C. In the saturation conditions the nitrogen concentration at the BOX interface with Si exceeds nearly tenfold the remaining nitrogen concentration in the alumina curve 4. To prove that the obtained data are not an artifact generated by atom mixing effect, we measured the nitrogen profile in BOX layer after alumina layer removal. The nitrogen profile measurements after alumina etch-off in orthophosphoric acid is shown in Fig. 5 b. The nitrogen profile in BOX has a maximum near the BOX-Si interface where nitrogen atomic content reaches 17%. We argue that the nitrogen peak at the SiO 2 Si interface exists already after PDA. Otherwise, the concentration of nitrogen at the BOX external surface should be larger than that at the SiO 2 Si interface in the beginning of the SIMS procedure for specimens with etched-off alumina. It can be concluded that the bottom oxide layer of the developed dielectric stack is an oxynitride layer. The XPS analysis of this oxynitride layer shows an1s peak at ev that can be assigned to nitrogen in the O N Si bonding configuration. Continuing to J. Vac. Sci. Technol. B, Vol. 27, No. 1, Jan/Feb 2009

4 479 Lisiansky et al.: Al 2 O 3 SiO 2 stack with enhanced reliability 479 FIG. 6. C-V characteristics 100 khz of the MOS capacitor with A-O dielectric stack and Pt gate electrode: 1 initial curve, 2 after negative stress at the gate electrode: 12 V, 1 s V t shift 50 mv. FIG. 5. Nitrogen concentration TOF SIMS in the A-O stack: a after nitrogen doping curve 1 and PDA at T 830 C curves 2 4 ; b in BOX after alumina removal analyze the SIMS results, it is important to mention at least a tenfold reduction in hydrogen concentration in the crystallized alumina. C-V curve of A-O stack after PDA at 950 C is shown in Fig. 6 curve 1. The EOT of the stack is 65 Å. No built-in charge was found in the stack. The following 12 V negative stress at the gate for 1 s results in a 50 mv shift of C-V, thus showing very low concentration of traps in the stack curves 1 and 2, respectively. The etch procedure of the alumina layer performed in the hot orthophosphoric acid exposes a BOX layer with 34 Å EOT. The capacitor structures were fabricated by sputtering of Pt electrodes through the same mask onto the surface of the exposed BOX. As mentioned above, the BOX was strongly nitrided dielectric constant k 4.6 though no nitrogen was introduced into SiO 2 only from the doped alumina. The k value is one of the highest known for intentionally nitrided gate oxides. 11 The I-V curves of the obtained BOX capacitors correspond to an order of magnitude smaller leakage compared with 32 Å pure oxide layer at V g =1.8 V for both polarities of voltage at the gate see Figs. 7 a and 7 b. This is consistent with the physical thickness of BOX 40 Å, which did not change after processing. Measurements at the positive gate polarity were accompanied by visible light illumination to generate electrons in the p-type substrate. The curve for the processed BOX in Fig. 7 b electron injection from the substrate is not only significantly shifted to higher voltages compared with the reference curves but also has a shape consistent with higher k values at the SiO 2 Si interface nitrogen peak in Fig. 5 b. In this case the value of the electrical field at the Si injecting electrode is lower so that the leakage currents are suppressed at voltages below 3.5 V. Figures 8 and 9 summarize the measurements of stack I-V characteristics in the C temperature range. The attempts to find a dominant conductivity mechanism by interpreting the results by Fowler Nordheim FN or Poole Frenkel PF models encounter difficulties. In the case of the FN mechanism Fig. 8 the experiment was fitted by suggesting that holes injected from the substrate dominated in the current through the dielectric stack. The expression for the FN current density I, I/E 2 = A exp G/E, 1 gives a reasonable fitting see Fig. 8 but with a preexponential factor A exp five orders of magnitude less than in the theory. 12 Here E is the electric field in the oxide and G is the exponential factor, not dependent on temperature. In our experiments, G=6.83 E6 m */m 0 b 3 V/cm was dependent on temperature see the graph of G versus reciprocal temperature 1/T at the inset of Fig. 7, similar to the results of Ref. 13. It is worthy to mention that the experimental value of G = 298 MV/ cm gives a very realistic product of m*/m 0 b 3 =19, where m*/m 0 is the effective mass of holes for tunneling and b is the hole barrier height. For the PF conductivity model Fig. 9 the theory describes the experimental data in the assumption that conduc- JVST B-Microelectronics and Nanometer Structures

5 480 Lisiansky et al.: Al 2 O 3 SiO 2 stack with enhanced reliability 480 FIG. 8. I E at different temperatures in FN coordinates: experimental points and fitting solid lines. Temperature dependence of the exponential factor see the inset G is close that given in Ref. 13 but the ratio of theory preexponential factor to experiment A th /A exp is FIG. 7. Comparison of leakage currents in alumina removed capacitor EOT 34 Å with the standard thermal gate oxide of the same EOT: a negative polarity on a gate; b positive polarity on a gate accompanied by a visible light illumination. gives the energy of electron traps in Al 2 O 3, q b = ev, which looks realistic. Nevertheless the temperature dependence of the I-V slope = q q/ 0 /kt see inset in Fig. 9 is far from the theory. Here q is the electron charge, 0 is the electric constant, and is the optical dielectric permittivity of alumina taken equal to the one of sapphire 3.2. Thus, we could not distinguish a dominant transport mechanism in A-O stack and had to assume that it was a combination of several known mechanisms working in different electrical fields and temperature ranges. Figure 10 shows the comparison of reliability tests of A-O stacks and 67 Å thermal oxides in the same experimental conditions. Since the transport mechanism was not finally revealed, the most conservative degradation acceleration scenario E model was used. Nevertheless, even in this case the value of V max 7.0 ev can be guaranteed for the developed A-O stack compared with 3.7 V for thermal gate oxide of the same EOT. The QBD of nitrided stacks increased up to 0.5 C/cm 2, which is approximately two orders of magnitude gain compared with QBDs for PDA processed reference stacks with the undoped alumina. tivity is defined by trapping in the alumina layer. The value of the electrical field in alumina E Al was estimated from the expression E Al =V G / d Al +d SiO2 Al / SiO2, where d Al is alumina thickness after PDA 68 Å, d SiO2 is the EOT of nitrided BOX 34 Å, and Al and SiO2 are the relative dielectric constants of alumina 9 and silicon dioxide 3.9, respectively. For the PF transport mechanism the expression I/E exp q b qe/ 0 /kt 2 FIG. 9. I E at different temperatures in PF coordinates: experimental points and fitting solid lines. The energy of traps b = ev in Al 2 O 3 looks realistic but the temperature dependence of I-V slope, see the inset, is far from theoretic predictions. J. Vac. Sci. Technol. B, Vol. 27, No. 1, Jan/Feb 2009

6 481 Lisiansky et al.: Al 2 O 3 SiO 2 stack with enhanced reliability 481 crystallization. Different applications including gate oxides with enhanced reliability and control gate dielectrics in flash memories are considered. ACKNOWLEDGMENTS The authors thank Axcelis Technologies, Inc. and S. Barusso for performing nitrogen doping. FIG. 10. Comparison of high voltage gate oxide 67 Å and A-O stack TDDB tests. The data were processed using the most conservative acceleration model E model. IV. CONCLUSION Outstanding reliability and degradation immunity performance of the specially processed alumina-sio 2 stacks intended for advanced CMOS technologies was demonstrated. The improvement is attributed to specific crystalline structure of the preliminary doped with nitrogen alumina film and strong in situ bottom oxide nitridation during the alumina 1 A. Toriumi and K. Kita, in Dielectric Films for Advanced Microelectronics, edited by M. Baklanov, M. Green, and K. Maex Wiley, Chippenham, UK, 2007, Chap. 7, pp C. H. Lee et al., IEEE NVSMW, Monterey, CA, February 2006, IEEE, New York, 2006, p T. Lee, C. Jang, B. Haselden, M. Dong, S. Park, L. Bartholomew, H. Chatham, and Y. Senzaki, J. Vac. Sci. Technol. B 22, M. Lisiansky et al., Appl. Phys. Lett. 89, Y. Roizin, E. Pikhay, M. Lisiansky, A. Heiman, E. Alon, E. Aloni, and A. Fenigstein, IEEE NVSMW, Monterey, CA, February 2006 IEEE, New York, 2006, p Y. Y. Chen, C. H. Chien, and J. C. Lou, Jpn. J. Appl. Phys., Part 1 44, J. R. Power et al., IEEE NVSMW, May 2008, Opio, France IEEE, New York, 2008, p T. Kuroi, S. Ueno, H. Oda, and S. Shimizu, U.S. Patent No. 6,521, I. Levin, Ph.D. thesis, Technion, C. Steiner, D. P. Hasselman, and R. M. Spriggs, J. Am. Ceram. Soc. 54, Y. Roizin and V. Gritsenko, in Dielectric Films for Advanced Microelectronics, edited by M. Balanov, M. Green, and K. Maex Wiley, Chippenham, UK, 2007, Chap. 6, pp S. M. Sze, Physics of Semiconductor Devices Wiley, New York, 1981, Chap. 7, p R. Moazzami and C. Hu, IEEE Electron Device Lett. 37, JVST B-Microelectronics and Nanometer Structures