Polycrystalline silicon thin film transistors

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1 Home Search Collections Journals About Contact us My IOPscience Polycrystalline silicon thin film transistors This article has been downloaded from IOPscience. Please scroll down to see the full text article Semicond. Sci. Technol ( View the table of contents for this issue, or go to the journal homepage for more Download details: IP Address: The article was downloaded on 27/05/2010 at 20:38 Please note that terms and conditions apply.

2 Semicond. Sci. Technol. 10 (1995) Printed in lhe UK I I TOPICAL REVIEW Polycrystalline silicon thin film I transistors S D Brotherton Philips Research Laboratories, Crossoak Lane, Redhill, Surrey, UK Received 15 July 1994, accepted for publication 20 February 1995 Abstract. During the past decade there has been a rapid growth of interest in poly-si for the active device layer in thin film transistors (TFTS) for active matrix flat-panel displays. Whilst the early work, demonstrating the high carrier mobility of these devices, employed processing temperatures of "C and quartz substrates, this was soon followed by the investigation of lower-temperature processes which were compatible with the use of glass substrates. Some of the key aspects of this work are reviewed in this article: the preparation of the material by direct deposition and by crystallization from a-si precursors, the characterization of the defect-induced trapping states within the material and their passivation, and the present understanding of the TFT leakage current mechanisms. This work is put into the context of the requirements for active matrix liquid-crystal displays, and, with the understanding and control of poly-si which has been achieved to date, its application in this area can be expected to increase rapidly in the coming years. 1. Introduction The growth of interest in polycrystalline silicon thin film transistors (poly-si ms) over the past decade has been stimulated by the rapid commercial development of active matrix-addressed flat-panel liquid-crystal displays (AMLCDS). Whilst the present first generation of AMLCDS predominantly rely upon a-si:h TFrs for the pixel switching device, the low electron field effect mobility (c 1 cm' v-' s-' ) a chieved ' with these devices limits the technology from being developed to form integrated drive circuits on the active matrix plate. The superior field effect mobility (> 100 cm2 V-I s-') achievable with poly-si TFTS is seen to be essential for the successful integration of row and column drive circuits on the active plate. The operation of the AMLCD and the mobility values required for the design of addressing circuits are briefly described in section 2. A variety of techniques have been investigated for the formation of poly-si: these include direct deposition of the material in the polycrystalline form as well as conversion from an amorphous precursor state by either solid-phase crystallization (SK)--or by laser crystallization. Whilst there is a high-temperature technology based upon the use of quartz substrates, the focus of this review is on film processing at a sufficiently low temperature (c 630 "C) to permit the use of inexpensive glass substrates. The main features of this work are reviewed in section 4. Polycrystalline silicon is rich in grain boundary defects as well as intragrain defects, and the electrical activity of these charge-trapping centres profoundly affects the TF~ 026&1242/95/ i8$ IOP Publishing Ltd characteristics. The techniques employed to characterize these defects and the energy dishibution of the trapping states are discussed in section 5. As a result of the high density of trapping states in poly-si it has been found necessary to passivate them with hydrogen. This is a key process in the fabrication of poly-si TFTs and hydrogen diffusion in this highly defected material is found to be significantly retarded by the presence of the states to be passivated. The present understanding of this process is discussed in section 6, and is shown to be consistent with the trapping-dominated diffusion identified in the more rigorously studied singlecrystal silicon. For pixel ms, it is essential to maintain a low leakage current in the off-state. However, off-state currents in poly-si devices have been found to increase exponentially with both gate and drain bias. These results, which have been attributed to field-enhanced tunnelling-dominated generation mechanisms are reviewed in section Active matrix-addressed flat-panel displays The essential features of a twisted nematic liquid-crystal display and the incorporation of this principle into an active matrix-addressed pixel are shown in figures 1 and 2 respectively. As shown in figure 1, the liquid crystal is sandwiched between two glass plates coated with transparent conducting electrodes (usually indium tin oxide), with the glass cell itself between two polarizing plates. The first plate determines the polarization of the light entering the cell; the bias across the liquidcrystal material is used to determine the polarization of 72 1

3 S D Brotherlon Figure 1. Schematic illustration of the voltage-controlled optical transmission of a twisted nematic liquid-crystal cell. Figure 3. Approximate calculated relationship between electron field effect mobility and circuit speed for a device with a 6 wm channel length. typically in excess of lo5 [4], with the absolute values of current determined by the size of the pixel and hence its capacitance. In order to drive the AMLCDs, it is necessary to make contact to each of the row and column connections, which for a 575 row x 720 column full resolution TV display amounts to 1295 external connections. It will be appreciated that the total external connection count is very much less than the total pixel count of The present Figure 2. Schematic illustration of an active procedure for making these connections is by mounting matrix-addressed liquid-crystal cell. silicon integrated circuits around the edge of the display. This adds to the cost of the display manufacturing process the light leaving the cell, and hence the amount of light and a more satisfactory approach would be to fabricate the transmitted by the second polarizer. The two extreme addressing circuits on the plate whilst making the pixel states of white and black are shown in figure 1, and array. Complete integration would reduce the total number for intermediate voltages there will be a fraction of of external connections from to -20, where the the incident light transmitted giving grey levels. The latter will consist of power, clock and input data signal liquid-crystal/polariizer arrangement thus acts as a voltage- lines. The important consideration for achieving this is controlled light modulator. The active matrix-addressed the relationship between carrier mobility and circuit speed. cell is shown in figure 2 in which a thin film transistor on An approximate calculated relationship, for 6 wm channel the lower glass plate is used to control the voltage across a length devices, is shown for illustration purposes in figure small area of liquid-crystal material, defined by the size of 3. Indicated on this diagram are the operating frequencies the transparent pixel electrode, In order to achieve colour of the row driver and column drive circuits. The row displays a matrix of red, green and blue coloured filters scanning circuit will need to operate at the TV line rate are aligned on the top plate for direct view displays [l, 21; of 15 khz (or 30 khz where line inversion is used [5]), for projection displays [3], the light is split into the three and the column addressing circuitry at the TV data rate primary colours by dichroic cells in the projector system, of about 10 MHz. To achieve circuit operation at these and a separate monochrome AMLCD panel is used for each speeds, assuming a device channel length of 6 pm, requires colour, with the three colours finally being brought back a carrier mobility of > 0.2 cmz V-' s-' f or the row drive into convergence prior to the projection lens. circuit and > 100 cmz V-' s-i f or the data drive circuit. The voltage on the pixel electrode, which controls the Devices with mobility values lower than the latter value can optical transmission of the pixel, is provided by a line-at- still be used by demultiplexing the video data into blocks a-time addressing mode. A row of TITS, with a common of sampling TFTS [6]. This approach results in a trade-off gate electrode, would be turned on for a TV line duration between circuit speed and the number of input connections. of 32 p, during which time the capacitance of the pixel Whilst a-si:h is able to satisfy the mobility will need to charge to the TV data voltage appearing on the requirements for the row drive circuits it will be unable to source of the TIT. Following this, the gate will be switched do so for the column drive circuits. Moreover, due to the off and the next row switched on, and the charges on the low mobility of a-si:h it is difficult to design compact, areapixels in the first row will need to be maintained until they efficient circuits to charge the large row capacitances. It is are refreshed in the next frame 20 ms later. These two the ability to fabricate integrated drive circuits [2] which conditions of charging the node capacitance during the TV has stimulated the initial interest in poly-si for active matrix line time and maintaining the charge during the TV frame displays. Details of circuit design are beyond the scope of time dictate the minimum necessary current ratio of the this review, but many of the essential considerations have TFT in its on and off states, respectively. The ratio is been discussed by a number of authors [&Ill. 722

4 Polycrystalline silicon thin film transistors I Substrate C) Substrate 4 G Substrate Figure 4. Cross sections of various poly-si TFI architectures: (a) autoregistered, (b) top gated staggered [is], (c) coplanar channel etched [191 ana (U) inverted staggered [20]. For WDTV displays, in which the number of rows and columns are expected to double, even higher operating speeds with be required. For these displays, as well as for electronic workstations, the reduced addressing times will impose a greater demand upon the pixel TFT to supply sufficient on-current to charge the pixel capacitance. These issues have been discussed by Bruce et a1 [12], and their estimations of the drive voltages necessary to meet the pixel charging time constraints indicate that poly-si TFTs may be essential for the pixel TFT, as well as providing drive circuits, in future displays. 3. TFT structure The most commonly used structure, especially for furnaceprocessed devices, is shown in figure 4(a). This is an autoregistered device and is similar in design to standard single-crystal MOS and SOI devices. Ion implantation is used to dope the auto-registered source, drain and gate regions. The process employs four masks and requires two poly-si depositions for the active layer, poly I, and for the gate layer, poly 11, with an intervening low-temperature oxide deposition for the gate dielectric. A variety of procedures, including APCVD, PECVD and LPCVD, have been successfully used for this layer. With suitable annealing at temperatures of "C plus an MOS wet bake, interface state densities and fixed charge densities of - 5 x 10" cm-* ev-' and (2-3) x 10'' cm-i respectively have been obtained [13]. Canier trapping instabilities have been observed in all these films [I41 and interest has grown in the use of lower-temperature denser oxides obtained by electron cyclotron resonance (Ea) plasma [I51 and remote, heliumdiluted plasma oxides [16, 171. The details of the poly-si deposition and crystallization techniques are discussed in section 4. The four mask stages in the fabrication of the 1 F49/B1 L \ w,,,,, Figure 5. TFT transfer characteristics measured on the following structures: (a) autoregistered TFT with SPC poly-si, (b) coplanar channel-etched TFT with laser crystallized poly-si. structure shown in figure 4(n) are the definition of poly I, definition of poly II, opening of contact windows, and definition of the aluminium contact pattern. A wider variety of device designs has been used for the laser-crystallized devices, largely because this technology 723

5 S D Brotherton was initially seen as a process addition to a-si:h ms. These are non-implanted devices and the source and the drain regions have generally been formed from doped deposited layers. Structures commonly employed are shown in figures 4(b), 4(c) and 4(4: these are top gated staggered [18], channel etched coplanar [19] and inverted staggered [20], respectively. An important difference between them and the device in figure 4(a) is the absence of gate-drain autoregistration; the extra capacitance associated with the overlap of these regions will deleteriously affect circuit performance. However, with the development of large-area ion shower doping [211, and the incorporation of this process into large area a-si based technology I221, the fabrication of laser-crystallized autoregistered devices, using an a-si-compatible technology, is technically and commercially feasible. As with the structure in figure 4(a), the devices in figures 4(b)-(d) also require a four-mask process. The device characteristics obtainable with the different structures and processes are broadly similar, as shown by the transfer characteristics in figure 5. A principal difference between the two structures is the larger oncurrent with the laser-crystallized device due to its higher electron field effect mobility. Aspects of the device characteristics, including subthreshold slope, mobility and leakage current mechanisms, are discussed in the following sections. 4. Poly-Si deposition and crystallization The principal technique for the deposition of poly-si is by low-pressure chemical vapour deposition [23] (LPCVD) using silane in nitrogen carrier gas. Practical deposition rates of 1-10 nm min-l are obtained over the temperature range "C. For typical silane pressures of mtorr, films will be deposited at the upper temperature in a fine grain columnar form. The grain size is typically 100 nm and with a preferred (110) orientation. At the lower temperatures the films are more likely to be amorphous, but the precise structure of the film depends upon both pressure and temperature, as shown by the results of Joubert et at [24] in figure 6. This work has been extended by Voutsas and Hatalis [25], who demonstrated that the variation of crystallinity with system pressure and silane partial pressure could be more generally described by the alternative parameter of film deposition rate. At a more detailed level, the final grain size in columnar films was also shown to be dependent upon the deposition rate. This was explained in terms of the silicon adatom diffusion length during the time taken to grow a further monolayer, which then immobilized the adatom. There is also interest in the use of disilane [26], rather than silane, because of its higher deposition rate (or lower deposition temperature for a given rate). Films deposited in the amorphous state and then crystallized into poly-si have been shown to have higher carrier mobilities [27] due to the larger grain size compared with films deposited in the polycrystalline state. The use of amorphous films as precursor material has meant that large-area plasma-enhanced (PE) CVD is also used Temperature ("C) Figure 6. Interrelationship between the structure of Si thin films and the deposition temperature and partial pressure of silane (taken from Joubert eta/ 1241). [13]. Crystallization of the amorphous material is achieved either by solid-phase crystallization (SPC) at temperatures of -600 "C or by the use of a laser. The important features of these different approaches are summarized below Deposited poly-si Directly deposited columnar poly-si was the material of initial interest in this area 121, but the small grain size of nm limited the electron field effect mobility to values of - 5 cmz V-' s-i 113, 271. It has been demonstrated by Meakin et al 1281 that deposition at a reduced pressure of c 10 mtorr at 630 "C can yield larger-grain material, with fewer intragrain defects and a higher field effect mobility of - 10 cm2 V-I s-l. The interrelationship between silane pressure, growth mechanism grain structure and surface morphology has been comprehensively studied [29, 301. In the lower-pressure regime (c 10 mtorr), the large high-quality grains are only obtained in films thicker than j" which, as shown below, is likely to result in large m off-currents. In addition, these large-grained films also show considerable surface roughness which has been demonstrated to degrade carrier mobility 1311 as well as the long-term stability of the devices [14]. Although this work has considerably increased the understanding of the grain growth mechanisms, the film roughness has limited its application. As is apparent from figure 6, crystallinity can be maintained at reduced deposition temperatures by lowering the silane pressure. This has been demonstrated by Miyasaka et al [32] using ultra-low-pressure CVD (< 1 mtorr) at 555 "C to obtain directly deposited poly- Si. Although the electron field effect mobility was only 4.7 cmz V-I S-I, theon:off current ratio for a m fabricated in a 20 nm thick film was 7.7 orders of magnitude. In spite 724

6 Polycrystalline silicon thin film transistors Figure 7. Relationship between Si deposition temperature and electron field effect mobility following solid-phase crystallization (taken from Mimura et a/ [27]). -. lrlll Figure 8. TEM micrograph of solid-phase crystallized Dolv-Si. showino the characteristic dendritic main stnnttirr?~ of the low mobility, the achievement of poly-si deposition at such a low temperature eases the problems of using glass substrates. The ideal glass-compatible process would yield highcarrier-mobility poly-si with uniform characteristics over a large area at deposition temperatures considerably below those reported above. Whilst this has yet to be reliably achieved, there are reports of direct poly-si deposition at temperatures of "C, using either hot wire 'catalytic' deposition [33] or 13.6 MHz PECVD deposition from a silane and tetrafluorosilane (SiF4) gas mixture [34]. In the former case, a Hall effect mobility of 130 cm2 V-' s-l w as reported, and with the latter material ms were fabricated with an electron field effect mobility of 60 cm2 V-' SKI. If these, or related techniques, can be demonstrated over large areas they will be of considerable importance Solid-phase crystallized (SPC) amorphous silicon Although solid-phase crystallization of amorphous silicon films had been studied by Koster [35] in 1978 in the context of solar cell work, the interest in the technique for TFT work was stimulated by the work of several authors [27, 36-39] showing that the larger final grain size, compared with columnar poly-si, resulte,j in a higher electron field effect mobility, This is illustrated by the results in figure 7 showing the variation in carrier mobility with film deposition temperature [27]. For films deposited at temperatures below 600 "C, thermal crystallization for 20 h at,500 oc was rquired to COnvert them into their final polycrystalline form. ne grains resulting from this process are generally elliptical in shape (see figure 8) due to preferential growth in the (112) direction [40], and dendritic due to the formation of twins along (111) boundaries. Grain size dimensions in excess of 1 Fm have bee,, obtained by this technique, D~~ to the low temperatures used (in order to keep the process compatible with the use of glass substrates) long crystallization times of several hours are necessary [27, 36-39]. The crystalline fraction (x) as a function of anneal time has been described by the Avrami- Johnson-Mehl equation [36, 411 x(t) = 1 - exp[-(t - to) 3 /r:] (4.1) Figure 9. Crystalline fraction of amorphized Si films as a function of crystallization temperature and time. The full curves are derived from the AvramMohnson-Mehl relationship (taken from lverson and Reif [4,1), where to is a transient time before the onset of nucleation and rc. the characteristic crystallization time, is given by rc = ( ~xv~dr.)- (4.2) where V, is the grain growth velocity, r. is the nucleation rate per unit amorphous volume and d is the film thickness. The results in figure 9 illustrate the fit of this model to experimenta1 data L411. An extensive review of the crystallization of poly-si has been published by Hil1 and Jones [421. As a result of the work shown in figure 7, the preferred deposition temperature for amorphous LPCVD films is -540 "C. The dependence of electron field effect 1/3 725

7 S D Brotherton h L c a, lot D 3 0; LL Poly-Si film thickness (urn) Figure 10. Variation of electron field effect mobility with poly-si film thickness, following SPC of LPCVD a-si (taken from Brotherton [43]). mobility upon grain size is further demonstrated by the results in figure 10 showing the variation of mobility with film thickness [43]. Grain size has been reported to increase with film thickness [36] in crystallized amorphous LPCVD silicon, probably due to grain nucleation occurring at the back of the film [44]. In addition to the use of LKVD a-si precursor material, similar results have been obtained from use of PECVD a- Si:H deposited at significantly lower temperatures, such as 250 "C [13, 371. This exploits the use of largearea deposition equipment available for a-si:h ms and also benefits from the higher deposition rates achievable with this technique compared with LPCVD a-si (typically hundreds of angstroms per minute and tens of angstroms per minute respectively). Large dendritic grains are obtained after SPC; the major difference from the LPCVD a-si being a longer regrowth time due to a combination of a lower degree of inherent structural order in the film (due to the lower deposition temperature) and to the effect of the higher impurity density found in PECVD material [45]. An alternative to the use of deposited amorphous material was the amorphization of columnar poly-si by a high-dose silicon implant Two dose regimes were identified [47]: a moderate dose range of (2-5) x IOt5 in which the film was incompletely amorphized and the few remaining crystallites of the original film seeded the regrowth during the subsequent SPC. These films tended to have the preferred orientation of the starting film. At higher doses (> 5 x IOI5 cm-*) the film was completely amorphized and larger dendritic grains resulted from SPC. Interest has recently developed in the use of disilane [48-501, rather than silane, for the deposition of amorphous films. This is largely due to the greater film growth rates achievable, which has been exploited by reducing the deposition temperature by up to 100 "C to 450 "C, whilst still maintaining the deposition rate achieved with Si& at 550 "C. The reduced deposition temperature produced a greater degree of structural disorder in the starting amorphous Si, which resulted in a low grain nucleation rate and a large final grain size, following SPC at 600 "C. As with a-si deposition from Sibtr, structural order in the film was not only determined by the deposition temperature but by the growth rate at a given temperature [50]. Grain sizes up to 5 $m have been reported [48], whereas with Si& the maximum grain size has generally been less than 1 pm. A very high electron field effect mobility of 120 cmz V-' s-' [48] has been obtained from a 350 nm thick SizH6 film grown at 470 "C and crystallized at 600 "C. However, the impact of such large grain films on device uniformity has not been reported, nor has the influence of such a thick film on the device leakage current been discussed. One of the practical limitations to the SPC process at -600 "C has been the long thermal anneal cycles necessary for the regrowth of the films. These have ranged from a few hours for SiH4 films deposited at 550 "C to approximately 24 h for both Si& films deposited at 470 "C [48] and PECVD films deposited at 250 "C [13]. A number of techniques have been reported which could reduce this cycle time: these have principally been by the use of higher temperatures in a rapid thermal annealing cycle [51-53] or by the use of seeding structures within the films [54-57]. The latter approach has used thin metallic films such as Pd [54], Ni [55] or Au 1561 on the glass surface prior to the a-si deposition or mixed-phase films, containing crystalline regions in an amorphous matrix, capped by a fully amorphous layer [57]. The amorphous fraction in the stratified, mixed-phase films (571 was controlled by the Si deposition rate at 560 C and, due to regrowth being seeded by the grains in the lower portion of the film, film regrowth was completed in 12 h at 550 OC yielding dendritic grains nm long and an electron field effect mobility of 20 cm2 V-' s-i. This seeded structure resulted in a three to fourfold reduction of regrowth time, and permitted crystallization at a temperature consistent with the use of cheaper glass substrates, such as Corning Whilst the use of metal films has been demonstrated to lead to reduced crystallization temperatures and large grain formation there is a serious issue, from a TFT view point, of film contamination by either the metal itself or the metal silicide. However, TFT operation has been reported in PECVD films, in which the crystallization time was reduced to 2 b at 600 "C by the use of an ultra-thin (c 1 nm) Pd seeding layer at the back of the film [54]. An electron field effect mobility of 20 cm2 V-' s-' was reported, and a leakage current of 5 x A pm-' of channel width. Whilst the leakage current is encouragingly low, for some applications, such as projection, it would need to be about ten times lower. The extent to which the Pd is affecting the leakage current would need to be established for this technique to find widespread use. The rather less novel approach has employed rapid thermal annealing (RTA) in which the a-si layers can be heated for easily controlled short periods of time by direct coupling of radiant energy into the films by optical absorption; this technique has been recently reviewed by Fair [52]. Due to the low absorption coefficient of Si at wavelengths longer than 800 nm, and the thin films involved, the preferred approach has modified the normal single crystal Si tungsten halogen lamp system (Ape* = lo3 nm) to incorporate focusing reflectors on both sides of the glass plate to improve the optical coupling efficiency [52, 581, or shorter-wavelength xenon arc lamps (he* = 500 nm) have been used [52,59]. Successful crystallization 726

8 Polycrystalline silicon thin film transistors Figure 11. Cross section TEM micrograph of laser-crystallized poly-si obtained from a-si:h precursor material [19]. of PECVD a-si has been reported following 5 min annealing at 700 "C using a tungsten halogen lamp [51]. Dendritic grains up to 500 nm long were produced and electron field diffusion equation [67] through the film depth (z): at 1 a a - = -- (ke) + -l(z,t) (4.3) mobilities of - 60 cm2 V-' s-' were reported. Shorter at ecpaz ec, exposure "Ines Of I6O ms have been repofled using the xenon arc lamp systems [521, again with dendritic grains about 500 nm long. An important issue with these highertemperature SPC techniques is the impact upon the glass substrate, in terms of its distortion or compaction. To date there has been little discussion of this point, apart from the work of plkvert et al [581 who showe,j that by controlling the glass cooling rate after the RTA process mechanical changes to the glass substrate could be minimized Laser-crystallized amorphous silicon where e is the density of the film, C, is the specific heat, k is the thermal conductivi[y, a is the optical absorption coefficient, I(z) is the optical power density and I(z) = lo(l - R)exp(-az) (4.4) where lo is the incident power density and R is the surface reflection coefficient. The approximate analytical solution to this equation [67], in the special case of temperature-independent material constants and where the thermal diffusion length, is greater than the optical absorption depth, U-', is a, The most commonly reported laser crystallization technique 210(1 - R)&. z of a-si on glass has been with rare-gas halogen excimer T(z, t) = ierfc- (4.5) k 2L lasers [18-20, 6CUj21. The standard gas mixtures and and output wavelengths are ArF (I93 nm), KrF (248 nm) and k XeCl (308 nm). These are all short-duration pulsed lasers D=-. (4.6) ecp (10-30 ns) operating in the ultraviolet waveband and have been found to be well suited to the crystallization of silicon Taking Eo on glass. This is because the optical absorption depth, at lo = - (4.7) T these wavelengths, in amorphous silicon, is about 6 nm [63], such that the radiation is strongly absorbed in the (where Eo is the incident energy density on the sample and silicon surface and can readily cause melting, whilst the r is the pulse duration) the surface temperature at the end Of short pulse duration results in a correspondingly small the pulse is given by heat diffusion length of -100 nm in the silicon itself 2Eo(l - R) [63] and -200 nm in films of Si02 [a] which can he T(0, r) = (4.8) J;rec,JiX' used to cap the glass substrate and thereby protect it from excessive temperature excursions. Measurements 1651 and Hence, the threshold energy, ET, to raise the film surface calculations [65, 661 have demonstrated that with suitable to its melt temperature, Tm, is given by Si02 film capping the temperature of the underlying glass surface can be kept below -400 "C. (Tm- To)&eCpfi ET = (4.9) Typical grain structure observed in cross section 2(1 - R) transmission electron microscopy after laser crystallization is shown in figure 11 for a-si:h precursor material [191. ne depth of the larger%rain Inaterial On the surface is believed to be related to the primary melt depth produced by the laser irradiation. The threshold energy for melting the film can be estimated from the solution of the heat To cause a phase change from solid to liquid, the latent heat of melting, H, also needs to be accounted for. Thus to melt a thin layer of depth clz, the incident energy required is E-ET+ HA2 e(1 -RI' (4.10) 727

9 S D Brotherton Table 1. Optical and thermal constants of a-si 1631 and c-si [68]. Rat lfcr at T,, e c, k H 248 nm 248 nm (K) (g cmn3) (J g-' K-') (W cm-' K-') (J g-') (nm) a-si f x 1282f70 c-si f o ~ ~ Where possible, the values quoted are those at temperatures near the melt temperature. The quoted optical and thermal constants for a-si [63] (and also for crystalline Si [68] for comparison) are given in table 1. Using the values from table 1 in equation (4.9), the energy threshold for melting a-si is 82 mj c d for a 30 ns pulse (the corresponding value for crystalline Si is 470 mj These values are comparable to the numerical simulations of Unamuno and Fogarassy In view of the simplifications involved in deriving the analytical expression, the agreement with experimentally quoted threshold energies, which fall within the range 1002~30 mj [19,66,70,71], is quite good. Although there is a clustering of the experimental results, they do cover an appreciable range of energies. There are several reasons for this: firstly, as shown by equation (4.9). the threshold energy is a function of pulse duration and this will vary with different gas mixtures and is rarely quoted. Secondly, the hydrogen content of the material affects the threshold energy [19]; thirdly, for non-homogenized, semi-gaussian beams the technique for defining the quoted energies is often ill defined, and finally the value has been found to vary with both pulse shape and scanning mode and the total number of pulses Equation (4.9) was introduced to give a simple physical insight into the parameters involved in determining the temperature in pulsed-laser-heated material. A fuller exploration of the time and depth-dependent temperature profiles has been obtained from the numerical solution of equation (4.3) [66, 69, 731. These papers have modelled both the heating and cooling of films, but have not treated the crystallization behaviour of the material during the solidification phase, i.e. whether the material is amorphous or has a crystalline structure. Although this has not been done for thin films on insulating substrates, Wood and Geist [74] have developed a computational model which they have applied to laser-irradiated amorphized layers on single-crystal silicon substrates. The cross section "EM micrograph in figure shows the grain structure in a 150 nm thick film of KIF excimer laser-crystallized a-si:h. The film is clearly stratified with a large-grain surface layer and a finegrain underlying layer. A similar structure has been reported by other workers for both a-si:h precursor material [71, 721 and for low hydrogen content LPCVD a-si The stratification is strikingly similar to that seen, and more extensively studied, in laser-crystallized layer?. of preamorphized singlecrystal silicon [75, 761. From in situ reflectance measurements 1771 the stratification was interpreted in terms of the primary melt depth causing the large-grain material, whilst an explosively propagating buried molten layer resulted in the fine-grain material. The difference in the latent heats and melting temperatures of amorphous and crystalline Si (see table 1) meant that the crystallization of the primary melted region resulted in the local melting of the underlying amorphous material. This thin supercooled region is highly unstable, and on solidifying caused downwards propagation of the molten layer at a velocity of m s-'. The rapid cooling of the buried molten layer resulted in the finegrain structure. The same mechanism is likely to be occurring in the thin amorphous silicon layers being crystallized on glass substrates. The interest in laser crystallization of a-si from the poly-si m standpoint is because it has been found that high field effect mobilities (> 100 cm2 V-' s-i) can be obtained (see table 2). By and large, these mobility values are greater than those obtained by solid-phase crystallization of a-si, discussed in section 4.2, in spite of the grain size generally being smaller (100 nm for laser crystallization). The apparent inconsistency is believed to result from the difference in grain quality between the two processes. The laser-crystallized material has few line or plane defects within the grains, whereas the SPC material consists of large dendritic grains which are rich in intragrain defects such as twins, microtwins, stacking faults etc. Apart from these potential scattering centres, the grain boundaries themselves may be different, but detailed high-resolution electron microscopy is needed to clarify these differences. The electron field effect mobility is generally found to increase with laser energy, partly due to the increased depth of the largegrain surface layer to a value such that the band bending necessary for surface inversion can be accommodated within this layer [19], and beyond this point due to the increase in lateral grain size [72]. For a-si:h films, the depth of the large-grain layer is - 50;t IO nm [ 19, 711, but considerably greater depths (>lo0 nm) have been reported with hydrogen-free LPCVD a-si 166,721. For films thinner than these values a non-stratified, homogeneous grain structure can be obtained. With LPCVD a-si films which can be fully melted, a complex dependence of lateral grain size on incident energy density has been reported by Im et nl [80]. For low energy densities, not sufficient to melt the film, the lateral grain size was comparable to the melt depth, but within a small energy range for which the films were almost completely melted there was a large increase in lateral grain size (up to -500 nm). This was explained as arising from growth seeded by small, discrete islands of unmelted Si. For higher energies, resulting in complete film melting, fine-grain films were once again obtained. 728

10 ~~ ~ Polycrystalline silicon thin film transistors Table 2. n-channel m parameters obtain by excimer laser crystallization of amorphous silicon.!j Vr S h Reference Starting material (cm2 V-' s-' ) (V) Ndecade-') (Apm-') Brotherton e? a/ [19] Chen et a/ [79] Fogarassy et a/ 1701 Kuriyama et a/ [73] Sameshima [781 Sera et a/ nm a-si:h x nm a-si TSUb = 360 "C 200 nm a-si nm a-sih x c550 "C anneal, TS"b = 400 "C 20 nm a-si:h nm a-skh x A further artefact of high incident energies on thin films (40 nm) has been the solidification of the films into an amorphous form [81]. The formation of an amorphous, rather than polycrystalline, phase has been observed under conditions of complete and long-duration melt periods [78, 811 and numerical modelling has indicated that the temperature gradient through the film decreases with the melt duration. It was suggested that for temperature gradients of < 1 x lo5 K cm-' homogeneous cooling of the film occurs into the amorphous phase, in contrast to the interface-controlled solidification at larger temperature gradients which leads to polycrystalline film formation As referred to above, polycrystalline films are expected to result from interface-controlled growth in which the solidniquid interface velocity plays a key role in determining grain structure in the phase transformation from the high-energy liquid state to the low-energy crystalline state. Reduction of the interface velocity has been suggested as a means of enhancing grain size, and this has been achieved by the use of substrate heating during laser crystallization [73]. Thermal modelling showed that a reduction of up to a factor of three in the liquiflsolid interface velocity (from 1.09 to 0.32 m s-') could be achieved by heating the substrate to 400 "C. The experimental results confirmed the importance of controlling the interface velccity. Comparing substrate temperatures of 25 "C and 400 "C, a grain size enhancement from cl00 nm to more than 500 nm was obtained in 50 nm thick films, and the electron field effect mobility in ms increased from 150 cm2 V-I s-' to 250 cm2 V-' s-' V31. Whilst table 2 summarized some of the larger electron mobility values obtained from laser-crystallized poly-si, it also shows a considerable variation in the values of leakage current obtained. The lower values were obtained either from hydrogen-free LPCVD a-si [70, 791 or from the very thin a-si:h film [781. It is clear from this that further understanding of the process is required for the full control of all m parameters. 5. Trapping state distributions The TFT transfer characteristics shown in figure 5 have subthreshold slopes of V decade-' and these values are a direct indication of the fixed charge density in the surface space charge layer as the energy bands are bent towards electron accumulation. For a single-crystal ~~OSFET, the relationship between space charge density (in this case, substrate doping density) and subthreshold slope, S, is given by [82] where Cox is the gate oxide capacitancehit area and C, is the space charge capacitancehit area, which is related to the space charge density, N,,, by the depletion approximation (5.2) where V, is the band bending. Thus the subthreshold slope will increase with the square root of the space charge density. For a MOSF@T device, with a substrate doping density of 10l6 ~ m-~, a subthreshold slope of 0.16 V decade-' would be expected for a gate oxide thickness of 150 nm. This is considerably less than measured in poly-si ms and is indicative of considerably higher space charge densities of '* cm-3 in poly-si. The high space charge density arises from trapping states at grain boundaries and at intragrain defects. The arguments above are merely illustrative of the order of magnitude effects observed in poly-si, and do not represent a rigorous analysis. To do the latter, the energy distribution of deep-lying trapping states has to be known and allowed for in the solution of Poisson's equation where (5.3) e = -n- + p+ + N: - N I - NT;\ + N:D (5.4) and NT;\ and N& are the charged densities of acceptor and donor trapping states at the particular value of band bending, V. These values are related to the energy distribution of the states, NTA(E) and NTD(E), by the integration of 729

11 S D Brotherton per ev measured at the band edges. For instance, the trap distribution extracted from a poly-si m by Hack era[ [87] could be represented by E-EFO(eV) Figure 12. Trapping state distribution, Ng ( ~m-~ ev-'), across the upper half of the forbidden bandgap, derived from a field effect analysis of the TFT transfer characteristic. (60 is the Fermi level position in the bulk of the film and is close to mid-gap): A, 0.6 prn poly-si; 8, 1.5 pm poly-si: C, A after hydrogenation (taken from Fortunato and Migliorato [83]). their product with the Fermi occupancy function across the bandgap, i.e. NT(E) = 2 x 10" exp -- ( 1:Ok) exp ( -- 2oEofi) cm-3 ev-1 (5.7) In analogy with a-si analyses 1901, the two distributions have been ascribed to deep states and band tail states, where the former are associated with dangling bonds at grain boundaries and the latter with disorder-induced states arising from features such as microtwins As discussed in section 4, the deposition and crystallization conditions used for the formation of poly- Si have a major effect upon its electrical properties and the values of NTI, NTZ, Z and will vary accordingly; the values quoted in equation (5.7) are therefore not representative of poly-si in general. The large volume densities of trapping states distributed through the bandgap can have a significant effect upon the value of threshold voltage, its definition [89] and the value of field effect mobility [90]. In these respects, the poly-si TFT is significantly different in its behaviour from its singlecrystal counterpart. This can be most readily appreciated by a comparison of the analytical surface space charge density in the two cases. Equation (5.3) can be integrated with respect to V, by making the standard replacement of and noting that the surface field In general, Poisson's equation has to be solved numerically and simple expressions such as equation (5.1) are not obtained. The trapping state distributions, NT(E), for different poly-si films have been obtained by Fortunato and Migliorato [83] using a field effect analysis of the m transfer characteristics based upon the technique employed for the analysis of a-si:h TITS [84, 851. A continuous distribution of trapping states was found as shown by the data in figure 12 [831. The high volume densities, of the same order as indicated by equation (5.1), will be noted. Comparable distributions, which are continuous across the bandgap and rising towards the band edges, have been reported by other workers using deep-level cument transient spectroscopy [86], numerical simulation of the TFT characteristics I871 and transient photoconductivity measurements [88]. In a number of analyses [83, 87, 891 it has been found convenient to treat the trap distribution as an exponential or the sum of two exponentials: where Q, is the total charge density (free plus fixed) in the semiconductor surface. For an n-channel single-crystal silicon device, the only terms in equation (5.3) will be n and NA. For the poly-si device we will restrict the solution to n and NTA(E) where NTA(E) = NT exp -- ( k 3 and assume that due to charge trapping effects the equilibrium Fermi level is at mid-gap. With these conditions, the two expressions for Q, are and where E is measured from the nearest band edge, ktl and ktz are the characteristic energy widths of the distributions and NT] and NTZ are the trap concentrations per unit volume for V, > kt, kt1 and EF. (Equation (5.10) represents singlecrystal silicon and (5.1 1) represents polycrystalline 730

12 Polycrystalline silicon thin film transistors silicon. The Fermi level has been measured from mid-gap, V, is the band bending at the surface and the zero kelvin approximation has been made for the occupancy statistics in equation (5.1 l).) The first term in the square brackets represents the free charge term and the second the fixed charge term. In classical inversion, the free charge is much greater than the fixed charge density and in equation (5.10) it can be seen by inspection that this condition is readily achieved beyond inversion because the free charge density is increasing as exp(v,/kt) whereas the fixed charge term is only increasing linearly with V,. This gives rise to the linear drain curredgate voltage characteristics. The field effect mobility, gfe, which is derived from the slope of this line, is related to the free carrier mobility, PO. by For nfne - Qs, PFE - PO. (5.12) In contrast, in equation (5.11) the free and trapped charge terms both vary exponentially with V, as respectively. If the absolute magnitudes of these two terms are comparable, then the surfaceinduced charge will be continuously divided between free and trapped carriers. Hence from equation (5.12) the field effect mobility will not be equal to the free carrier mobility. Even if the two terms are not of comparable magnitude, it may take a greater range of surface band bending from the point at which the free and trapped concentrations are equal to the point at which the free charge density dominates the trapped charge density. Within this range, both the threshold voltage and the field effect mobility will be poorly defined. These concepts have been discussed by Fortunato and Migliorato [89] using numerical integration for the solution of Poissons equation. The device threshold voltage, VT, obtained from a linear extrapolation of the channel conductance (@-gate voltage curve to G = 0, was shown to occur when the volume densities of free and trapped charges were equal at the surface, but the G-VG curve did not attain linearity until 2VT, when the areal densities were equal. Clearly, the value of V, was a function of both NT and TI and neither VT nor gfe were adequately defined without a minimum voltage of 2VT being applied to the gate. As indicated above, and numerically shown by Shur and Hack [go], even a linear G-V, curve giving a well defined value of fim may not be measuring the free carrier mobility. This is most likely to be true for a high value of NT (approaching loz1 c d ev-l) and a small value of TI. This is usually the case for a-si:h [go], but the extent to which it is true for poly-si is still unclear. Indeed, for the majority of published experimental results, no attempt has been made to assess the relative values of the field effect and free carrier mobilities. Moreover, for the variety of field effect mobilities quoted for the different types of poly-si, it has not been established that the major difference between them is indeed the free carrier mobility rather than being an artefact of different tail state densities. In the work referenced above, the trapping state distribution has been taken to be spatially uniform, which is not obviously consistent with the granular nature of the material. One of the justifications for this is that the grains themselves are sufficiently rich in defects that a distinction between the grain and the grain boundary is unnecessary. Secondly, to treat the grain boundaries properly requires a full 2D numerical simulation as opposed to some of the semianalytical work referred to above which is able to elucidate the essential physics. Although the physics will not change by spatially localizing the trapping states, the absolute values of trap density could. It was demonstrated by Ayres ef a1 [91] that if a given average volume density of traps were localized in grain boundaries, significantly different values of subthreshold slope would be obtained. The only analytical approach which allows for the localization of the trapping states in grain boundaries is that due to Levinson ef al [92], but the analysis is only valid for a single discrete trapping level. Whilst the technique has the merit of allowing the ready extraction of an areal trapping state density from experimental ZD-VG data, the value itself will not be meaningful if the traps are not localized in energy. 6. Trapping state passivation In the discussion of the trapping state distribution in section 5, reference was made to the TFT transfer characteristic in figure 5(a). However, this device had been subjected to a trap passivation process in atomic hydrogen. Transfer characteristics before and after this treatment are shown in figure 13(a) [91] and it will be readily seen that the passivation treatment results in an appreciable increase in on-current and a reduction in both off-current and subthreshold slope. These changes result from a reduction in trapping state density across the bandgap as confirmed by the DLTS measurement of Ayres [86, 911, shown in figure 13(b): For TITS which have been fabricated with a furnace crystallization process (or with poly-si directly deposited in the columnar form), trap passivation is a key process in obtaining acceptable device performance. Postfabrication trap passivation appears to be less essential with lasercrystallized material, due to the inherently better crystallinity of that material. The most commonly used passivation procedure is by exposure of the devices to atomic hydrogen in a hydrogen plasma [13, 27, 93, 941, although other procedures such a Hf implantation [95] and hydrogen diffusion from a hydrogen-rich Si3N4 capping layer have also been reported [96]. Detailed studies of the plasma exposure processes have yielded information on the diffusion process of hydrogen in fine-grain poly-si. Some of the key effects are shown in figures 14(a) and (b) [91]. These results are for plasma hydrogenation at 350 "C using the autoregistered TIT structure shown in figure 4(a). The data in figure 14(a) show that the exposure time required to obtain a given value of subthreshold slope increases with increasing values of TFT channel length. The subthreshold slope is a measure of the ease with which a continuous conducting electron channel can be electrostatically induced at the 731

13 S D Brotherton I v, (V) # F11412A 3-1 t (0) 0 o L =20pm x L:lOpm *L= 3pm l0-l'l a : v, 1v : V, -15V 10-'20 h z d l E,-E(eV) Figure 13. (a) Poly-Si m transfer characteristic measured before and after plasma hydrogenation. (b) Change in trapping state distribution, across the upper haif of the forbidden bandgap, derived from DLTS measurements (taken from Ayres [86]). surface, and as such will be limited by those regions in the channel having the greatest trapping state density. These results clearly indicate that, for a given exposure time, longer-channel devices have a greater residual trapping state density. This can be readily understood in terms of lateral diffusion of hydrogen around the edges of the gate finger rather than vertical diffusion straight through it. Comparable results have been reported by a number of workers 113, 27, 941. The impermeability of the gate poly-si is not inconsistent with the results in figure 14@) showing the dependence of m leakage current with hydrogen exposure time. As will be discussed in section 7, the leakage current arises from electron-hole pair generation at the drain junction and hence no channel length dependence is expected for this phenomenon since only those states in the vicinity of the drain junction need to be passivated. The time dependence of the passivation of the generation centres is taken to be indicative of the time required for the hydrogen to diffuse through the 200 nm Time in H-plasma (hours) Figure 14. (a) Variation of poly-si TFI subthreshold slope with plasma hydrogenation time, for devices with different channel lengths. (b) Variation of TFT leakage current with plasma hydrogenation time and channel length (taken from Ayres et a/ [91]). thick film of poly-si. This indicates a diffusion coefficient of x cm2 s-' [13], which is considerably smaller than the value of - cm2 s-' quoted for singlecrystal silicon by Pearton et af [97]. The low value of diffusion coefficient, inferred from electrical device data, is consistent with SMS profiling measurements on deuterated poly-si showing penetration depths of fractious of a micrometre [13, 27, 98, 991. Hence the limited vertical penetration of hydrogen through fine-grain poly-si, coupled with the reported [99] accumulation of hydrogen at the poly-si/sioz boundary, explains why direct vertical penetration of hydrogen through the gate poly-si into the m channel is not generally observed. Although Mimura ef al [27] noted that by using a reduced thickness poly-si gate layer of -100 nm its masking effect could be avoided, those results have not been reported by other workers. From the limited penetration depths of hydrogen in poly-si, it was concluded [13,99] that the most likely lateral diffusion path for hydrogen, extending micrometres into the m channel, was through the gate oxide layer. This was confirmed [91] by noting that the lateral penetration distance increased with increasing gate oxide thickness. The low values of diffusion coefficient of hydrogen in fine-grain poly-si are consistent with the diffusion 732

14 Polycrystalline silicon thin film transistors mechanism identified for hydrogen in single-crystal silicon [97, A wide range of diffusion coefficients, obtained from penetration depths in single-crystal silicon, have been reported at -350 "C which were not consistent with extrapolated high-temperature hydrogen diffusion data. In addition to this variability in diffusion coefficient, the concentrations of hydrogen measured in crystalline silicon after plasma exposure were also very specimen dependent. These results have been reconciled by a model which accounts for the propensity of hydrogen to be trapped at defects and to undergo molecule formation at the plasma exposure temperatures. Defect trapping immobilizes the hydrogen and the HZ molecule is far less mobile than atomic hydrogen. This results in an effective diffusion coefficient for hydrogen given by 1971 where [HJ is the atomic hydrogen concentration and [HT] is the total hydrogen concentration, and [HA] is the defect-trapped hydrogen. Hence the concentration of defect trapping states will determine the hydrogen diffusivity and lead to characteristic exponential, rather than Gaussian, depth profiles [97]. Clearly, the greater the trap density, the lower will be the effective diffusion coefficient. Hydrogen in poly-si is likely to display the same trap-dominated diffusion mechanism; with high densities of inter- and intragrain traps, the low, and somewhat variable, values of reported diffusion coefficient can be readily understood. The fact that an analysis of the TFT characteristics after hydrogenation shows a reduction in active trap state density is indicative of hydrogen trapping at these sites. In addition, direct evidence of defect passivation (hydrogen trapping) has been obtained from ESR measurements [98, 1011, in that the density of paramagnetic spin centres, identified with grain boundary dangling bonds [98], was monitored to decrease with plasma exposure time. (Optical absorption measurements [lo31 placed the singly occupied dangling bond at Ec ?c 0.15 ev.) Also, Fourier transform infrared spectroscopy (FTIS) has been used to identify the formation of Si-H bonds following hydrogenation [102]. However, the dynamics of the hydrogenation process, and the reaction of hydrogen with poly-si, are not fully understood in that STMS measurements of deuterated material detect deuterium concentrations which are far larger than the change in concentration of passivated ESR centres [loll. The ratio of hydrogen to passivated centres varied from 35:l to 1.41 over the temperature range 250 "C to 450 "C, and with prolonged hydrogenation the hydrogen content was measured to be up to two orders of magnitude greater than the dangling bond density. It was suggested [I011 that the hydrogen is trapped at centres other than dangling bonds, such as weak SiSi bonds at or near grain boundaries forming or HE clusters. Passivation of these weak SiSi bonds could be responsible for the reduction of band tail states [103], as is known to occur from the electrical measurements of TFTs described in section 5. The availability of substantial sinks for hydrogen in the poly-si also explains the limited lateral penetration depth of hydrogen in TFTS even after long exposure times [131. As shown by Pearton ef al [971, when the sink concentration greatly exceeds the free hydrogen concentration, and trapping or multiple trapping [lo41 dominates, an exponential, steady-state free hydrogen profile is predicted. The other feature which remains poorly understood in detail is the transport of the hydrogen from the plasma and the dependence of this process upon the details of the plasma itself (for example pressure, input power etc). This is best illustrated by results obtained from a low-pressure ECR plasma [lo51 in which a reduction in exposure time by approximately an order has been reported. These conditions also resulted in considerably greater lateral penetration distances of the hydrogen into the TFT structure. The results have been explained in terms of a greater atomic hydrogen concentration in the low-pressure plasma. As the penetration distance for a diffusion process depends on the logarithm of the source concentration, more than four orders of magnitude increase in atomic hydrogen will be needed to quantitatively explain the effect. However, from a practical point of view this fast hydrogen passivation process is very attractive. 7. TFT leakage currents As discussed in section 2, the attainment of low, well controlled off-state leakage currents is a prime requirement for pixel TFTs in AMLCDs. For example, in small projection displays, with a pixel size of - 60 x 60 pm2, the leakage current will need to be less than - 2 x A. This technological requirement has been one driving factor in the investigation of the leakage current phenomenon, the other has been to identify the mechanism which results in the widely reported exponential dependence of the leakage current on gate and drain bias. The gate bias dependence is shown in figure 5; insofar as this cannot be explained by pure thermal generation it was referred to as 'anomalous leakage cunent' in one of the earlier publications [lo61 and the term has been commonly used since. The mechanism has been associated with field-enhanced tunnelling in the drain space charge region and is a direct consequence of the high drain fields present in poly-si. Given that similar phenomena have been reported in singlecrystal Si devices [107, 1081 and in so1 devices [lo91 also under highfield conditions, it is questionable to what extent the term 'anomalous' is appropriate. In addition to the field-enhanced tunnelling phenomena referred to above, there are other contributions to the offstate current depending upon the overall trap density and the extent to which it has been passivated [13, 911 as well asthefilmthickness[llo, 1111 andgrainsizeeffects [110]. The role of the trap state density in determining canier generation rates, and hence generation lifetime, is shown in figures 15 and 16 [91]. Figure 15 illustrates the transfer Characteristics as a function of plasma hydrogenation time and the off-state drain current characteristics are shown in figure 16. From the detailed shape of the latter and 733

15 S D Brotherton b ,,,, I,, I,I o 10.0 L : V,(V) Figure 15. Transfer characteristics of poly-si TFTS at various stages of hydrogenation: (a) zero, (b) partial, (c) full hydrogenation (taken from Ayres eta/ [91]). the channel length dependence of the former the dominant leakage current mechanisms were identified [91]: (i) Prior to hydrogenation, the near-linear ID-VO characteristics and the channel length-dependent currents at negative gate bias indicated hole conduction as the dominant mechanism. Modelling of the leakage current demonstrated this to be due to the low lifetime of the material [13] (< lo- s) such that the nt junctions were not rectifying and the hole currents were kansit time limited rather than generation rate limited [1121. (ii) With partial hydrogenation, the increase in generation lifetime caused the junctions to begin to display rectifying properties and the leakage currents changed from being transit time limited to generation rate limited at sufficiently large VD. (iii) Continued reduction in the density of generation centres by hydrogenation led to a further reduction in leakage current density to such a value that the drain bias was dropped almost entirely across the junction, and the local increase in fieid resulted in the observation of field enhanced currents at low drain bias. At sufficiently high drain bias this mechanism was apparent in all the curves. The results shown in figure 15 and 16 illustrate the v, (V) Figure 16. Off-state b-v, curdes at different stages of plasma hydrogenation: (a) zero. (b) partial, (c) full hydrogenation (taken from Ayres er a/ [91]). role played by trap passivation in controlling leakage current, where the limiting mechanism is electron-hole pair generation at the drain. However, to attain this limiting situation, other parasitic current flow mechanisms have to be suppressed. One of the most important in this context is the suppression of bulk electron channel currents [110]. This is achieved by using sufficiently thin material, for which, in the off-state, when the surface is hole accumulated at negative gate bias, the surface depletion layer extends through the depth of the film. Due to the high space charge density in the material, this typically requires the use of films thinner than -100 nm [91, For furnace-crystallized layers, as discussed in section 3, the canier mobility is found to increase with, increasing film thickness, hence there is likely to be a compromise between mobility and leakage current in the choice of film thickness. Greatest interest has been displayed in the type of device whose characteristics are shown in figures 15(c) and 16(c), in which minimum currents are attained, but which also manifest the anomalous leakage current mechanism, i.e. the currents rise exponentially with gate and drain bias. Although the device in figure 15(a) also displays an increase in drain current with negative values of gate bias, 734

16 Polyctystalline silicon thin film transistors it will be appreciated that the current flow mechanism is different from that in figure 15(c). Characteristic features of the anomalous current flow mechanism are the nearexponential dependence of current density on applied bias and a strong dependence of the activation energy on applied bias. Various models have been put forward to characterize the mechanism, including trap to band tunnelling [ 1061, the PooleFrenkel effect [I 131 and phonon-assisted tunnelling [91, (thermionic field emission). For pure tunnelling, the non-zero activation energies, which are measured experimentally, might not be expected, but, as shown by Hack etal [117], could arise from modulation of the source+hannel barrier; the Poole-Frenkel effect does not predict the correct form of the exponential current dependence on bias, nor would it give the observed dependence of activation energy on bias 1118, Phonon-assisted tunnelling offers the most satisfactory explanation for the majority of the published data, although the detailed explanations have varied between mid-gap trap to band transitions [91]. intertrap hopping [I161 and band tail state to band transitions [115]. Since the WKB approximation [I201 for tunnel currents 'hough a triangular barrier has the general form (where N is the density of states involved and E is the transition energy) the lowest-energy transitions will have the greatest probability at the lowest fields. However, if the value of N increases with E, then one could expect a continuous increase in tunnel current paths with field starting from mid-gap trap to band, progressing to band tail state to band and ultimately band to band. Phonon-assisted tunnelling from traps in the drain space charge region can be shown to have the following approximate analytical form for the field enhancement, y(f), in the canier emission rate [121]: i.e. 2n 'l2qh - F (kt)3/22(2m*)1/2 and from the depletion approximation, F c( V:", Y(VD) Y AexP(CVD) (7.1) y(f) E Aexp(BFZ) (7.2) therefore In addition, the predicted dependence of activation energy on drain bias is of the form reported from experimental measurements [119]. This model has been successfully fitted to experimental data [91] using a carrier effective mass of 0.2mo (transverse electron effective mass) and a drain space charge density of (1-2) x IOl7 However, these space charge density values are higher than the mid-gap trap state density values reported in high quality ms [83, 861. This apparent problem in explaining the occurrence of electrostatic fields, sufficiently high to promote tunnelling (> 2 x IO5 V cm-'), has been resolved by 2D TFT simulation [119]. This showed that the field resulting from 2D drain-gate coupling, in the off-state, is particularly high when the lateral dopant distribution within the drain region is limited to a few tens of nanometres. Fields of the required magnitude (> 2 x IO5 V cm-') are readily produced at the gate and drain bias values used for the m leakage current measurements. Moreover, the calculated field was only weakly dependent upon the trap state density, for mid-gap densities of -= 2x loi7 ev-' [119]. Hence, it will be appreciated that the 'anomalous' currents reported in poly-si ms are a direct consequence of the high drain fields produced by the 2D electrostatic effects within the near-abrupt junction TFT structure [ As mentioned in the introduction to this section, the same phenomenon is seen in single-crystal Si devices [107, 1081 under conditions of high drain field. In order to reduce the magnitude of the current and to reduce its bias dependence various device structures have been implemented to reduce the drain field. These have included using multiple-fingered gates [122], in which the applied bias, in the off-state, is dropped across each n+channel junction, thereby reducing the local field. Another technique has been to use a low-doped drain [123] (LDD) structure in which the insertion of a lightly doped n-type region between the n+ drain and the channel redistributes the junction potential from being dropped entirely across the channel space region to being partially dropped across the n-type region. One of the limitations to this approach has been the control needed in the doping of the n region to achieve a field redistribution whilst not unduly adding series resistance to the channel and thereby reducing the on-current. Variants on the LDD approach have been to use field-induced drains achieved with either a biased field plate over an off-set drain region [124] or to use an offset drain passivated by a dielectric containing sufficient positive charge to induce an underlying channel [125]. In all cases a reduction in the bias dependence of the off-state current has been achieved. 8. Conclusion During the past decade there has been rapid growth of interest in poly-si as the active device layer in thin film transistors because of their application to flat-panel displays. As could be expected from a polycrystalline material, the performance of poly-si TFTs is dominated by trapping states at grain boundaries and within the grains themselves. These have been shown to be distributed continuously in energy across the bandgap with a U- shaped distribution which is similar to that present in a- Si. However, the electron and hole field effect mobility values are considerably higher than in a-si, but still less than in single-crystal silicon. Thus while the onstate characteristics of poly-si TITS do not challenge conventional c-si applications, they are sufficient for present display applications. The research on poly-si has concentrated on refining the preparative procedures to improve basic materials quality within the constraint of a low-temperature glass compatible process. The 735

17 S D Brotherton two currently favoured approaches use a-si as precursor material and employ either solid-phase crystallization at -600 "C or surface melting using a short wavelength laser to convert it into the desired polycrystalline form. More forward-looking techniques, which, if successful, could supplant the above procedures, have used novel reduced temperature processes to directly deposit highcarrier-mobility poly-si at %450"C. Attention has also focused upon further improvement in material properties by the passivation of free carrier trapping states within the poly-si by hydrogen. This has been found to be a complex process in which the initial trap state density affects the speed and effectiveness of the passivation process itself. This is consistent with the trapping-dominaled diffusion mechanism of hydrogen which has been identified in c-si. Finally, the off-state characteristics of the TFTS have been the subject of extensive study due to the strong dependence of the leakage current on gate and drain bias. This has been demonstrated to be due to a field enhanced carrier emission process associated with tunnelling. Various device architectures have been explored to relieve the electric field at the drain and thereby reduce the bias dependence of the leakage currents. Although there is scope for greatly improved understanding, at the microscopic level, of the role of the inter- and intragain defects in determining the material and device properties of poly-si, there is now sufficient control of those parameters for poly-si TFTS to have been successfully used in the demanding application of high-resolution projection TV arrays. With the increased understanding and control of the material it will find increasing application in AMLCD technology, both in a hybrid form as the drive circuits on a-si:h displays and also as a monolithic, fully integrated array technology which will provide a strong challenge to the present a-si:h AMLCD approach. Acknowledgments I would like to acknowledge Dr A G Knapp for figure 1, Mr M J Edwards for figure 3 and Dr J P Gowers for the TEM micrograph used in figure 8. References [I] Uchida T 1984 Opt. Eng [2] Morozumi S, Oguchi K, Misawa T, Araki R and Ohshima H 1984 SID '84 Digest (New York Palisades Institute for Research Services) p 316 [3] Aruga S, Araki R, Kamakura H, Shinozaki J and Morozumi S 1987 SID '87 Digest (New York Palisades Institute for Research Services) p 75 (41 Howard W E 1986 Proc. SID [SJ Knapp A G and PoweU M Japan Display '89 (Tokyo: Society for Information Display) p Ohwada 1-1, Takabatake M, Ono Y A, Mimura A, Ono K and Konishi N 1989 IEEE Trans. Electron Devices [7] Lee S N, Stewart R G and Arester A H 1992 Pmc. SPIE [SI Edwards M J 1994 IEE Proc.-Circuits Devices Syst [9] Fluxman S 1994 IEE Proc-Circuits Devices Syst [IO] Takafuji Y. Yamashila T, Shimada T, Akebi Y, Matsumoto T, Tsubota K. Fuiioka K and Awane K 1993 SID '93 Digest (Califoka: Society for Information Display) p Lewis A G. Lee D D and Bruce R H 1992 IEEE J, Solid State Ciks _ Bruce R H. Morozumi S. Hack M. Lewis A G and Wu l-w'i992 Proc. SPIE 1664' _ Brotherton S D. Avres J R and Youne N D 1991 Solid I State Electron Youne N D and Gill A 1992 Microelectron. Enz il5i Little-T W, Takahara K-I, Koike H, Nakazawa?, Yudasaka I and Ohshima H 1991 Japan. J. AppL Phys [I61 Batey I, Tiemey E, Stasiak 1 and Nguyen T N 1989 Appl. Sur$ Sci [17] Sekiya M, Hara M, San0 N, Kohno A and Sameshima T 1994 IEEE Electron Device Lett [IS] Sera K, Okumura F, Uchida H, ltoh S, Kaneko S and Hotta K 1989 IEEE Trans. Electron Devices [I91 Brotherton S D, McCulloch D I, Clegg J B and Gowers J P 1993 leee Trans. Eiectmn Devices Mei P, Bovce J B. Hack M. Luian R A, Johnson R I,._ Anders& G B, Fork D K an> Ready S E 1994 AppL Phvs. Lett [21] Tanjio M, Miyamoto N and Fujita J 1992 Japan Display '92 (Tokyo: Society for Information Display) p 345 [22] Hirano N, Nishida S, Takechi K, Uchida H and Kaneko S 1992 Japan Display '92 (Tokyo: Society for Information Display) p 213 [23] Adams A C 1983 VLSI Technology ed S M Sze (New York McGraw Hill) p 93 [24] loubcrt P, Loisel B, Chouan Y and Haji L Electmchem Soc I251 Voutsas A T and Hatalis M K 1992 J. Electrochem Soc [26] Nakazawa K 1991 J. AppL Phys [27] Mimura A, Konishi N, Ono K, Ohwada J-I, Hosokawa Y, Ono Y A, Suzuki T, Miyata K and Kawakami H 1989 IEEE Trans. Electron Devices [ZS] Meakin D B, Coxon P A, Migliorato P, Stoemenos J and Economou N A 1987 Appl. Phys. Lett Meakin D B, Stoemenos I, Migliorato P and Economou N A 1987 J. Appl. Phys [30] Dimilriadis C A. Stoemenos J, Coxon P A. Friligkos S, Antonopoulos J and Economou N A 1993 J. AppL Phys [31] Takahashi H and Kojima Y 1994Appl. Phys. Lett [32] Miyasaka M, Nakazawa T and Ohshima H 1991 IEDM '91 (New York IEEE) p _ Mauumura H. Hosoda Y and Furukawa S 1993 Mater. Res. Soc. Simp. Proc _ Kono N. Naeahara T. Fuiimoto K. Kashiwaei Y and Kakinoki % 1993 hafir. Res. Soc. Symp. hoc [35] Koster U 1978 Phys. Status Solidi a [36] Hatalis M K and Greve D W 1988 J. AppL Phys _ 1371 Takenaka S. Kunii M. Oka H and Kurihara H 1990 Japan. J.'AppL Phys. 29 L Noeuchi T, Havashi H and Ohshima T 1988 Mater. Res..?oc. Symp. Proc Chiang A, Huang T Y, W u I-W and Zmycki M H 1988 Mater. Res. Soc. Symp. Pmc Nakamura A, Emoto F, Fujii E, Uemoto Y. Yamamoto A, Senda K and Kano G th Conf on Solid State Devices and Materials (Tokyo) extended abstracts (Tokyo: Business Centre for Acad. Soc. Japan) p 189 [41] Iverson R B and Reif R 1987 J. Appl. Phys [42] Hill C and Jones S 1988 Properties ofsi (EMIS Data Review) (London: IEE Inspec) p 946 [43] Brotherton S D 1993 IEE Coll. Digest 1993/067 4/1 I441 Adachi E, Aoyama T. Konishi N, Suzuki T, Okajima Y 736

18 Polycrystalline silicon thin film transistors and Miyata K 1988 Japan. J. Appl. Phys. 27 LIS09 [45] Nakazawa K and Tanaka K 1990 J. Appl. Phys [46] Yamauchi N and Reif R 1994 J. Appl. Phys (471 lverson R B and Reif R 1988 Appl. Phys. Lett Nakazawa K 1991 J. Appl. Phys [49] Scheid E. de Mauduit B. Taurines P and Bielle-Daspet D 1990 Japan. J. Appl. Phys. 29 L2105 [SO] Voutsas A T and Hatalis M K 1993 J. Elecfrochem Soc [51] Kakkad R. Smith 1, Lau W S and Fonash S J 1989 J. Appl. Phys [52] Fair J E 1992 SolidState Echnol. August p 47 [53] Bonnel M, Duhamel N, Henrion T and Loisel B 1993 J. Electrochem. Soc [54] Liu G and Fonash S J 1993 Appl. Phys. Lett [55] Kawazu Y. Kudo H, Onari S and Arai T 1990 Japan. J. AppL Phys [56] Stoemenos J, Mclnlosh I, Economou N A, Bhalnagar Y K, Coxon P A, Lowe A J and Clark M G 1991 Appl. Phys. Lett [57] VOutsas AT and Hatalis M K 1993 Appl. Phys. Left [58] Plevert L, Haji L, Bonnel M, Duhamel N and Loisel B 1994 Solid Sfare Phenom [59] Fair J and Mehlhaff J 1992 SID '92 Digest (California: Societv for Information DisDlav). D 109 I,. [60] Sameshima T, Hara M and Usui S 1989 Japan. J. Appl. Phvs Miyaia Y, FUNta M, Yoshioka T and Kawamura T 1992 japan. J. Appl. Phys. 3 I, part I, Nishihara Y, Yamamoto S, Yamada S, Hikichi T. Asai I and Hamano T 1992 SID '92 Digest (Tokyo: Society for Information Display) p 609 [63] 1985 Propenies of Amorphous Silicon (EMIS Data Review I) (London: IEE Inspec) [64] Incropera F P and de Wih D P 1983 Fundamentals of Hear Transfer (New York: Wiley) [65] Sameshima T 1991 PhD Thesis University of Shizuoka [66] Fogarassy E, Pattyn H, Elliq M, Slaoui A, Prevot B, Stuck R, de Unamuno S and Mathe E L 1993 Appl. Surj: Sci [67] Baeri P and Campisano S U 1982 Laser Annealing of Semiconductors ed J M Poate and J W Mayer (New York: Academic) ch 4 [68] 1988 Properties of Silicon (EMIS Dara Review 4) (London: IEE Inspec) 1691 de Unamuno S and Fogarassy E 1989 Appl. Su& Sci Fogarassy E, Prevot B, de Unamuno S, EUiq M. Pattyn H, Mathe E L and Naudon A 1993 Appl. Phys. A Winer K, Anderson G B. Ready S E, Bachrach R 2, Johnson R I, Ponce F A and Boyce J B 1990 Appl. Phys. Lett [72] Bachrach R 2, Winer K. Boyce J B, Ready S E Johnson R I and Anderson G B 1990 J. Electron. Mater [73] Kuriyama H. Kiyama S, Noguchi S. Kuwahara T, Ishida S, Nohda T, Sano K, lwata H, Tsuda S and Nakano S 1991 IEDM '91 (New York: IEEE) p 563 [74] Wood R F and Geist G A 1986 Phys. Rev. B [75] Nmyan J and White C W 1984 Appl. Phys. Lett [76] Thompson M 0, Calvin G J, Mayer J W, Peercy P S, Poate J M, Jacobson D C, Cullis A G and Chew N G 1984 Phys. Rev. Lett [77] Lowndes D H, JelIison G E, Pennycook S J, Wthrow S P and Mashburn D M 1986 Appl. Phys. Lett [78] Sameshima T 1993 Mater. Res. Soc. Symp. Proc [79] Chen S, Boyce J B, Wu I-W, Chiang A, Johnson R I, Anderson G B and Ready S E 1993 Proc. 13th Int. Display Research Conj: (Strasbourg. France) (Paris: Society for Information Display) p 195 [SO] Im J S, Kim H J and Thompson M AppL Phys. Lett (811 Sameshima T and Usui S 1991 J. Appl. Phys [82] Sze S M 1981 Plzysics of Semiconductor Devices (New York: Wiley) p 467 [83] Fortunato G and Migliorato P 1986 Appl. Phys. Lett [841 Madan A, LeComber P G'and Spear W E 1976 J. Non-Cryst. Solids [85] Powell M J 1981 Phil. Mag. B [86] Ayres J R 1993 J. Appl. Phys [87] Hack M, Shaw J G, LeComber P and Williams M 1990 Japan. J. Appl. Phys. 29 L Pandya R and Khan B A 1987 J. Appl. Phys [89] Fortunato G and Migliorato P 1990 J. Appl. Phys [901 Shur M and Hack M Appl. Phys [911 Ayes J R. Brotherton S D and Young N D ptoelectron.-Devices Technol [921 Levinson I, Shepherd F R, Scanlon P J, Westwood U' D. Este G and Rider M 1982 J. Appl. Phys [93] Kamins T I and Marcoux P J 1980 IEEE Electron Device Left [94] Wu I-W, Huang T-Y, Jackson W B, Lewis A G and Chiang A 1991 IEEE Elecfron Device Lett. 12 I81 [95] Rodder M, Dimitriadis D A, Scholz F and Kalnitsky A 1987 IEEE Electron Device Lett Pollack G P, Richardson W F, Malhi S D S, Bonfield T, Shichijo H, Banerjee S, Elahy M, Shah A H, Womack R and Chatterjee P K 1984 IEEE Electron Device Lett [971 Pearton S J, Corbett J W and Shi T S 1987 Appl. Phys. A Johnson N M, Bieaelsen D K and Mover M D 1982 ADDL.. phys. ktt. 40 si Jackson W B, Johnson N M, Tsai C C, Wu I-W. Chiang A and Smith D 1992 Appl. Phys. LetL [loo] Pearton S J. Corbett J W and Borenstein J T 1991 Physic0 B [loll Nickel N H, Johnson N M and Jackson W B 1993 Appl. Phys. Lett [IO21 Ginley D S and Haaland D M 1981 Appl. Phys. Letf Jackson W B, Johnson N M and Biegelsen D K 1983 ADDL Phvs. Left Tulc.hinsky-D A, Corbett J W, Borenstein J T and Pearton S J 1990 Phvs. Rev. B [I051 Ditizio R A, Liu G, Fonash S J. Hsieh B-C and Greve D W 1990 Appl. Phys. Lett. 56 I140 [I061 Fossum J G. Ortiz-Conde A, Shichijo H and Banejee S K 1985 IEEE Trans. Electron Devices [lo71 Theunissen M J J and List F J 1985 Solid Stale Electron Hurkx G A M, Klaasen D B M and Knuvers M P G 1992 IEEE Trans. Electron Devices McDaid L J, Hall S, Eccleston W and Alderman J C 1989 Microelectron. Eng Brotherton S D 1991 Microelectronic Eng Sehil H, Raoult F, Colin Y and Bonnaud Mater. Chem Phys Brotherton S D. Young N D and Gill A 1988 Solid State Devices ed G Soncini and P U Calzolari (Amsterdam: Elsevier) p 135 Madan S K and Antoniadis A D 1986 IEEE Trans Electron Devices Greve D W. Potvrai P A and Guzman A M 1985 Solid Stafe Efectron Wu I-W, Lewis A G, Huang T-Y, Jackson W B and Chiang A 1990 IEDM-90 (New York: IEEE) p 867 Rodriguez A, Moreno E G, Pattyn H, Nijs J F and Mertens 12 P 1993 IEEE Trans. Electron Devices Hack M. Wu I-W and Lewis A G 1993 IEDM-93 (New York: IEEE) p 385 Brotherton S D 1991 INFOS '91 ed W Eccleston and M Uren (Bristol: Adam Hilger) p