Welcome Packaging Research in Electronic Energy Systems (PREES) CIRCUIT DESIGN BEYOND THE SCHEMATIC

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1 Characterization of Ultra-Thin Flexible Ceramics for High-Density, 3D-Stackable Substrates for Wearable Power Electronics Xin Zhao Bo Gao Douglas C. Hopkins North Carolina State University Presented at the 2016 Electronics Packaging Symp & Heterogeneous Integration Workshop, Binghamton, NY, Oct 6-7, 2016 Points of contact: Welcome Packaging Research in Electronic Energy Systems (PREES) CIRCUIT DESIGN BEYOND THE SCHEMATIC Douglas C. Hopkins, Ph.D. Director PREES Laboratory FREEDM System Center North Carolina State Univ Varsity Dr., Suite 100 Raleigh, NC Feb 2016 Points of contact:

2 Multiphysics Simulation, Test & Assembly Electrical circuit analysis, CAD layout, and thermo-mechanical analysis with: COMSOL & ANSYS (MultiPhysics simulators), AutoCad, SolidWorks, Q3D, PLECS, SPICE Wet Bench for cleaning & formulation Thermal Imaging Flir Heavy wire & ribbon (Al, Cu) bonding research with: Hesse Mechatronics fully automated BJ939 Hand Soldering and Re-work station Manual high-precision Pick n Place ( 0403 chips) Torch-TP39V with video assist 3D Optical Profiler (1.7um resolution) ACS VisionMaster High End Electrical Test: Tektronix 371A Power Curve Tracer Oscilloscopes (2GHz/5GS/s) Arb Funct Gen., Multimeters (6.5 digit), Power supplies (kv&hc), 500A & 40kV probes Full Processing Including Cu Systems 3-Zone Rapid Deep Infrared Furnace (150 C C) (curing, sintering, thick film, glass sealing, controlled atmosphere-cu) Class 1000 Flow Hood 3D scanner 3D Printer - Thermoplastic MakerBot Rep2X (200 C 290 C) 4-axis Robotic Dispenser EFD w/ 3 Valves (10µm) (3D printing; thick film & PTF, and solder & sinter inks) 5-Zone Reflow Oven (0 C 450 C) Sakama - (curing, solder reflow, polymer thickfilm, controlled atmosphere; Cu) UV Curing Oven & Wands Vacuum Oven (0 C 250 C) (curing, drying, soldering, controlled atmosphere; Cu)

3 Flexible PCB for Ultra Dense VRMs By Bo Gao A 12V Input, 100A Output High Density VRM 10mm*25mm*10mm 3-ph sync. buck From simulation: 97%@2.5MHz, 90%@10MHz 0.8kW/cu-in@1.2V/100A 1kW/cu-in@1.5V/100A 1.6kw/cu-in@2.5V/100A 1. Stackable for FREE Eliminates board to board connectors. 2. Flat surface for GaN Lower stress caused by CTE mismatch, simple heat sink design. 3. No module substrate FPC itself can be folded back to form pads. Objective Investigate new ultra thin ceramics (ThinStrate by ENrG, Inc.) for power electronics applications OUTLINE Wearable Power Electronics Ultra-thin Flexible Ceramics Electrical and Thermal Characterization of 3 mol% Yttria Stabilized Zirconia (3YSZ) Pre-stress analysis of 3YSZ substrate with thick copper layers Circuits Topology design Corresponding to Specific Requirements Applications in Power Electronics Summary

4 Wearable Power Electronics Si WBG power semiconductors (GaN, SiC) Higher Breakdown Voltage Higher Operating Temperature Higher Thermal Conductivity Higher power density (smaller die) High Voltage Devices Less heatsink volume Less structural complexity Smaller Size From Traditional to Wearable Power Module Possibility for Wearable Power Electronics Module Challenge of Wearable Power Electronics Suitable Substrate with flexibility Substrate with enough thermal conductivity Ultra-thin Ceramics 3YSZ Ceramic Substrates with 40 µm & 20 µm Thickness Properties of 3YSZ substrate Thermal Conductivity CTE 8.2 ppm/ Dielectric Constant Breakdown Voltage Density Surface Roughness: Poisson Ratio 0.32 Young's Modulus Tensile Strength Bend Strength 2.3kV (20µm) 3.5kV (40µm) 6.05 g/cm nm (rms) 207 GPa GPa Suitable for Metallization High tensile strength and bending strength Good thermal conductivity compare with organic dielectric materials with similar thickness Light for lower weight profile

5 Electrical Characterization Leakage Current Leakage Current Measurement 1.00E E micron 3YSZ Reverse Characterization Electrode by E-beam Deposition 200 nm Ti layer Electrode Dia. 12 mm 25 o C ~ 175 o C Leakage current 1.00E E E-07 25C 75C 125C 175C 1.00E E Voltage Suitable for low temperature (< 100 o C) and low voltage (< 100V) applications Wearable power electronics modules High Voltage Setup for leakage current measurement of power semiconductor devices Dielectric Strength, MV / m Electrical Characterization Penn State Ln(1/(1-F)) C, 20µm Observation Ln(Breakdown Strength (MV / m)) Dielectric Strength, Mv / m Ln(1/(1-F)) C, 40µm Observation Ln(Breakdown Strength (MV/ m)) Samples are loaded with stepped voltage Stopped when conduction path is observed in the sample No leakage current value can be obtained due to the setup Limitation of leakage current is ~ 1.3 ma connector 20 sample points are measured for each thickness Weipull Plot to calculate the Breakdown Voltage Solid red lines represent the 95% confidence bounds Black lines stand for ideal breakdown strength distributions Dielectric Strength 288 kv/mm for 20 µm 196 kv/mm for 40 µm

6 Electrical Characterization Dielectric Strength & Breakdown Voltage v. Temperature Penn State Same measurement is applied at different temperature Dielectric Strength and Breakdown Voltage decreased at higher temperature (25 o C ~ 150 o C) Electrical Characterization Dielectric Constant and Loss Measured from 100 Hz to 1 MHz Temperature -65 o C ~ 250 o C Dielectric loss increased at higher temperature, exceeded 1 at 75 o C Dielectric constant increased at higher temperature, the difference of curves for 20 µm and 40 µm is due thickness variations

7 Thermal Characterization 3-Omega Method Thermal Conductivity Measurements 3-Omega Method Kelvin connection to GOLD line deposited on the ceramic Gold line length, 8mm, width 0.1mm Define input current at different frequency Measure output voltage at corresponding 3ω frequency dt = 2 V / V (dr/ dt) K = V1 dr / DT / (4 lr ) V + V - I + Thermal Conductivity decreases with higher temperature I - Increase in temperature of heater line per unit power vs frequency Simulation and Experiment are very good Thermal Characterization TTR Method Thermal Conductivity Measurements Transient Thermo-reflectance (TTR) method The result by TTR method is 2.85 W/mK, verifying the measurement results by 3- omega method Measurement Setup Laser Beam A applied at the sample surface Laser Beam B is applied to measure the transient thermal reflectance signal Both beams are focused at the same spot on the sample surface Si photodiode collects the reflected laser beam B Oscilloscope records the reflected laser beam B after amplification Si detector input the TTR signal into the Oscilloscope

8 Thermal Characterization Simulation Simulation comparison between 3YSZ ThinStrate v. traditional power substrate for 2 kv applications 20µm 3YSZ 40µm 3YSZ Bottom Temperature is fixed at 25 o C Power density on the device surface is defined as 1000 W/cm 2 Parts Dimension / mm 3 Heat Capacity/ J/KgK Thermal Conductivity / W/m K Thermal Resistance / o C/W SiC Diode E-4 Solder E-5 Cu plate E-6 3YSZ E (0.04) 12.08E-5 Al 2 O E-5 AlN E-5 Thermal impedance of 3YSZ is comparable to AlN and Al 2 O 3 for 2 kv applications 10mil - AlN 10mil Al 2 O 3 Substrate Junction Temperature / K 20µm 3YSZ µm 3YSZ mil - AlN mil Al 2 O Mechanical Analysis - Pre-stress analysis Copper Layer Ceramic Solder Paste SiC diode ¼ symmetric applied to improve calc efficiency Sn63Pb37 Solder Paste was set as 50 µm thick Anand Constitutive Model was applied to describe the viscoplastic behavior of solder paste Simulation setup for comparison between 3YSZ ultra-thin substrate with traditional power substrate for 2 kv applications Young s Modulus / Gpa CTE / 10-6 / o C Temperature profile for soldering process, region between two red lines are for pre-stress analysis Poisson Ratio Heat Capacit y / J/ Dens ity / Kg/ m 3 Thermal Conductivity / W/ SiC Sn63 Pb37 Temperatur e dependent 24.5 Temper ature depende nt Cu 117 Time depend ent AlN Al 2 O 3 3YS Z Materials Parameters for Pre-stress Simulations

9 Mechanical Stress Von Mises Stress Distribution Max Von Mises Stress AlN 141 Mpa Alumina 248 Mpa 20 µm 3YSZ 292 Mpa 40 µm 3YSZ 261 Mpa Location The interface between Ceramic Layer and Copper Layer 10mil AlN substrate 10mil Alumina substrate Higher Stress concentration on the 3YSZ substrate Small thickness Large Stress gradient 20 µm 3YSZ substrate 40 µm 3YSZ substrate Mechanical Stress Shear Stress in Solder Layer Shear Stress on solder layer AlN Mpa Alumina Mpa 20 µm 3YSZ Mpa 40 µm 3YSZ Mpa 10mil AlN substrate 10mil Alumina substrate Location The corner of SiC device Front side for AlN and Alumina Modules Backside for 3YSZ modules 20 µm 3YSZ substrate 40 µm 3YSZ substrate

10 Mechanical Stress Shear Stress Ceramic Layer Shear Stress on Ceramic layer AlN 33.8 Mpa Alumina 60.9 Mpa 20 µm 3YSZ 118 Mpa 40 µm 3YSZ 194 Mpa Location The corner of SiC device Interface with Cu layers 10mil AlN substrate 10mil Alumina substrate Large shear stress in 3YSZ substrate, need to optimized metallization process for better stress management Tensile stress of 3YSZ: 248 Mpa Lower than the maximum allowed tensile stress 20 µm 3YSZ substrate 40 µm 3YSZ substrate Circuit Design for general wearable power electronics Most general topologies for power electronics half-bridge configuration Previous Work on single switch configuration for flexible power electronics applications

11 3D Layout design for wearable power electronics 3D concept layout based on ultra-thin 3YSZ substrate Left: with switching node floating; Right: with switching node sitting on the substrate Application Characterization for circuit selection Properties of substrate required by different specific applications 2D 2 dimensional HV High Voltage HC High Current HT High Temperature 3D 3 dimensional HF High Frequency HP High Power

12 Summary 3YSZ ultra-thin ceramic substrate was introduced for its potential application to wearable power electronics Electrical Characterization indicated that the substrate can withstand high voltage, but considering its higher leakage current under high temperature and high voltage, its potential application mainly focuses on lower voltage level and lower temperature Thermal Characterization results showed that the thermal conductivity remains high at lower temperatures, such as for wearables Thermal simulations showed that the thermal performance of ultra-thin 3YSZ substrate is comparable to traditional substrate AlN and Al2O3 Pre-stress analysis indicated that the substrate suffered higher shear strength, which requires optimization of metallization process for better thermal management General topologies for phase leg configuration are introduced, together with former works done by PREES on flexible power switches based on 3YSZ ultra-thin flexible substrate Two 3D topologies for single switches are proposed Requirements of flexible substrate materials for different specific applications are summarized Acknowledgements The authors would like to thank Texas Instruments for Laboratory support of such technical explorations, along with other PREES Sponsors, and ENrG for supplying materials. Also, Haotao KE and Mingyu Yang for early design contributions.

13 Thank you Questions? Douglas C. Hopkins, Ph.D. Director PREES Laboratory, FREEDM System Center North Carolina State University 1791 Varsity Dr., Suite 100; Raleigh, NC