Analytical modelling of the kink regime of a short channel polycrystalline silicon thin film transistor

Transcription

1 International Journal of Electronics, Vol. 93, No. 5, May 26, Analytical modelling of the kink regime of a short channel polycrystalline silicon thin film transistor S. CHOPRAy, A. SEHGALz and R. S. GUPTA* ydepartment of Physics, Acharya Narendra Dev College, University of Delhi, Govindpuri, Kalkaji, New Delhi-9, India zdepartment of Physics and Electronics, Hansraj College, University of Delhi, New Delhi-7, India Department of Electronic Science, University of Delhi South Campus, Benito Juarez Road, New Delhi-2, India (Received 2 March 25; in final form 9 June 25) An analytical model for the post-saturation region including the kink regime of a short channel polycrystalline silicon thin film transistor is presented. Considering the impact ionization mechanism caused by high electric field in the pinch off region near the drain, an expression for the channel potential is developed. The avalanche multiplication factor, an important parameter monitoring the impact ionization phenomenon is determined and discussed. Further, an expression for the drain-source current in the kink regime is determined and studied. The dependence of the kink current on the channel length and grain size is investigated. The results so obtained are compared with experimental data and an excellent match verifies the proposed model. Keywords: Poly-Si TFT; Kink effect; Short Channel; Grain boundary. Introduction Polycrystalline silicon thin-film transistor (poly-si TFT) technology is of critical importance for large area electronics like active matrix liquid crystal displays (AMLCDs) and high density static read only memory (SRAM) circuit applications (Brotherton 995, King 995, Suzuki et al. 998, Meng et al. 2, Zhang et al. 2). The growth of interest in polycrystalline thin film transistors has been stimulated by the rapid commercial development of such devices. For a poly-si TFT biased in the saturation region at high drain voltages the peak electric field is very high such that impact ionization causes generation of electron-hole pairs (Hack and Lewis 99, Valdinoci et al. 997, Bindra et al. 23). The impact ionization effect in these devices is strongly influenced by the grain boundary and makes analytical modelling a difficult task. The kink effect is found to be severe in the case of short channel poly-si TFTs and hence an important region to model and investigate. Several authors have preformed two-dimensional numerical simulations to investigate the kink effect (Hack et al. 99, 99 Yamada and Koyanegi 99). Most of the proposed models for the short channel poly-si TFTs deal with the subthreshold and linear regions only (Chopra and Gupta 2a, 2b, 2). *Corresponding author. rsgu@bol.net.in International Journal of Electronics ISSN print/issn online ß 26 Taylor & Francis DOI:.8/

2 28 S. Chopra et al. Jacunski et al. (999) discussed the kink effect through an empirical model but failed to give any physical insight to this effect. Chung et al. (996) described the kink effect as a bipolar junction transistor (BJT) effect similar to one seen in Silicon on Insulator (SOI) devices. But two-dimensional numerical simulation (Hack et al. 99, 99, Yamada et al. 99, Armstrong et al. 996, Fortunato 997) has identified the nature of kink effect to be due to impact-ionization mechanism in the high field region. Chen et al. (995) has modelled the kink regime of a long channel polysilicon TFT as an impact ionization phenomenon. As the device dimensions are reduced several secondary effects are introduced which have to be accounted for to predict the device characteristics accurately. But the analysis of Chen et al. (995) does not incorporate short channel and grain boundary effects. It is, therefore, important to develop an analytical model for the short channel poly-si TFT which depicts the kink regime but also characterizes its dependence on channel length, the grain size and various biases applied. To achieve a physical insight to the kink effect, an analytical model for the channel potential and drain-source current in the kink regime is developed. An expression for the channel potential near the drain under the influence of high electric fields is determined. The modelled channel potential is then used to determine the avalanche multiplication factor, an essential parameter required to determine the kink current. An expression for the drain-source current in the kink regime also referred to as the kink current is then developed. An extensive study of the kink regime of the short channel poly-si TFT is conducted and discussed. The results so obtained are coupled with the model developed for the linear region and compared with experimental data. An excellent match is found. 2. Model formulation Figure (a) shows the top gate structure of a polycrystalline silicon thin film transistor. The polycrystalline material shown is composed of a linear chain of identical crystallites having grain boundaries of negligible thickness and lying perpendicular to the channel. In figure (b) the post-saturation region or the velocity-saturated depleted region of the channel, near the drain, where impact ionization occurs is shown. The model makes use of a quasi two-dimensional approach proposed by El-Mansy and Boothroyd (977). The starting point of the analysis is Gauss s law applied to a rectangular box in the velocity-saturated depleted region of the channel and drain (figure (b)). The bottom of the box is at a certain thickness where the normal electric field is negligible. So, the bottom of the box is chosen to coincide with an electric field line that happens to be parallel to the surface. From two-dimensional simulations, the field line is usually found around the junction depth (y j ) because many electric field lines emanate from the corner of the n þ junction. 2.. Channel potential Differentiating the equation obtained from Gauss s law with respect to the lateral dimension, a differential equation can be written for the fields at the surface, de x ðvþ " si y j ¼ donor charge density þ mobile charge density normal oxide field dx

3 Kink regime of short channel poly-sci TFT 28 Figure. (a) Top gate structure of an inversion type polycrystalline silicon thin film transistor. (b) Cross-sectional view of the poly-si TFT biased in the saturation regime. The kink regime lying near the drain occurs through the length L. or y j de x ðxþ dx ¼ q n eff y j þ Q m " ox Eyðx,Þ " si " si " si where n eff is the effective donor density within the Gaussian box. The effective donor density is given as n eff ¼ n d þ n st /L g. Here n d is the average doping concentration in the poly-si material, L g is the grain size and n st is the trapping density at the grain boundary. The effective carrier concentration is not sensitive to the variations of the trap level energy as all the traps are assumed to be completely filled by the inversion carriers in the post-saturation region. E y (x, ) is the vertical electric field at the surface given as E y ðx,þ¼ ðv gs V fb 2 f VðxÞÞ ð2þ t ox V gs is the gate-bias voltage, V fb is the flat band voltage, f ¼ðk b T=qÞ lnðn d =n i Þ. ðþ

4 282 S. Chopra et al. Q m is the mobile charge density defined as Q m ¼ C ox ðv gs V th V dsat Þ ð3þ V th is threshold voltage of a short channel poly-si TFT. As the channel dimensions are reduced short channel effects become prominent and have to be included in the model formulation to predict accurate results. As the polycrystalline material consists of a number of grain boundaries in the film acting as trap centers the impact of the grain boundaries is also an important parameter which should be incorporated while defining the threshold voltage. Considering all these effects (Chopra et al. 2b) the threshold voltage of a short channel poly-si TFT is given by, V th ¼ V fb þ s þ f lqn d y d C ox Q s gb þ V d ð4þ 2" si K sinh KL g =2 y d is the depletion depth and s is the surface band bending at the onset of strong inversion, K ¼ð3C OX =y d " si Þ =2, is the DIBL parameter accounting for the reduction in the threshold voltage due to penetration of the junction electric field into the channel region causing barrier lowering. The charge sharing factor, f l is a means of describing the fraction of the total depletion charge in the channel terminated on the gate at short channel lengths, and is defined as f l ¼ y j L sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi! þ 2y d y j The trapped charge density, Q gb, in the grain boundary depends on the distribution of the localized trap states in the energy gap. The trap distribution can be well approximated by an effective trap state E t and the trapped charge density can be written as ð5þ Q gb ¼ qn st þð=2þ expððe t E f Þ=k b tþ ð6þ where k b is Boltzmann constant and (E t E f ) defines the position of the Fermi level relative to the trap level at the grain boundary. V dsat is the saturation drain voltage of a short channel poly-si TFT given as V dsat ¼ Lv sat eff 2sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi þ 2 V 3 gs V 4 th 5 ð7þ Lð v sat = eff Þ where v sat is the carrier saturation velocity and is ( sffiffiffiffiffiffiffiffiffiffiffiffiffiffi) ¼ þ f l 2q" si n d 2C ox s

5 Kink regime of short channel poly-sci TFT 283 eff, the field effect mobility, is given by eff ¼ k ðv g V th Þ p þ ð8þ where, the band mobility, k is the low field mobility constant and p is the power law exponent. Combining equations () (3), we obtain or 2 de x dx VðxÞ ¼ ð9þ d 2 VðxÞ dx 2 VðxÞ 2 ¼ 2 ðþ where 2 ¼ " si y j /(C ox ) can be interpreted as the characteristic length of the velocity saturated region and is given as ¼ q n eff y j C ox þ V fb þ 2 f V th V dsat Solving equation (5) under the boundary conditions V () ¼ V dsat and E () ¼ E dsat, the channel potential is obtained as 8 >< q n eff y j " si y j B x C Vx ð Þ ¼ þ V fb þ 2 f V th þ E dsat exp@ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 2 " si C ox A >: " si y j =C ox þ q n eff y j " si y j þ V fb þ 2 f V th E dsat 2 " si C ox B x C exp@ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi A q n eff y 9 > = j þ V fb þ 2 f V th V dsat ð2þ " si y j =C C ox ox >; The equation developed for the channel potential in the kink regime incorporates short channel and grain boundary effects, essential for precise modelling of the kink regime of a short channel poly-si TFT. ðþ 2.2. Kink current At short channel lengths and high drain bias, the maximum electric field experienced by the carriers at the drain end is increased. As the carriers move from source to drain, they can acquire enough kinetic energy in the high field region so as to cause impact ionization and leads to the generation of electron-hole pairs. These generated electrons are drawn towards the drain end and cause an increase in the drain current. While the holes drift towards the substrate and get accumulated in the substrate. The substrate potential rises till it becomes forward biased, causing further injection of electrons from the source. This added current augments the impact ionization. This effect results in a drastic increase in the drain current at high drain voltages.

6 284 S. Chopra et al. The current which arises as a result of impact ionization is given as (Arora 993) I kink ¼ I dsat ðm aval Þ ð3þ where I dsat is the drain current in the saturation region (Chopra et al. 2). The drain current in the saturation region is calculated by replacing the normal channel length L by the reduced channel length (L L d ) and V d with V dsat in the linear region current equation. Including these factors, the drain current in the saturation region (Chopra et al. 2) for a short channel TFT is, therefore, given as I dsat ¼ ( " sffiffiffiffiffiffiffiffiffiffiffiffiffiffi#!) W ðl L d Þþ eff ðv dsat =V sat Þ C ox eff ðv g V th ÞV dsat þ f l 2q" si n d V 2 dsat 2C ox s 2 L d, the channel length modulation factor, is L d ¼ððV d V dsat Þ=E tr Þ where E tr is the average transverse electric field near the drain end at the channel gate interface. M aval is the avalanche multiplication factor which is related to the lateral electric field in the device. M aval is determined by integrating the electron impact ionization factor throughout the post-saturation region as Z L M aval ¼ a i exp b i dx ð5þ Ex ð Þ a i and b i are the impact ionization constants. E(x) is determined from equation (2) and can be expressed as 82 EðxÞ ¼ >< 6 q n eff y j " si y j B x C 4 þ V fb þ 2 f V th þ E dsat exp@ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 2 " si C ox A >: " si y j =C ox þ 2 q n eff y j þ V fb þ 2 f V th " si E dsat " si y j C ox 32 9 B x C7 exp@ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi A5 þ 2 E 2 dsat ð V dsat þ Þ 2 >= " si y j =C ox >; The maximum electric field (E m ) occurs at the drain end and can be obtained by replacing V(x) byv ds. Substituting equation (6) in (5), M aval ¼ Z L b i =2 ð4þ ð6þ a i exp ð=þ ðvðxþþþ 2 þ 2 E 2 dsat ð V dsat þ Þ 2 =2!dx ð7þ This expression is used to measure the avalanche multiplication factor and study its dependence on various parameters.

7 Kink regime of short channel poly-sci TFT 285 From equations (3) (7), the kink current is expressed as I kink ¼ I dsat a i Z Em q E dsat ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi E 2 2 E 2 dsat ð V dsat þ Þ 2 = 2 exp b i E de ð8þ This expression defines the kink current in the post-saturation region of a short channel poly-si TFT. 3. Results and discussion Figure 2 shows the drain-source current of a short channel poly-si TFT for various gate voltages. At high drain bias, an anomalous increase in drain current is seen. This effect is well explained as due to impact ionization in the pinch-off region. The results are combined with the linear region model (Chopra et al. 2) for a short channel poly-si TFT. An excellent match with the experimental data (Chung et al. 996) verifies the proposed model. Figure 3 illustrates the dependence of the kink current on the channel length. It is observed that the kink effect becomes more severe as we approach sub-micron devices. This could be due to a reduction in the overall space charge. Experimental observations (Chung et al. 996) have also shown that the kink effect is more pronounced at shorter channel lengths. The variation of the kink current with gate bias for various drain voltages is shown in figure 3 (inset). It is observed that the kink current increases initially, peaks and then decreases. The initial increase occurs due to the increase in the horizontal component of the electric field. At higher gate voltages, the vertical Figure 2. The drain-source current versus drain voltage of a short channel poly-si TFT for various gate voltages.

8 286 S. Chopra et al. Figure 3. The variation of kink current with channel dimensions at different gate bias. (inset) The variation of the kink current with the gate bias at different drain voltages. Figure 4. The dependence of the maximum electric field on the grain size. (inset) The variation of maximum electric field with gate-source voltage at different drain bias. component of the electric field becomes more prominent and ultimately leads to a decrease in the kink current. While, as expected the kink current increases with increase in drain voltage. Figure 4 shows the variation of maximum electric field with grain size of a poly-si TFT. As can be seen from the curves, the electric field decreases with increase in

9 Kink regime of short channel poly-sci TFT 287 Figure 5. The impact of the gate bias and grain size on the avalanche multiplication factor. grain size. As the grain size increases the number of grain boundaries in a given channel length decrease and so do the number of traps. This causes the electric field to decrease. In figure 4 (inset) the dependence of maximum electric field on gate bias is portrayed. The maximum electric field can be seen to decrease with gate voltage. The dependence on the gate voltage occurs through the drain saturation voltage. Larger gate bias leads to a higher drain saturation voltage and this ultimately lowers the maximum electric field. Also, a larger drain voltage produces a higher peak electric field as shown. The avalanche multiplication factor is an important parameter monitoring the impact ionization effect. The dependence of this factor on the grain size of a poly-si TFT is depicted in figure 5. As the grain size increases, a smaller average trapped density results. This in turn leads to a lower avalanche effect since it requires less energy to break a bond in the trap state as compared to a normal bond. The variation with gate voltage shows the decrease in the multiplication factor with increasing gate bias. This is due to a reduction in the lateral electric field at higher gate voltages. 4. Conclusion An effective analytical model for the kink regime of a short channel polysilicon thin film transistor is described. The work is based on the impact ionization phenomenon that occurs near the drain due to high fields generated. Expressions for the channel potential, avalanche multiplication factor and kink current are developed. The analysis also incorporates short channel and grain boundary effects in the expressions developed and are important as these effects are seen to be more

10 288 S. Chopra et al. Table. Parameter values. Parameter Value (units) L mm W mm n d 22 m 3 n st 3 5 m 2 L g 3 nm 5 2 m 2 V s K m 2 V 3.7 s P 2.7 t ox 6 nm y j nm a i 2 8 m.75 8 V/m b i pronounced at short channel lengths. The impact of smaller dimensions and variation in grain size is also discussed. The results show that the kink effect is more prominent at smaller dimensions and smaller grain size. The paper also depicts the dependence of the kink current on various applied bias. The model is coupled with the model for linear regime of a short channel polysilicon thin film transistor and produces, therefore, a model valid for all regions of device. Acknowledgement The authors gratefully acknowledge the help extended by the Defence Research and Development Organization (DRDO), Ministry of Defence, Government of India. References G.A. Armstrong, S.D. Brotherton and J.R. Ayres A comparison of the kink effect in polysilicon thin film transistors and silicon on insulator transistors, Solid State Electronics, 39, pp , 996. N.D. Arora, MOSFET Models for VLSI Circuit Simulation, Wein, New York: Springer-Verlag, 993. S. Bindra, S. Haldar and R.S. Gupta Modeling of kink effect in polysilicon thin film. transistor using charge sheet approach, Solid State Electronics, 47, pp , 23. S.D. Brotherton Polycrystalline silicon thin film Transistor, Semicond. Sci. Technol.,, pp , 995. S.S. Chen, F.C. Shone and J.B. Kuo A closed-form inversion type polysilicon thin-film transistor dc/ac model considering the kink effect, J. Appl. Phys., 77, pp , 995. S. Chopra and R.S. Gupta Subthreshold conduction in short channel polycrystalline-silicon thin-film transistors, Semiconductor Science and Technology, 5, pp , 2a. S. Chopra and R.S. Gupta An Analytical Model for Turn-On Characteristics of Short Channel Polycrystalline-Silicon Thin-Film Transistor for Circuit Simulation, MicroElectronics Engineering, 54, pp , 2b. S. Chopra and R.S. Gupta Cut-off frequency and transit time analysis in short geometry poly-si thin film transistors, International Journal of Electronics, 88, pp , 2.

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