Anti-Counterfeit, Advanced Microelectronics Packaging Solutions for Miniaturized Medical Devices

Transcription

1 Anti-Counterfeit, Advanced Microelectronics Packaging Solutions for Miniaturized Medical Devices Rabindra N. Das, Frank D. Egitto, and How Lin Endicott Interconnect Technologies, Inc., 1093 Clark Street, Endicott, New York, Abstract The medical industry is clearly and urgently in need of development of advanced packaging that can meet the growing demand for miniaturization, high-speed performance, and flexibility for handheld, portable, in vivo, and implantable devices. To accomplish this, new packaging structures need to be able to integrate more dies with greater function, higher I/O counts, smaller die pad pitches, and high reliability, while being pushed into smaller and smaller footprints. As a result, the microelectronics industry is moving toward alternative, innovative approaches as solutions for squeezing more function into smaller packages. This paper discusses the development of advanced packaging that can meet the growing demand for miniaturization, high-speed performance, and flexibility for miniaturized electronic devices. In particular, recent developments in high density interconnect (HDI) substrate technology are highlighted. System-in- Package (SiP), embedded passives, stacked packages, and flex substrates are utilized to achieve significant reduction in size, weight, and power (SWaP) consumption in electronic devices. The paper also describes a novel approach for the fabrication of silicone-coated flexible substrates to provide biocompatibility for implantable devices. In particular, we highlight recent developments on silicone coatings on high density, miniaturized polyimide-based flexible electronics. A variety of high density circuits ranging from 11 microns lines/space to 25 microns lines/spaces were processed on polyimide flex substrates and subsequently coated with biocompatible silicone coatings. The electrical performance of silicone coated batteries was characterized by voltage measurements. The final structure enhances the stretching capability. Fabrication of advanced medical substrates incorporating technologies for parts authentication (anticounterfeit measures) such as embedded signature circuits and use of nano or micro materials as signatures are discussed. In some instances, these measures do not add cost to package fabrication. Key words Anti-counterfeit, advanced packaging, medical device, high density interconnect (HDI), System-in-Package (SiP). I. Introduction There is a strong desire to develop anti-counterfeit, advanced packaging that can meet the growing demand for miniaturization, high-speed performance, and flexibility for handheld, portable, in vivo, and implantable devices. The World Health Organization (WHO) has identified counterfeiting to be a major risk to the medical device industry [1]. Reports such as those published by the International Medical Products Anti- Counterfeiting Taskforce (IMPACT) identify and discuss in detail some of the issues involved. Tampering of electronic components is a twofold risk. First, sensitive health information stored on a device can be accessed and vital information for device operation can be altered. Secondly, replacement of components with counterfeit components can cause a device to malfunction or carry out malicious acts. The paper discusses development of proven anti-counterfeit and product authentication solutions that can be incorporated into a variety of implantable or single use and disposable medical devices. The wide range of applications for medical electronics drives unique requirements that can differ significantly from commercial & military electronics. To accomplish this, new packaging structures need to be able to integrate more dies with greater function, higher I/O counts, smaller die pad pitches, and high reliability, while being pushed into smaller and smaller footprints [2]. As a result, the microelectronics industry is moving toward alternative, innovative approaches as solutions for squeezing more function into smaller packages. In the present report, key enablers for achieving reduction in size, weight, and power (SWaP) in electronic packaging for a variety of medical applications are discussed. These enablers include materials selection, embedded passives, System-in-Package (SiP), flex and rigid-flex circuits. Manufacturing methods and materials

2 for producing advanced organic substrates and flex along with ultra fine pitch assemblies are discussed. The paper also describes novel anti-counterfeiting approaches for the fabrication of medical devices. A variety of nano-micro composite based signature materials well suited for electronic packaging applications have been developed. These materials enable verification of authenticity with excellent control of signature properties. Figure 1. Top and center: SEM microghaph of circuit traces and plated vias on a flexible polyimide substrate. Bottom: Optical photo in cross section of a double-sided flex substrate with 25 µm plated vias and 11 µm wide plated metal traces. IIA. Microflex and Ultra Fine Pitch Flip Chip Assembly Flexible technologies are important at all levels of microelectronics due to their desired properties, bend radius, and ability to fit within the system housing. The classification of flex is varying with its rapidly growing technological significance in electronics. Continuous technological growth and application of new complex structures are forcing changes in the limits placed on the term of classical flex. Now flex defines the technology relating to any bendable or stretchable structures or devices. A key attribute of a flexible substrate is its minimum bend radius. The final structure bend radius solely depends on dielectric layer (composition, thickness), circuit design, and number of layers. Most of the miniaturized SWaP (size, weight and power) reduction applications use high density flex circuits due to their flexibility, reduced weight, and space savings. For example, flexible solar cells, displays, and sensors typically use high density flex substrates. Multi-layer rigid structures can be converted into single or double layer high density flex structures and open up new directions for SWaP reduction in next generation technology applications. Our current flex technology is capable of fabricating a variety of flex devices by utilizing thin or ultrathin polyimide flex material and the fine line circuitization required for SWaP reduction. Metal and/or organic solder dams to prevent solder bridging during flip chip assembly, and is key for use of bare die in fine pitch applications. Figure 1 illustrates SEM micrographs and a photograph of a cross section of a double-sided high density flexible substrate. Fine line circuitization was achieved using a semi-additive, or pattern plating, process to produce features having line width and spacing between lines of 11 µm and metal layers having thickness of 2 to 10 µm. Vias having diameters of 25 to 50 µm are drilled through the polyimide film using a frequencytripled Nd-YAG laser, and subsequently plated using the semi-additive plating process. The circuitized flex substrate was coated with flexible soldermask, 6-10 µm thick, on both sides of the substrate, prior to placement of die and/or other surface mounted components on the flex. Multiple and various double-layer flex substrates can be laminated together with a joining layer and subsequently drilled and plated to achieve electrical interconnection between adjacent flex substrates. Each flex can have signal, voltage, and ground planes. It is also possible to use signal, voltage, and ground features on the same plane. As a case study, 6 double layer flexes were used together with joining layers to fabricate multilayer flex substrates. Two basic building blocks are used for this case study. One is a double layer flex and the second building block is a joining layer. By alternating flex and joining layer in the stackup one can fabricate a multilayer structure. A six metal layer structure with six single-sided flex substrates, each having thickness of 12.5 µm and five joining layers each having thikness of 25 µm, is shown in Figure 2. Total thickness of the laminated multilayer flex is about 190 µm. A similar approach with

3 double-sided flex substrates would yield a package having 12 metal layers without an appreciable increase in total laminate thickness. The current process can be used to fabricate a wide range of multilayer substrates with joining layers, having PTH diameters in the range of 50 to 150 µm. Figure 2. Optical photo of a multi-layer flex substrate and corresponding cross sections. II B. Embedded Passives and Active Devices Passives account for a very large part of today s electronic assemblies. This is particularly true for digital products such as cellular phones, camcorders, computers, and defense devices. Market pressures for new products with more features, smaller size and lower cost virtually demand smaller, compact, complex circuit boards. An effective strategy is to reduce the number of surface mounted passives by embedding them in the substrate or printed wire boards. In addition, current interconnect technology to accommodate surface mounted passives impose certain limits on board design, which limit the overall circuit speed. Embedding passives is one way to save substrate real estate, conversion cost, reduce parasitic effects, and improve performance. Among the various passives, embedded capacitors deserve special attention as they provide the greatest potential benefit for high-density, high-speed and low-voltage IC packaging. Capacitors can be embedded into the interconnect substrates (printed wiring board, flex, MCM-L, interposer) to provide decoupling, bypass, termination, and frequency determining functions. In order for embedded capacitors to be useful, the capacitive densities must be high enough to make layout areas reasonable. Available commercial polymer composite technology is not adequate for high capacitance density thin film embedded passives. Several polymer nanocomposite studies so far have been focused on processing of high capacitance density thin films within small substrates and wafers. One of the important processing issues in thin film polymer nanocomposite-based capacitors is to achieve high capacitance density over a large coating area. Embedding of components will greatly reduce the size, weight and power (SWaP) of an application. Thin film resistors are readily incorporated into the laminate substrate fabrication processing, substantially minimizing the discrete resistor count. Laser trim aids in meeting design requirements for tight resistor tolerances. New technologies for embedding active die are being developed and implemented into the manufacturing environment. A variety of active silicon die with metal pads, have been embedded and electrically connected to develop highly integrated packages, including RFID. Techniques have also been developed to embed thin, solid-state batteries into laminate substrates. An embedded active based CoreEZ package was developed using HDI technology. A variety of different size active devices were embedded into core materials. Figure 3 shows various middle cores and substrates having embedded actives. A variety of chips, ranging from 1 square mm to 1 square inch, were embedded into the middle core of a CoreEZ product. The present process allows lamination of large size actives. We have embedded a quantity of 9 actives in one lamination, with each active being one square inch. The active components survived lamination and other substrate fabrication processes and were still functional after the final substrate fabrication process. Figure 3: Embedded actives. (A-B) Core with embedded actives, (C) substrates with embedded actives, and (D) 26 mil thick substrates with embedded actives. IIC. System-in-Package Some System-in-Package (SiP) designs eliminate packaged die by directly attaching the bare die to the SiP with finer pitch flip chip technology [3]. Additionally, the area used for surface mount passive components can be greatly reduced by embedding many of the capacitors and resistors into the substrate. Thinner, high-density interconnect substrate technologies with lower inductance, minimize the need for decoupling capacitors in the design. In some cases, the Printed Wiring Board (PWB) connector systems that consume large amounts of space in the board assembly can be reduced with a small pitch connector system. The overall approach is able to covert a large PWB assembly into a much smaller SiP with the

4 full surface area on both sides of the substrate effectively utilized to mount active and passive components. For example, a high-density interconnect and embedded passivebased substrate technology combined with smaller bare die and component body sizes have been shown to result in approximately 27 times physical size reduction for existing printed wiring board assemblies, with considerable reductions in weight and power consumption (Figure 4). Reduced interconnect lengths and corresponding load is responsible for power consumption reduction. Shorter interconnect length further reduces or eliminates the need for termination resistors for some net topologies. The SiP designs can be implemented on various package levels depending on the application requirements including full systems, functional modules, MEMS sensor related packaging, and component obsolescence issues. High Density Substrate Bare Die Embedded Passives Embedded Actives Size Reduction up to 27x form factor for implantable cardiac devices such as implantable cardioverter defibrillators (ICDs) and pacemakers. The 8-layer substrate cross-section shown incorporates high density buildup layers to accommodate reduced die pad pitch and improve electrical performance. A Z-axis interconnect approach is another way to achieve HDI substrates. Specifically, metal-to-metal z-axis electrical interconnection [2] among the cores of varying size or among flexible and rigid elements (rigid-flex), to form a single HDI structure is described. The structure employs an electrically conductive medium to interconnect thin cores. The cores are built in parallel, aligned, and laminated to form a variety of multilayer high density structures including rigid, rigid-rigid, rigid-flex, stacked packages, or RF substrates. Thin film resistor material can provide individual miniaturized resistors with areas as small as 0.2 mm 2. Laser trimming can produce tight tolerance resistors that possess nearly equivalent tolerance to those available in SMT packages. High Dk nanomaterials and active devices are incorporated into the stack-up to provide embedded capacitance and embedded actives, respectively. HDI substrate technology, component footprint reduction, and ability to assemble miniaturized components on dense substrates are important for significant SWaP reduction. Figure 4. SWAP reduction via System-in-Package. II D. High Density Substrate Technology A key enabling technology to achieving SWaP reduction for electronics is the substrate. A substrate supplier must offer a range of substrate material sets and solutions to meet different form factor and performance requirements. When a greater degree of miniaturization is required in a rigid substrate, semiconductor packaging laminates fabricated using laminate materials that do not contain glass cloth, unlike typical printed circuit board laminate materials, allow for the formation of higher resolution vias by UV laser drilling as opposed to more conventional mechanical and CO 2 laser drilling. The smaller via size minimizes capture pad area requirements and enables a much greater via density, resulting in substrate size reduction as compared to conventional technology. The absence of the glass cloth also results in a smoother dielectric surface finish, enabling higher resolution photolithography for finer line and space widths. resulting in improved wiring density. Because of the omission of glass cloth, the dielectric layer thickness is substantially less, therefore, the overall laminate stack-up is much thinner. Figure 5 depicts a rigid, wirebondable organic substrate that enables increased functionality in decreased Figure 5. High density miniaturized circuitry enables miniaturization for increased functionality and/or decreased form factor for implantable devices. Figure 6: Schematic cross section of Package-Interposer- Package (PIP) construction with 4 packages and 3 interposers

5 number of interposers for n number of packages. Figure 6 shows extended PIP structures for connecting four (n) packages with three (n-1) interposers using solder-based interconnection. An optical photo of the extended PIP structure is shown in Figure 7. A Figure 7: Photograph of Package-Interposer-Package (PIP) construction with multiple packages and interposers. II E. Package-Interposer-Package (PIP) Package-Interposer-Package (PIP) [4] is a 3D integration approach used for combining multiple substrates, stacked die, stacked packaged die, etc., into a single package. PIP also favors high density, complex, system integration by choosing appropriate substrate design and interconnects management. Reworkable solder-based interconnects were used for electrical interconnection between the packages. Traditional Package on Package (PoP) approaches use direct solder connections between the substrates and preclude (or limit) the use of stacked die on the bottom substrate, in order to reduce the distance between the packages to achieve finer pitch. Increasing the number of dies stacked and attached to the bottom package will increase the distance between the packages and hence will require larger solder balls to connect the packages. Larger solder ball will increase the overall package pitch. For PIP, the stability imparted by the interposer eliminates stiffener requirements, results in less warpage, reduces interconnect distance, and allows assemblers of the PIP to select the top and bottom components (substrates, die and stacked TSV die, modules) from various suppliers. This mitigates the problem associated with the warpage variation trends from room temperature to reflow temperature for different materials/processes/ substrates/modules when combined with other packages. PIP is suitable for more space-efficient designs, and can accommodate any stacked die height on the bottom package without compromising warpage and stability. PIP can accommodate organic, ceramic, or silicon modules with single or stacked assembled die, where each module or die can be detached and replaced without affecting the rest of the construction. PIP can also accommodate heterogeneous technologies including 2D and 2.5 D technology. PIP will be appropriate for expensive high-end electronics, since a damaged, non-factional part of the package can be selectively removed and replaced. A Package-Interposer-Package (PIP) test vehicle was fabricated by alternating four packages and three interposers in the lay-up and joining them together with solder using a reflow process. PIP requires at least (n-1) C B Figure 8: Various silicone-coated substrates. (A) Transparent silicone coated electronics, and (B)-(C) Silicone coated flex before and after stretching, respectively

6 Figure 9: Photographs of silicone coated flexible electronics shown in cross section. (A)-(E): Lower to higher magnification photographs of silicone-coated flexible electronics containing multiple silicon dies. II F. Biocompatible Coatings: US implantable medical devices are forecast to exceed $50 billion in Pacemakers, implantable cardioverter defibrillators ICDs, neurostimulators, etc. are among the most common implantable devices available in the market. Today s implantable devices demand increased reliability, extended operational life, as well as significant SWaP reduction. Advanced miniaturized flex solutions are achieving significant reduction in physical size for existing printed wiring board assemblies. Primary reductions in size and weight are due to polyimide film and high density circuits. Although polyimide is an excellent material for high-density flexible circuits, it is not biocompatible. In the present study, silicone is chosen for its biocompatibility, stechibility, and commercial availability. In the present paper, a novel biocompatible coating approach that has the potential to surpass conventional coating to produce thin and stretchable polyimide substrates over large areas is reported. Specifically, we are focusing on new composite biocompatible silicone materials that can be deposited onto substrates or used in a roll-to-roll manufacturing processes. In the present process, silicone increases overall strechability, whereas the polyimide provides better processability, flexibility, and mechanical robustness. The effects of coating thickness on the observed flex performance and the stability of coated substrates are presented. A variety of silicones and their deposition onto polyimide were investigated in order to achieve thin uniform coatings. In a typical procedure, silicone was prepared by mixing appropriate amounts of the individual components. A thin coating of this silicone was then deposited on a circuitzed substrate. A circuitized polyimide substrate was sandwiched between two thin silicone coatings and the films were laminated together. A real challenge in the development of large area thin silicone coatings is the incompatibility that exists between the polyimide and silicone matrix. As a result inferior coatings with poor performance are obtained. Proper design and surface treatment have been identified that result in excellent bonding and good quality coatings. Figure 8 shows a series of filled silicone-coated thin and thick films. Thicker silicone coating facilitates stretching as can be seen in Figure 8(B) and Figure 8(C). The color of the coated polyimide film can be seen through the somewhat transparent thin silicone coatings. Film transparency reduces with increasing thickness and eventually attains the color of the filled silicones. Figure 8(A) represents a thin transparent coating using unfilled silicones. It is interesting to note that present technology can produce transparent, stretchable, thin silicone-coated flexible electronics (see Figure 8A). Figure 9 shows cross sectional photographs of silicone-coated flexible electronics (Figure 8A). Specifically, Figure 3 shows the die area in cross section. Flex modules containing multiple dies and circuit traces are coated with silicone. There was no defect observed in the dies, indicating that the coating process was not affecting the electronics. Spaces between circuit traces fill uniformly with silicone during lamination. Figure 10: Silicone coated battery in KOH solution (ph: 13). It is possible to make a wide variety of biocompatible silicone-coated batteries with different coating thickness. A silicone-coated battery was prepared to measure voltage under extreme environmental conditions. The electrical properties of coated batteries fabricated from silicone coating showed stable voltage even after immersion at 13 ph for about 2 months (Figure 10). Initial voltage (prior to coating) of the battery was 4.4V. Over a period of two months, voltage changed from 4.4 V to 4.3V. The small change in voltage is due to manual measurement which damages the electrode. Figure 11 shows the room temperature voltage profile of coated battery immersed in acid and base solutions. The voltage profile is fairly constant in acid and base solutions. This indicates the silicone coating is stable enough for the battery or electronics to serve as an insulating material and will have no effect under body fluid solution (ph 7.4)

7 46th International Symposium on Microelectronics (IMAPS 2013) Sept Oct. 3, 2013 Orlando, FL USA Figure 13: Multifunctional nano-micro materials. Electrical and optical signature response (Inset: White ID prior to optical response). Figure 11: Voltage change with time. Figure 12: Top: white ID, Bottom: optical signature. II G. Anti-Counterfeit Advanced Packaging This paper also reports novel anti-counterfeiting approaches for the fabrication of advanced packaging. There are several anti-counterfeit signature approaches possible, but applying them to the manufacturing environment is critical. The manufacturing environment requires faster and cheaper ways to authenticate components. Furthermore, processing cost of anti-counterfeit signatures sometimes limits their application. Fabrication of advanced packaging with parts authentication technologies such as embedded signature circuits with zero cost adders and signature nano or micro materials possess these desired attributes of anti-counterfeit measures. Figure 14: Measurement results of identically constructed traces with and without embedded anti-counterfeit signatures Nano-micro material based signature marks can provide protection for components in a manufacturing environment. Individualized custom nano-micro materials can be developed and applied as printable ink, printable paste, or coatings to a host of carriers. Nano-micro materials with specific optical and or electrical properties can be used to provide a secure signature for many security applications. They can help protect the quality and integrity of products by virtually

8 protecting any item throughout the supply chain. We have identified a nano-micro material system that provides optical/electrical response characteristics. Optical response depends on the ingredients of the nano-micro materials. Figure 12 illustrates white ID on a component s surface and its optical response characteristics. This concept is useful for producing multiple colors from the same white ID, and each color can be used to represent an individual number for making it more secure approach. Figure 13 shows another option of anti-counterfeiting using multifunctional nano-micro materials. Here we have used electrical and optical response characteristics as anti-counterfeit measures. There is a significant additional manufacturing cost adder for deploying most anti-counterfeit measures in electronic components. However, by embedding unique electronic signatures in circuit traces, one can easily authenticate parts with the presence of expected signatures. The signature creation process is simply accomplished at the component artwork generation stage. Small circuit signatures are purposely introduced in one or more selected traces at the creation of artworks. There is no cost adder for manufacturing these components since they are formed concurrently with the functional circuits. The small circuit signatures do not adversely affect normal circuit function, and they resemble other common, naturally occurring defects found in substrates and PCBs. The camouflage characteristic of this anticounterfeit technology offers an added level of protection. A signature analyzer designed specifically for this application is used to excite the selected circuit traces and acquire the resulting signatures. The two ends of the circuit trace under test are probed with this analyzer. A low frequency AC signals is injected into the circuit trace and the low level modulated harmonics are acquired and analyzed. The composite amplitude and phase angle modulation of the harmonics (signatures) are largely dependent on the construction and makeup of the substrate/pwb. The observable normal harmonic modulation of the excitation signals (Reference Baseline) are uniquely produced due to the specific substrate material sets used, conductor resistivity, cross-section geometry and the length of the traces. The presence of an anti-counterfeit signature in the selected circuit traces causes additional harmonic modulation above the Reference Baseline signal level. Therefore authentic parts can be identified easily using the signature analyzer by comparing detected circuit trace signatures to that stored in the database for this specific component. Typical data collected utilizing this technology is shown in Figure 14. have been successfully implemented to reduce electronics volume and advance the capabilities of electronic device technology. For advanced flex and rigid-flex circuit constructions, high resolution photolithography and semiadditive plating processes, are important to achieve higher wiring density with the fine line circuitry required for ultra fine pitch flip chip assembly. A PIP approach was developed for 3D integration of various stacked package constructions. This approach is favorable for miniaturized expensive electronics where part of the package or system, if necessary, can be replaced or repaired, or even upgraded without compromising overall electrical performance. Thin biocompatible coating technology based on silicone was developed to produce biocompatible polyimide-based flexible electronics. The technology is able to produce a silicone coated battery. Silicone coated batteries were stable in extreme acid and base environments. The silicone coating offers the necessary isolation and biocompatibility for flexible electronics to be used in body fluid solutions. The observed lifetime of silicone coated devices may be sufficient for longterm use as it survives extreme environments. Silicone coating also improves strechability of flexible substrates. Thicker silicone coatings increase strechability. A variety of signature responses well suited for electronic packaging applications have been developed that enable verification of authenticity with excellent control of signature properties. Acknowledgments The authors acknowledge the valuable contributions of J. Huang, E. Kopp., B. Bonitz, F. Marconi, B. Wilson, B. Pennington, M. Shay, G. Thomas, and S. Bagen. References F.D. Egitto, S.R. Krasniak, K.J. Blackwell, and S.G. Rosser, Z-Axis Interconnection for Enhanced Wiring in Organic Laminate Electronic Packages, Proceedings Fifty-Fifth Electronic Components and Technology Conference, May 31 to June 3, 2005, Lake Buena Vista, FL (IEEE, Piscataway, NJ, USA), p Steven G. Rosser, Irving Memis and Harry Von Hofen, Migrating Printed Wiring Board Assemblies into System in a Package (SiP) IMAPS 41 st International Symposium on Microelectronics, November Rabindra N. Das, Frank D. Egitto, Barry Bonitz, Mark D. Poliks, and Voya R. Markovich, Package-Interposer-Package (PIP): A Breakthrough Package-on-Package (PoP) Technology for High End Electronics 61 st Electronic Components and Technology Conference proceedings, (June 1-4, 2011). III. Conclusions: Miniaturization of electronic devices drives the need for unique solutions for achieving increased functionality with decreasing size, weight and power (SWaP). By integrating the building blocks of SiP, advanced substrate technology, novel interconnection cross sections, embedded passives and actives, and stacked packages, advanced packaging solutions