DSA Hole Defectivity Analysis using Advanced Optical Inspection Tool

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1 DSA Hole Defectivity Analysis using Advanced Optical Inspection Tool Ryota Harukawa a, Masami Aoki a, Andrew Cross a, Venkat Nagaswami a, Tadatoshi Tomita b, Seiji Nagahara c, Makoto Muramatsu b, Shinichiro Kawakami b, Hitoshi Kosugi b, Benjamen Rathsack d, Takahiro Kitano b, Jason Sweis e, and Ali Mokhberi e a KLA Tencor Corporation, 1 Technology Drive, Milpitas CA 95035, USA; b Tokyo Electron Kyushu Ltd.,1-1, Fukuhara, Koshi-shi, Kumamoto , Japan; c Tokyo Electron Ltd., 3-1 Akasaka 5-chome, Minato-ku, Tokyo , Japan; d Tokyo Electron America, Inc., 2400 Grove Boulevard, Austin, TX 78741, USA; e Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA ABSTRACT This paper discusses the defect density detection and analysis methodology using advanced optical wafer inspection capability to enable accelerated development of a DSA process/process tools and the required inspection capability to monitor such a process. The defectivity inspection methodologies are optimized for grapho epitaxy directed selfassembly (DSA) contact holes with 25 nm sizes. A defect test reticle with programmed defects on guide patterns is designed for improved optimization of defectivity monitoring. Using this reticle, resist guide holes with a variety of sizes and shapes are patterned using an ArF immersion scanner. The negative tone development (NTD) type thermally stable resist guide is used for DSA of a polystyrene-b-poly(methyl methacrylate) (PS-b-PMMA) block copolymer (BCP). Using a variety of defects intentionally made by changing guide pattern sizes, the detection rates of each specific defectivity type has been analyzed. It is found in this work that to maximize sensitivity, a two pass scan with bright field (BF) and dark field (DF) modes provides the best overall defect type coverage and sensitivity. The performance of the two pass scan with BF and DF modes is also revealed by defect analysis for baseline defectivity on a wafer processed with nominal process conditions. Keywords: directed self-assembly, grapho-epitaxy, defectivity, optical inspection 1. INTRODUCTION Lithography beyond 1x nm memory / 2x nm logic devices has become more and more challenging. Next generation lithography (NGL) technology beyond ArF immersion lithography resolution is required to meet the needs of these advanced design rule nodes. As an alternative or complementary patterning technology for smaller critical dimension (CD), Directed Self-Assembly (DSA) is gaining more attention DSA can be used for hole and line multiplication to shrink pattern pitch The multiplication techniques are considered to be a promising complimentary technology to enhance lithography resolution. Also DSA can be used for hole shrink approach in a guide structure combining multi patterning or EUV to make small pitches The approach to generate a DSA pattern in specific or restricted area in guide patterns is called grapho epitaxy Using the grapho epitaxy approach, multi holes in a guide pattern can be patterned with narrower pitches. Using this unique technique,the application of grapho epitaxy for contact holes has attracted a growing interest as a future NGL technology for semiconductor mass production. The patterning performance of grapho epitaxy DSA holes has been verified by many researchers The approach is known to improve CD uniformity and reduce contact hole edge roughness (CER) for contacts in the range of 25 nm or smaller 6,13. One of the remaining challenges will be effective defect monitoring to improve processes for mass production. This paper will discuss defect density detection and analysis methodology using advanced optical wafer inspection capability. After the explanation of experimental conditions in section 2, we will discuss how we utilize the programmed defects to optimize the wafer inspection optical condition in section 3.1. Then in section 3.2, we analyze programmed defect capture rate results to identify the best methodology for defect monitoring to capture a wider range of defects. In section 3.3, the optimized defect recipe is used to examine a processed wafer without programmed defects. Metrology, Inspection, and Process Control for Microlithography XXVII, edited by Alexander Starikov, Jason P. Cain, Proc. of SPIE Vol. 8681, 86811A 2013 SPIE CCC code: X/13/$18 doi: / Proc. of SPIE Vol A-1

2 2. EXPERIMENTAL The first step of this study is to identify optimum defect inspection conditions for the grapho-epitaxy DSA process flow in Figure 1. First the resist guide contact hole is patterned with a negative tone development (NTD) by ArF immersion scanner ASML TWINSCAN XT:1900i with NA1.35 and CLEAN TRACK TM LITHIUS Pro TM Z by Tokyo Electron Ltd. (TEL) located at Tokyo Electron Kyushu Ltd. The negative tone development (NTD) type thermally stable resist guide is used for DSA of a polystyrene-b-poly(methyl methacrylate) (PS-b-PMMA) block copolymer (BCP) is coated, baked and wet developed by using a CLEAN TRACK TM LITHIUS Pro TM Z. --LL Guide patterning (Imm ArF NTD) BCP coating PR BCP separation (Anneal) e Pattern transfer to film PR/PS removal Figure 1. Wafer inspection step (green box) in the grapho epitaxy BCP process flow KLA 2800 inspection system at Tokyo Electron Kyushu Ltd. was used for this investigation. We used a programmed defect reticle to enable faster learning to optimize the wafer inspection recipe. In the programmed defect reticle, we designed size variations on contact hole guide patterns printed to create a number of DSA defect types. Onm Y ED. 67nm XY X >. II- Shrunken 45nm 43nm 41nm 2nm step 25nm 23nm XY ' I. X Il I Y ' M = Expanded 45nm 47nm 49nm 2nm step 63nm 65nm Figure 2. Schematic drawing of programmed defect shape/size variation (size is on the wafer) Since DSA is a self-assembly process it is difficult to directly produce DSA defects. Therefore, we intentionally make defects using different shrunken and expanded features in the guide patterns to generate defects of interest in the final DSA patterns. The use of programmed defects enhances our ability to optimize a wafer inspection recipe, with faster time to results. The programmed defects in guide patterns place potential DSA defects of interest in known locations. This provides a more effective defect inspection recipe optimization with a more complete picture of all the defect types of potential interest rather than by optimizing on a sample with only random generated defects on a particular wafer. Proc. of SPIE Vol A-2

3 Also cases of evaluating sensitive materials such as photoresists or DSA polymers, we have to take extra care in identifying candidate defects as SEM review can damage the materials. SEM review is an essential step to verify defect types during inspection recipe optimization. When there are multiple occurrences by die or reticle field with programmed defects this becomes a much more manageable problem as we can limit review to certain regions of the wafer and still allow further inspection optimization if necessary on a single sample. An additional benefit of using programmed defects for recipe optimization is that we can enable accurate quantification of wafer inspection recipe sensitivity on a repeat scan capture rate calculation with a single sample wafer. The programmed defect reticle design in this study uses a hole pattern with shape/size variation on a repeating array of 75 nm contact holes with a 110 nm pitch on the wafer. We have both shrunken and expanded holes in X, Y and XY directions provide a total of six shape variants. Each variant has a range of sizes and a total of 81 programmed defects have been added to each exposure field. For this study we have fully exposed a 300 mm sample wafer with this programmed defect reticle. The reticle design was implemented on the Virtuoso TM CAD platform by Cadence. The lithography model for the scanner was calibrated by the Cadence Computational Lithography Solutions group beforehand using AcuWafer TM. Finally, the optical proximity correction and verification was performed on the entire layout using the Cadence Dimension PPC TM system. The focus of this study is on the inspection of the post PMMA removal process step with wet development (Wet-Dev) as we expect to have better contrast than BCP phase separation latent image after DSA annealing. As the programmed defects are printed in the array region, we can apply a cell-to-cell inspection mode in this study enabling greater inspection signal to noise than a die-to-die inspection would provide. 3. RESULTS AND DISCUSSION 3.1 Programmed defect observations and wafer inspection optical condition optimization The programmed defects occurring after DSA Wet-Dev were observed using an edr5210 SEM review tool to understand the DSA defect types generated. A master review file containing all programmed defect coordinates was prepared to allow us to visit all 81 of the programmed defect locations per die on multiple dies. The master file is used to develop an understanding of the defect types that formed and any across wafer printability distribution. Through observation, it is confirmed that the grapho epitaxy guide pattern bias can control DSA defect creation, in the case of both of shrunken and expanded contact holes. If the guide hole pattern is not printed or is significantly smaller, no selfassembly is found. As the guide hole size increases towards nominal, then a shrunken assembly is formed and at a certain threshold the pattern assembles as expected. In the case of larger guide hole pattern printing, assembled holes are distorted and or multiplied. Through these observations, we identified several defect types which fall into two major categories. One is DSA failure where the guide pattern is printed somewhat normally but a defect occurs in the DSA material. The other is DSA failure where both the guide and DSA fail, that is, where a failure of the guide pattern is translated into a failure of the DSA pattern. Multiple examples of each defect type were selected as candidates to optimize inspection optics conditions. To optimize the optics conditions, we ran an Optics Selector (O/S) session on selected programmed defects. O/S is a function of the wafer defect inspection tool which enables the automatic collection of signal and noise values for multiple defects in order to allow quantitative comparisons between different optics conditions for signal to noise ratio (S/N) and signal to noise subtraction (S-N). From this analysis, the top bright field (BF) and dark field (DF) inspection modes were chosen. Proc. of SPIE Vol A-3

4 Guide not printed (F -3) 56nm guide (F-7) 11 L l' l,ì L ` 1/4: Q LuLk LI= 83nm guide (F-11) 85nm guide (F-12) 60nm guide (F-8) 93nm guide (F -15) 66nm guide (F-9) 89nm guide (F-17) 74nm guide (F -10) 99nm guide (F -1S) 118nm guide 107nm guide (A-10) (A-11) ` 1v ``l ` ` 97nm guide (A-15) kw, jgh 97nm guide (A -16) 118nm guide (A-12) V `.. 4 ` 114, 109nm guide (A-13) `LZZ ILIA= 103nm guide (A-17) 95nm guide (A-18) 1;1\1 :N \1 1 1:11.1: 1 `, 1 \1 \ i :.\ Figure 3. Programmed defect SEM observation examples, shrunken guide pattern (left) and expanded guide pattern (right) 109nm guide (A-14) 3.2 Programmed defect capture rate measurement To quantify the wafer inspection sensitivity of the selected optics conditions, we measured the capture rate of programmed defects. Our capture rate measurement focused on each specific programmed defect detected during ten repeat scans. For example, if one programmed defect is detected ten times during repeat scans, its capture rate is 100%. We can ignore guide pattern size variation and DSA defect reproducibility in this measurement method. We sampled multiple programmed defect locations with different capture rates. These results were then brought for SEM review to understand which defect type and guide pattern size causes a DSA defect. During this study, we ran 10 ten repeat scans with each of the identified BF and DF modes. Through this analysis, we were able to quantify the impact of printed guide pattern bias on DSA pattern formation by calculating the wafer inspection capture rate. If the printing bias is smaller than 10 nm from the center condition, no assembly or under sized assembled holes are observed. If the bias is larger than 10nm from the center condition, distortion or multiple assembly is observed. We observed capture rate differences between BF and DF mode dependent on defect type. We determined in order to maximize sensitivity, a two pass scan with BF and DF modes provides the best overall defect type coverage and sensitivity. No assembly / under hole size No failure Multiple assembly 1 distortion hole cv U,T r L` 1;v, r i.i 7 I:VL:1:, LLi_ l! "E) 40 r NA Center Guide pattern bias (nm) Figure 4. Wafer inspection capture rate for different guide pattern bias causing different defect types 3.3 Defect baseline study The process defectivity on a certain wafer was studied by using a two pass scan with BF and DF modes which was optimized using the programmed defects in section 3.2. All defects in a selection of 15 fields were reviewed. The inspected area used in this test was the area of the reticle field which does not contain the programmed defects. The results are shown in Figure 5. Proc. of SPIE Vol A-4

5 Bright field inspection mode Dark field inspection mode Composite Result Non Visual OSA Failure Embedded On Material Total 8.2 Figure 5. Defect category ratio by inspection mode and composite result From this experiment, we discovered that more than 98% of defects can be captured with DF inspection mode on this processed wafer. The defects detected only with BF inspection mode are less than 2% of total number of defects in this case. However, as process optimization continues this ratio may change dependent on the defect types seen to be most prevalent. The highest portion of defects on the wafer is on-material defects which accounts for 37.4% while the embedded material defect is 10.2%. On-material and embedded material defects are considered to be the defects which can be reduced by further optimization in wafer processing. The rate of DSA failure defect such as missing hole is low at 2.8%. DSA failure detected with BF mode is 0.6% and with DF mode is 2.8%. All DSA induced failures were captured with DF mode inspection on this wafer. From the programmed defect study, DSA failure which can be detected with the DF mode inspection was found to be guide resist pattern failures such as CD variation, missing hole or guide pattern distortion. On the other hand, from the programmed defect study, DSA failure which is detected with the BF mode inspection is due to DSA failure without any guide pattern defect. Those defects are only 0.6% of the total pareto. From the results, we consider that DSA baseline process defectivity will not be a critical issue. However, excursion monitoring for these critical patterning defects will be essential. Our project is now focused on improving defectivity for mass production. 4. CONCLUSION Inspection methods sensitive to patterning defects generated in the hole DSA grapho-epitaxy process are identified in this work. This inspection method allows the effective monitoring of DSA hole defectivity during process development. The use of a programmed defect reticle successfully creates DSA defects and enables efficient wafer inspection recipe optimization. Through programmed defect observation during SEM review, the impact of grapho epitaxy guide hole printing bias on DSA defectivity is confirmed. Wafer inspection sensitivity is also quantified by defect type by using repeat scans and capture rate analysis for guide hole bias. The analysis using the inspection data defines the DSA defectivity process window of the guide pattern. It is found that to maximize sensitivity a two pass scan with BF and DF modes provides the best overall defect type coverage and sensitivity. The performance of the two pass scan with BF and DF modes was also quantified by defect analysis on a nominally processed wafer without programmed defects. We believe the methodology for optimizing DSA defectivity monitoring will enable accelerated development of DSA process/process tools and the required inspection capability to monitor such a process. Proc. of SPIE Vol A-5

6 5. FUTURE WORK Defect simulations can be used to predict best modes and expected sensitivity to defects of interest. To allow faster on tool learning for next generation inspection tools on DSA contact patterns, we are investigating the accuracy of such methods for the structures and materials used in DSA grapho-epitaxy contact hole processes. The primary simulations method we are using is a Rigorous Coupled Wave Analysis (RCWA) method for solving Maxwell s equations with the capability for optical inspection systems to capture defects of interest over the system and wafer noise. The RCWA approach allows the development of empirical models based on performance of advanced optical systems, including the impact of noise reduction techniques. Also specific noise models related to contact hole size variation can be included in the analysis. The film stack impact of n and k to the incident illumination and boundary effects are included in the simulation process. Initial models have been completed without the addition of wafer noise, therefore modeling inspection system noise. The models correlate well with the on tool learning for recipe optimization. As process maturity increases the simulation is planned to be used for investigation of wafer noise impact on expected tool sensitivity and confirmation of the best mode selection. ACKNOWLEDGEMENTS We thank the Tokyo Ohaka Kogyo Co., Ltd. for supplying the guide resist samples and BCP samples for DSA. We also thank Hoya Corporation for their contribution in mask preparation. We also thank members in KLA Tencor Corporation, Tokyo Electron Ltd., Tokyo Electron Kyushu Ltd., Tokyo Electron America, Inc., Cadence Design Systems, Inc., for their discussion and support for this paper. REFERENCES [1] Black C. T., Ruiz R., Breyta G., Cheng J. Y., Colburn M. E., Guarini K. W., Kim H.-C., Zhang Y., "Polymer self assembly in semiconductor microelectronics," IBM Journal of Research and Development, vol.51, no.5, (2007). [2] Cheng J. Y., Rettner C. T., Sanders D. P., Kim H. C.; Hinsberg W. D., "Dense self-assembly on sparse chemical patterns: Rectifying and multiplying lithographic patterns using block copolymers," Advanced Materials, 20, (2008). [3] Ruiz R.; Kang H. M., Detcheverry F. A., Dobisz E., Kercher D. S., Albrecht T. R., de Pablo, J. J., Nealey P. F., "Density multiplication and improved lithography by directed block copolymer assembly," Science, 321, (2008). [4] Kim S. O., Solak H. H., Stoykovich M. P., Ferrier N. J., de Pablo J. J., Nealey P. F., "Epitaxial selfassembly of block copolymers on lithographically defined nanopatterned substrates," Nature, 424, (2003). [5] William Hinsberg, Joy Cheng, Ho-Cheol Kim, Daniel P. Sanders, Self-assembling materials for lithographic patterning: overview, status, and moving forward, Proc. SPIE. 7637, 76370G (2010). [6] Benjamen Rathsack, Mark Somervell, Josh Hooge, Makoto Muramatsu, Keiji Tanouchi, Takahiro Kitano, Eiichi Nishimura, Koichi Yatsuda, Seiji Nagahara, Iwaki Hiroyuki, Keiji Akai, Takashi Hayakawa, Pattern scaling with directed self assembly through lithography and etch process integration, Proc. SPIE. 8323, 83230B (2012). [7] Paulina A. Rincon Delgadillo, Roel Gronheid, Christopher J. Thode, Hengpeng Wu, Yi Cao, Mark Neisser, Mark Somervell, Kathleen Nafus, Paul F. Nealey, Implementation of a chemo-epitaxy flow for directed selfassembly on 300-mm wafer processing equipment, Journal of Micro/Nanolithography, MEMS, and MOEMS. 11(3), (2012). [8] Paulina A. Rincon Delgadillo, Roel Gronheid, Christopher J. Thode, Hengpeng Wu, Yi Cao, Mark Somervell, Kathleen Nafus, Paul F. Nealey, All track directed self-assembly of block copolymers: process flow and origin of defects, Proc. SPIE. 8323, 83230D (2012). Proc. of SPIE Vol A-6

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