Board-Level Reliability of 3D Through Glass Via Filters During Thermal Cycling

Transcription

1 Board-Level Reliability of 3D Through Glass Via Filters During Thermal Cycling Scott McCann 12*, Satoru Kuramochi 3, Hobie Yun 4, Venkatesh Sundaram 1, M. Raj Pulugurtha 1, Rao R. Tummala 1, and Suresh K. Sitaraman D System Packaging Research Center Georgia Institute of Technology Atlanta, GA, USA * mccann.scott.r@gmail.com 2 George W. Woodruff School of Mechanical Engineering Georgia Institute of Technology Atlanta, GA, USA 3 Dai Nippon Printing Co. Ltd Wakashiba, Kashiwa, Chiba, Japan 4 Qualcomm Technologies Inc Morehouse Dr., San Diego, CA, USA Abstract This paper theoretically and experimentally assesses the board-level reliability of glass-based 3D Integrated Passive Device (IPD) with TGV-based inductor capacitor (LC) filters in thermal cycling test. Important failure modes such as wellknown solder joint cracking and TGV failure as well as other failure modes such as glass cratering are investigated in this work. Through finite-element modeling, initial reliability predictions are made using a Morrow-Darveaux approach for solder fatigue life. To predict glass cratering, a stress-based approach is used. In the second part of this work, reliability experiments are conducted on fabricated samples, demonstrating reliable 3D IPD glass packages. Failure analysis has found that solder joint cracking and glass cratering have occurred, but no TGV failures have occurred. The experimental results are also compared to numerical predictions. Then, for future designs, the models are used to analyze the impact of key material and design parameters on the experimentally observed failure modes. It is predicted that reducing the glass core thickness will improve solder fatigue life and help prevent glass cratering. Also, TGVs are recommended to be kept away from solder joints to prevent glass cratering. Stress buffering of the dielectric also improves the reliability, though less than glass core thickness. By developing and correlating a model specifically for these devices, this work, for the first time, enables accurate study and optimization of key design parameters for 3D glass IPD radio frequency (RF) devices to achieve high mechanically reliability, highperformance long term evolution band devices, with potentially smaller footprint and thickness compared to current LTCC counterparts. Keywords solder joint reliability; through glass via (TGV); glass cratering; integrated passive device I. INTRODUCTION RF front-end filters are mm-sized RF components which are typically composed of inductors and capacitors, which form an LC networks to function as band-, high-, or low-pass filters. Glass is an ideal substrate for integrating these filters in a unique 3D IPD architecture because of its low loss tangent of (at 2.4GHz). It can be processed with high-density through-vias [1], which enable double side integration of thinfilm filters for reduction in footprint and thickness. Glass, being a dimensionally stable material with a very smooth surface, just like silicon, enables fabrication of passives with fine features with good accuracy [2, 3]. Further, employing ultra-thin build-up polymers with low loss and low permittivity facilitates miniaturization of filters without compromising on performance [4]. Most importantly, there is a low cost potential due to large-area panel manufacturing of 3D IPD glass package [5]. Previous work on the mechanical reliability of glass designed and demonstrated low warpage [6] as well as prevented glass cracking failure due to redistribution layer stress and dicing defects [7, 8]. These 3D IPDs are balled with SAC405 solder and reflow assembled to a FR-4 system board, and then are subjected to board level reliability tests, which include thermal cycling reliability, cyclic bending, drop testing, and electromigration. Failure modes seen after thermal cycling included solder joint cracking and glass cratering. Solder joint cracking typically occurs at the top or bottom of the solder joint, near the intermetallic compound interface. Although solder joint reliability has been extensively studied previously for board level packaging [9-12], the reliability of 3D glass LC filters has not been investigated. Glass cratering is cracking in the glass above the solder joint, which is not previously reported. No TGVs failures were observed in this work, though TGV reliability has been studied [1]. In this work, two 3D LC filter designs measuring 2.0 x 2.5 mm were fabricated on 400 μm thick Corning Eagle XG glass. To form the 3D inductors, 80 μm diameter TGVs were drilled and annularly plated. Dry film polyimide was used for the dielectric and passivation. Inorganic thinfilms with high capacitance density were used for the capacitive layers. Inductor and redistribution layers were deposited. Figure 1 shows the resulting layer stack-up with dimensions for both designs. Additional details regarding the fabrication of these TGV IPDs as well as the high-performance as LC filters for RF front-end application can be found in [13].

2 Figure 1. Layer stack-up of 3D LC filter. These devices are reflowed with conventional surface mount technology assembly onto 1.0 mm thick FR-4 boards (schematically depicted in Figure 2). The first 3D LC filter design had six solder joints with two electrical chains that were tested, one through two corner solder joints and one through the two remaining corner solder joints. The second LC filter design had eight solder joints with two electrical chains that were tested, one through two corner solder joints and one TGV inductor and the other through the two remaining corner solder joints and two TGV inductors. Both designs included the identical inductor designs, though only the second design with eight total solder joints tested the TGV reliability. Ultimately, the goal of this work is to model, design, and demonstrate board-level reliability of 3D IPD LC filters during thermal cycling to achieve high performance with smaller footprint on thinner devices. Figure 2. (a) Full model geometry of 2.0 x 2.5mm 3D TGV IPD LC filter on board and (b) reverse side of 3D TGV IPD LC filter. II. MODELING To model the 3D TGV IPD LC filter devices, models were constructed in Solidworks TM and imported to ANSYS TM 14.5 as Standard ACIS Text files. The exact geometry was modeled parametrically in Solidworks, including copper trace layout, except for the silicon nitride layer which was excluded because it was extremely thin. An example geometry is seen in Figure 2, in which the 2.0 x 2.5 mm device is attached to a 5 x 5 mm size FR-4 board in (a) and the reverse side of the device is shown without the board in (b). Then, in ANSYS, the geometry was meshed, thermal boundary conditions were applied and one point was fixed to prevent rigid body motion. The thermal boundary conditions mimicked the reflow assembly process, cooling the 3D TGV IPD LC filter device, solder, and board from 220 to 25 C, followed by three thermal cycles of -40 to 125 C with five minute ramps and five minute dwells. It should be noted that cooling from reflow temperature is important to determine the residual stress and strain distributions at the end of assembly and effects glass cratering analysis. However, the assembly condition has no effect on damage metrics and the corresponding fatigue life predictions [14]. The material models used are given in TABLE 1; to model solder, the Anand s model reported by Reinikainen [15] is used. TABLE 1. MATERIAL PROPERTIES USED IN MODELING Material Modulus [GPa] CTE [ppm/ C] Glass SAC405 Solder Copper Polyimide (in- plane) 22.4 (T < T G ) 20 FR4 (out-ofplane) 16.2 (T > T G ) 1.6 (T < T G ) 0.4 (T > T G ) 86.5 (T < T G ) 400 (T > T G ) A. Solder Reliability Modeling To predict the reliability of the solder joints during thermal cycling, the traditional approach is based solder constitutive equations and (e.g. Anand s viscoplastic model) and failure models (e.g. energy dissipation density per cycle). The most common method to predict failure is the Morrow-Darveaux approach [10, 16], which is based on the volume averaged viscoplastic strain energy density (SED) accumulated per cycle, (also known as plastic work per volume), which was calculated by using the SEND,PLASTIC command in ANSYS TM and volume averaging it over the volume of interest using the relationship, =, where, and are the accumulated plastic work density per cycle and volume, respectively, for the ith element. This volume over which is calculated is the interfacial elements, which are 5, 10, and 10 μm thick, and are highlighted in Figure 3, which shows the solder mesh. While hexahedral-shaped elements are preferred, tetrahedral-shaped elements were employed for practicality. (1)

3 calculated (TABLE 3 and TABLE 4) using Equations (2-5). In both devices, the single worst joint had a predicted failiurefree fatigue life above 400 thermal cycles. The eight-solderjoint device had better fatigue life predictions because there is more solder volume to absorb the accumulated damage. The solder joints closer to the center of the package generally have a higher life, while the solder joints furthest from the center (located at the corners) generally have the worse life. Comparing the layer averaged SED and the max SED 2 / average SED, it is seen that in both TABLE 3 and TABLE 4, different solder joints have the largest damage metric, predicting different locations of first failure. Figure 3. Example solder joint mesh, with interfacial layer and maximum volume-averaged viscoplastic strain energy density elements highlighted. Using the layer averaged SED, the failure free fatigue life is calculated using, = and the mean fatigue life is calculated using, = + (3) where a is the joint diameter at the interface (260 μm), N 0 is the number of cycles until crack initiation, = (4) is the number of cycles during crack growth, = (5) and K 1, K 2, K 3, and K 4 are coefficients fit based on crack growth rate. These equations vary slightly from Darveaux s classical formulation because this work uses coefficients calculated by Tunga and Sitaraman [17] and Tamin and Shaffiar [18], given in TABLE 2. TABLE 2. COEFFICIENTS FOR MORROW-DARVEAUX FATIGUE LIFE PREDICTIONS [17, 18]. Coefficient Value K K K x 10-4 K While Darveaux has since found maximum SED 2 / average SED to be a more accurate damage parameter [16], there was insufficient available data to predict fatigue life from this damage parameter. As such, both the interfacial layer SED and max SED 2 / average SED are reported, but only the interfacial layer SED was used for fatigue life calculations. The models were run, the layer averaged SED from the third cycle was calculated for each model, the fatigue life was (2) TABLE 3. DAMAGE METRIC AND FATIGUE LIFE PREDICTIONS FOR SIX-SOLDER-JOINT 2.0 x 2.5 mm 3D TGV IPD LC FILTER DEVICE Solder Layer Averaged Max SED 2 / Joint SED Nff N50 Avg SED TABLE 4. DAMAGE METRIC AND FATIGUE LIFE PREDICTIONS FOR EIGHT-SOLDER-JOINT 2.0 x 2.5 mm 3D TGV IPD LC FILTER DEVICE Solder Layer Averaged Max SED 2 / Joint SED Nff N50 Avg SED The cumulative reliability of a 3D TGV IPD LC filter electrical chains includes all solder joints, however, the Morrow-Darveaux model predicts when a single solder joint will fail. To predict the solder joint reliability of the device, the reliability for each individual solder joints,, is first calculated, then the cumulative reliability,, is the product of the individual reliabilities, that is, = Based on the cumulative reliability, the cumulative fatigue life was calculated. In a ball grid array package with many solder joints, this is known as derating. For LC filter devices with a small number of solder joints, each solder joint is critical. Based on Equation (6), the cumulative reliability and corresponding five percent failure (N 05 ) and mean lives (N 50 ) of the devices were calculated (TABLE 5). Due to the small (6)

4 number of solder joints, the cumulative fatigue lives closely tracked the worst joint in all cases. TABLE 5. FATIGUE LIFE PREDICTIONS FOR CUMULATIVE RELIABILITY OF 2.0 x 2.5 mm 3D TGV IPD LC FILTER DEVICES Solder Joints N05 N B. Glass Cratering Modeling In addition to solder fatigue predictions, the models were also used to analyze glass cratering. Since glass is a brittle material and there was no known crack prior to the failure, the first principal stress was chosen as the primary variable of interest in predicting and analyzing failure. To identify when and why glass cratering may occur, the stresses were analyzed at -40 and 125 C, the extreme temperatures during thermal cycling. The stresses in glass are caused by local effects of the surrounding materials, copper and polyimide, and by global effects, which are due to the coefficient of thermal expansion (CTE) mismatch between the glass core and FR-4 board. Globally at -40 C, the higher CTE of the FR-4 board (22.4 / 16.2 ppm/ C in-plane) than the glass (3.3 ppm/ C) causes a shear on the solder joint which produces tension in the glass on the side away from the package center. Locally at -40 C, the copper directly metallized to the glass is trying to shrink, which produces compressive force on the glass. The global effects are much larger than the local effects, producing a large net tensile stress on the side away from the package center, which, even without the presence of a preexisting crack, can cause glass cratering above the directly metallized glass. To illustrate the combined effects, the critical plane, where glass cratering was expected to occur, was analyzed. This plane is shown by a dashed red line in Figure 4, viewed from the center of the solder ball toward the bottom of the glass core (illustrated as white eye in Figure 4). The first principal stress at this critical plane is depicted in Figure 5, along with the location of directly metallized copper and solder joint. Once the crack has originated, it is likely to form an arc over the directly metallized region due to the local stresses caused by the copper. This arc forms the crater shape, and hence the name. This shape was observed experimentally, which confirmed the modeling predictions. Similar patterns of arc-shaped cracking have been found in the sidewalls of through silicon vias [19], which similarly had copper against a high modulus, low CTE material during thermal cycling. In general, the stresses at -40 C are much higher than the stresses at 125 C, as -40 C is much further away from the stress-free temperatures assumed in this work. Thus, the discussion in this paper is primarily focused on stresses at -40 C. Figure 4. Cross section schematic of an interconnection. Figure 5. First principal stress contour in glass (in a plane represented by a dashed red line in the 2D cross-section in Figure 4 viewed from white eye) at -40 C for 2.0 x 2.5 mm 3D LC filter. III. THERMAL CYCLING EXPERIMENTS Three-dimensional TGV filters were fabricated and reflow-assembled to FR-4 test boards which had chains to test the corner and circuit signals of the 3D TGV filters. Two layouts were fabricated, one measuring 2.0 x 2.5 mm with six solder joints and one measuring 2.0 x 2.5 mm with eight solder joints. Thirty parts from each layout were assembled across four boards. Then, the 3D TGV filters were subjected to thermal cycling from -40 to 125 C following test condition G of the JEDEC Standard on Thermal Cycling [20]. The reliability of the parts was continuously monitored up to 2481 cycles, at which point the test was stopped before all LC filters had failed, far beyond the required lifetime of LC filters. No preconditioning was performed. The results of the thermal cycling are summarized in TABLE 6, including the five percent failure life (N 05 ) and mean life (N 50 ). As seen, the eight-solder-joint LC filters have a higher reliability than the six-solder-joint LC filters because there is more total solder volume to absorb the accumulating damage, as the solder joints in the two test vehicles were of the same dimension. The larger solder volume and the area of glass over which the LC filter is

5 coupled to the board produces lower stress resulting in lower likelihood of glass cratering. Three-parameter Weibull distributions were fit to the data (e.g. [21, 22]). The distribution is given by, =1 for N < N ff = (7) for N > N ff where N ff is the failure-free life, is the shape parameter, and is the characteristic life. The failure-free life was chosen to be the fatigue life corresponding to one percent cumulative failure. The characteristic lives, shape parameters, and failure-free lives as well as the coefficient of determination for the Weibull fits are given in TABLE 7 and the cumulative failure rate for the entire IPD device (e.g. if any circuit has failed) was plotted in Figure 6. The low coefficient of determination for eight-solder-joint signal circuit was primarily due to one suspicious failure at a low number of cycles. The measured reliability during thermal cycling was assumed to be a measurement of solder joint reliability. This is because the failure criteria for was based on electrical resistance. If the electrical chain is broken, then the resistance increases. On the other hand, glass cratering does not impact the electrical resistance, though it may affect other electrical properties, such as the filter gain. Comparing the experimentally observed reliability and fatigue lives (TABLE 6) to the predicted fatigue lives (TABLE 5) shows similar trends (e.g. more solder joints corresponds to better fatigue life), with the solder joints performed better experimentally than predicted. As with any fatigue related work, there is significant noise and variation in the experimental data. TABLE 6. THERMAL CYCLING RELIABILITY FOR 3D TGV LC FILTERS Solder Joints Cycles Completed Number of Fails N / / Figure 6. Cumulative three-parameter Weibull reliability distribution for six- and eight-solder-joint 2.0 x 2.5 mm LC filters. Failure analysis was required to investigate the types of failures observed and assess glass cratering in particular. The primary method of failure analysis was cross sectioning. In the course of cutting the test board for cross sectioning, nine IPD devices of the six-solder-joint design were accidentally removed in entirety from the testing board. From this, the type of failure at each solder was counted by optical inspection. Glass cratering occurred in 27 of 54 joints, solder cracking occurred at top of the in 25 of 54 joints, and solder cracking occurred at the bottom in 2 of 54 joints. The glass cratering consistently occurred over the directly metallized region, illustrated as a cross section in Figure 7(a) and shown from above in an optical micrograph in Figure 7(b). In most cases of glass cratering, polyimide around the solder joint delaminated from the glass. In some cases, the polyimideglass delamination extended beyond the immediate copper region. TABLE 7. THREE PARAMETER WEIBULL DISTRIBUTION PARAMETERS AND FIT FOR THERMAL CYCLING OF 2.0 x 2.5 mm 3D LC FILTERS Solder Joints Characteristic Life Shape Parameter Failurefree Life R 2 Figure 7. (a) Cross section schematic of glass cratering and (b) micrograph of glass cratering from top.

6 While glass cratering was observed in this work, it was not studied with enough detail to correlate and validate a failure criterion. Instead, an understanding why glass cratering occurs was proposed and a preliminary set of design guidelines were given to prevent glass cratering. If glass cratering continues to be an issue in future designs, then a more rigorous study focused specifically on predicting glass cratering may be required. The reliability data gathered related to solder joint reliability, and the predicted failure free life of the solder was reasonable. In all the reliability testing done for this work, no TGV failures were observed. Other work which looked at TGVs in similar designs found TGV reliability greater than 99 percent [1, 13]. IV. FURTHER DESIGN IMPROVEMENT OPTIONS While these 3D IPDs have been shown to be reliable, more insight on reliability was desired for future design iterations. Many factors impact reliability of 3D TGV IPD LC filter devices; in this section, three key factors were identified and their effects explored using the modeling approach described in Section II. Modeling. A. Via-Solder Joint Distance The first factor investigated was TGV and solder joint proximity. TGVs and interconnections both impose stresses on the glass and the resulting stress may induce glass cratering. When the temperature is decreased, copper in TGVs contracts, producing radial tension and circumferential compression in the surrounding glass. On the other hand, when the temperature is increased, copper in TGVs expands, producing radial compression and circumferential tension in the surrounding glass. As the TGV is moved closer to the solder joint, these stresses interact with the global and local stresses discussed in Section II.B. Glass Cratering Modeling, causing the total stress to increase. In the six-solder-joint design, a maximum first principal stress of 55.1 MPa was predicted for a solder joint to via distance of 230 μm. When this distance was reduced to 40 μm, the maximum first principal stress increased to 64.2 MPa. Thus, as the distance between the solder joint and TGV is decreased, the stress in the glass increases. When the effect of solder joint to TGV proximity is combined with the already existing stress pattern, glass cratering becomes more likely. However, when the TGV was directly on top of the solder joint, the stress in the glass was lower because the solder joint is attached to the TGV, rather than the glass. In other words, the critical location above the solder joint, where glass cratering would occur in the absence of the via, is copper, not glass. Although the relative distance between TGV and solder joint affects the stress distribution in glass, it does not seem to affect solder joint strain significantly. The effect of the distance between the TGV and the solder joint is less than seven percent difference in the predicted fatigue life of the solder joint. Based on these predictions, TGVs should be kept away from the immediate vicinity of solder joints to prevent glass cratering. B. Thickness Effects To study the effects of glass core thickness on solder cracking and glass cratering due to thermal cycling, models were created and run with glass core thicknesses of 100 to 500 μm. With the exception of changing the glass core thickness, the models were identical to the approach described in Section II. Modeling. Based on these models, the predicted fatigue life of solder cracking in the solder joint with the most damage during thermal cycling (Figure 8) is plotted as a function of glass core thickness. Figure 8 uses only the worst joint because the cumulative results closely track the single worst joint. As the glass thickness increases, the LC filter is more rigid and resists bending, causing more damage on the solder joint and lowering the predicted life. On the other hand, thicker glass core improves electrical performance significantly, and thus, glass thickness is a trade-off between the need to enhance the solder joint reliability and the electrical performance. In addition to the predicted solder joint fatigue life, the stress in the glass at -40 C was investigated. The stress in the glass is a combination of the bending stress due to warpage and the local stress due to features such as solder joints and TGVs. Bending causes tensile stress in the glass since the FR- 4 shrinks more upon cooling and the neutral axis is located in the FR-4 for these thicknesses [23]. Then, the specific features superimpose stresses in addition to the bending stress. The interconnections apply a tensile-compressive stress pattern in the glass, with tensile stresses on the side away from the package center and compressive stresses on the side near the package center (Figure 5). Also, the copper in the TGVs tries to shrink, applying a compressive stress in the surrounding glass. The maximum first principal stress in the glass at -40 C was plotted as a functions of glass core thickness (Figure 9); as the glass core thickness increases, the predicted stress in the glass at -40 C increases. The thicker glass has a higher bending rigidity, and the coupling of the IPD to the board through the interconnections generates more stress on the glass, right above the solder joint. The eight-solder-joint package has larger stresses at 500 μm because the higher number of solder joints will apply a greater degree of coupling between the LC filter and board. Thus, reducing the glass core thickness was predicted to improve the solder fatigue life and help prevent glass cratering.

7 Predicted Thermal Cycling Life Figure 8. Predicted solder fatigue life for the worst solder joint in number of thermal cycles as a function of glass core thickness [μm] for 3D TGV IPD LC filters. Predicted 1st Principal Stress [MPa] Solder Joint LC Filter 8 Solder Joint LC Filter Glass Core Thickness [μm] 6 Solder Joint LC Filter 8 Solder Joint LC Filter Glass Core Thickness [μm] Figure 9. Predicted first principal stress in glass at -40 C as a function of glass thickness [μm] for 3D TGV IPD LC filters. C. Polymer Stress Buffer The third key factor affecting solder joint reliability is the dielectric polymer acting as a stress buffer between copper and glass. The dielectric polymer has a low modulus, which lets it absorb some amount of mismatch between materials, reducing stress. In the current design, copper is directly metallized onto the glass; the same copper is connected vertically through vias to the interconnections, producing an even higher stress. Alternative designs to help decrease solder cracking and protect against glass cratering include polymer coated glass or moving solder joints away from directly metallized regions. However, the modeling predicts that the stress buffering effect of dielectric polymer are less significant compared to the thicknesses of the glass core and FR-4 board in this specific case. However, it should be pointed out that stress buffering depends on dielectric thickness and modulus, and for the cases studied in this work, the effect of stress buffering on glass cratering is less compared to other options explored in this paper. Alternatively, the deposition parameters of the copper can be adjusted to lower the stress and prevent glass cratering. V. CONCLUSIONS This work explores and analyzes board-level reliability of 3D glass IPD filters as a result of thermal cycling. The overall objective was to model, design, and demonstrate board level reliability performance of 3D IPD LC filters to achieve high performance in a smaller footprint and a thinner IPD device. Models were constructed to predict possible failures such as solder joint cracking, glass cratering, or TGV failure. The IPD devices measured 2.0 x 2.5 mm in size, made with a 400 μm glass core of low CTE glass, polyimide was used as a dielectric, and annular TGVs enabled 3D inductors. The 3D IPD devices were balled with SAC405 solder, reflowed to test boards, and thermal cycled to 2481 cycles. Failure modes observed experimentally were solder cracking and glass cratering; no TGV failures were observed. The majority of devices passed reliability requirements, with N 50 lives of 1287 and 2194 thermal cycles in a set of 30 test devices with two electrical chains in each. The models were validated using the experimental results and then used to identify alternative designs to improve reliability. Reducing the glass thickness, placing TGVs far from solder joints, and adding polymer layers in between the glass and copper to act as a stress buffers are options explored to improve the thermal cycling reliability of these devices. Overall, these results demonstrated highly reliable 3D TGV filters. ACKNOWLEDGMENT This work was supported by funding from the Low Cost Glass Interposers and Packages global industry consortium at the Georgia Tech 3D Systems Packaging Research Center. The authors would like to thank Jason Bishop, Chris White, Kadappan Panayappan, and the Computer Aided Design of Packaging Reliability (CASPaR) Lab members for their valuable help and support, as well as Dr. Vanessa Smet, without whom this paper would not exist. REFERENCES [1] M. Lueck, A. Huffman, and A. Shorey, "Through Glass Vias (TGV) and Aspects of Reliability," presented at the ECTC, [2] R. Furuya, F. Liu, H. Lu, H. Deng, T. Ando, V. Sundaram, et al., "2um RDL Wiring Using Dry Film Photoresists and 5um RDL via by Projection Lithography for Demonstration of Low Cost 2.5D Panelbased Glasss and Organic Interposers," presented at the ECTC, [3] H. Lu, Y. Suzuki, B. Sawyer, V. Sundaram, and R. Tummala, "Demonstration of 3-5um RDL Line Lithography on Panel-Based Glass Interposers," presented at the ECTC, [4] S. Gandhi, M. R. Pulugurtha, V. Sundaram, H. Sharma, M. Swaminathan, and R. Tummala, "A New Approach to Power Integrity with Thinfilm Capacitors in 3D IPAC Functional Module," in ECTC, 2013, pp [5] V. Sundaram, Y. Sato, T. Seki, Y. Takagi, V. Smet, M. Kobayashi, et al., "First Demonstration of a Surface Mountable, Ultra-Thin Glass

8 BGA Package for Smart Mobile Logic Devices," presented at the ECTC, [6] S. McCann, V. Sundaram, R. Tummala, and S. K. Sitaraman, "Flip- Chip on Glass for Low Warpage," presented at the ECTC, [7] S. McCann, Y. Sato, V. Sundaram, R. Tummala, and S. Sitaraman, "Prevention of Cracking from RDL Stress and Dicing Defects in Glass Substrates," IEEE Trans. Device and Materials Rel., accepted for publication [8] S. McCann, Y. Sato, V. Sundaram, S. Sitaraman, and R. Tummala, "Study of Cracking of Thin Glass Interposers Intended for Microelectronic Packaging Substrates," presented at the ECTC, [9] A. Syed, "Accumulated Creep Strain and Energy Density Based Thermal Fatigue Life Prediction Models for SnAgCu Solder Joint," in ECTC, 2004, pp [10] R. Darveaux, "Effect of simulation methodology on solder joint crack growth," presented at the ECTC, [11] M. M. Basit, M. Motalab, J. C. Suhling, Z. Hai, J. Evans, M. J. Bozack, et al., "Thermal Cycling Reliability of Aged PBGA Assemblies - Comparison of Weibull Failure Data and Finite Element Model Predictions," presented at the ECTC, [12] G. T. Ostrowicki, J. Williamson, V. Gupta, and S. P. Gurrum, "Thermal Cycling Reliability of Lead Free Solder Joints on Multi-Terminal Passive Components," presented at the ECTC, [13] A. B. Shorey, S. Kuramochi, and C. H. Yun, "Through Glass Via (TGV) Technology for RF Applicaitons," in IMAPS, Orlando, 2015, pp [14] X. Fan, M. Pei, and P. Bhatti, "Effect of Finite Element Modeling Techniques on Solder Joint Fatigue Life Prediction of Flip-Chip BGA Packages," in ECTC, 2006, pp [15] T. O. Reinikainen, P. Marjamäki, and J. K. Kivilahti, "Deformation Characteristics and Microstructural Evolution of SnAgCu Solder Joints," in Int. Conf. on Thermal, Mechanical and Multiphysics Simulations and Experiments in Micro-Electronics and Micro- Systems, 2005, pp [16] R. Darveaux, "Thermal Cycle Fatigue Life Prediction for Flip Chip Solder Joints," in ECTC, 2014, pp [17] K. Tunga and S. K. Sitaraman, "Predictive Model Development for Life Prediction of PBGA Packages with SnAgCu Solder Joints," IEEE Trans. CPMT, vol. 33, pp , [18] M. N. Tamin and N. M. Shaffiar, Solder Joint Reliability Assessment: Finite Element Simulation Methodology. [19] X. Liu, Q. Chen, V. Sundaram, R. Tummala, and S. K. Sitaraman, "Failure analysis of through-silicon vias in free-standing wafer under thermal-shock test," J. Microelectronics Rel., vol. 53, pp , [20] JEDEC, "JESD22-A104-C Temperature Cycling," ed, [21] J. P. M. Clech, D. M. Noctor, J. C. Manock, G. W. Lynott, and F. E. Bader, "Surface Mount Assembly Failure Statistics and Failure Free Time," in ECTC, 1994, pp [22] Y. Tian, X. Liu, J. Chow, Y. P. Wu, and S. K. Sitaraman, "Experimental Evaluation of SnAgCu Solder Joint Reliability in 100- um pitch flip-chip assemblies," J. Microelectronics Rel., vol. 54, pp , [23] S. Michaelides and S. K. Sitaraman, "Die Cracking and Reliable Die Design for Flip-Chip Assemblies," IEEE Trans. Adv. Packaging, vol. 22, pp , 1999.