Double-side cooled semiconductors for automotive applications
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1 Double-side cooled semiconductors for automotive applications Dr. Martin Schneider-Ramelow, Fraunhofer IZM Berlin, D Thomas Baumann, Fraunhofer IZM Berlin, D Dr. Eckart Hoene, Fraunhofer IZM Berlin, D Abstract The presentation addresses the alternative assembly of power semiconductors (IGBTs and diodes) with direct liquid cooling from the top and bottom side. The technology extends the current carrying capability of semiconductors significantly by reducing the thermal resistance between semiconductors and cooling liquid. Especially in the case of converters employed for propulsion in cars, the innovation will reduce the system cost and increase assembly lifetime. Particular challenges in this type of assembly are thermal-mechanical reliability, the low thermal resistance and the difficulty of designing the required production processes. High-voltage resistance, power supply and the sealing of cooling ducts have to be solved as well. Investigations include today's problems with conventionally soldered and heavy wire bonded power modules as well as some alternative assembly possibilities which are currently under discussion or being tested, respectively. The concept of contacting semiconductors between two substrates (e.g. DCBs) with cooling from both sides will be discussed in detail. The demonstrator shown in this presentation is used to establish the technology's viability and its estimated characteristics, particularly in terms of lifetime. It comprises a half bridge with two IGBTs and diodes, which are soldered onto DCBs on both sides. Through the additional thermal dissipation on the upper surface, static thermal resistance is reduced by 40% compared to one-sided cooling assemblies. Dynamic thermal resistance is also significantly reduced through the thermal mass of the second DCB. The main challenges of contacting semiconductors quality-like between two substrates with top and bottom cooling liquid are the availability of semiconductors for soldering or sintering from both sides with optimized pad layout, adjusted DCB layout as well as encapsulation technologies to achieve appropriate insulation capability, the assembly technology and the sealing of cooling ducts. Reliability topics are the fatigue/creep behavior of the semiconductor to substrate contacts, the mechanical stability of the DCBs and thermo-mechanical mismatch between the applied materials. A prototype is introduced and measurement results concerning thermal resistance, quality of assembly and lifetime are presented. 1 Introduction Nowadays die and substrate soldering and processing of Al heavy wires as essential steps of power module assembly as well as their quality and reliability control in terms of life cycle prediction come to the foreground within the field of power electronics. During both operation and reliability tests, failures mostly affect wire bond connections, because of thermal and/or electrical (high current) alternating subjection to stress (power cycling), or die on substrate or substrate on cooling base attach through solder creep/fatigue [1]. Due to the Al-wire and Si-chips immensely differing thermal expansion coefficients (CTE) mechanical alternating shock loading occurs within the wedge area. This in turn can lead to the wedges' lifting off and consequentially to the components total failure. For this reason, currently special attention is also being given to the heavy wire-bond's quality before stress exposure. The bond contacts' quality, i.e. the bond formation between the wires and substrate metallization after optimizing bonding parameters, can only be checked by shear-testing the wedges. Very similar is the solder creep/fatigue mechanism because of different CTEs of the chip, the substrate and the cooling base. As a basis for lifetime prognosis, passive and/or active temperature change is used for reliability trials. In this context temperature difference as well as the speed of temperature change and accordingly the duration at the higher temperature level are of significant influence for both typical failure mechanism (wire fatigue and solder creep/fatigue) [1].
2 To improve the reliability respectively the power modules life time alternative interconnection technologies and material combinations are being developed and tested. AlSiC instead of Cu as base material is an example to minimize the CTE difference to the substrate material (typically DCB) [2]. Low temperature sintering of Ag particles as die attach alternative leads to higher creep resistance [3]. Ribbon bonding of Cu-Al bimetal may improve the fatigue resistance of wedge contacts on top of the power chips [4]. Although all of these optimizations lead to improvements, they mostly come along with higher costs due to more expensive materials or processes. The double-sided cooling concept presented in this contribution was developed to overcome several life time limiting aspects observed in conventional power modules. By removing the heat from top and bottom of the chip the thermal resistance is nearly reduced by a factor of two. This results in a significantly lower temperature swing of the assembly and therefore in reduced thermo-mechanical stress. Alternatively more power can be handled with the same semiconductors, when the temperature swing stays the same as in conventional setups. Another aspect for longer lifetime is the assembly without wire bonds. By bonding the top side contacts to a DCB with matching CTE a longer lifetime is expected. Finally the setup without base plates eliminates further another weak point. The double sided cooling assembly was customized to automotive traction applications, as we expect significantly lower system costs especially by reducing the necessary area of silicon. In this application low thermal impedance between semiconductor and cooling media is needed to allow the use of the combustion engine cooling loop. Fig. 1: Cross section of double side cooled power module The cooling media flows directly on the second side of both substrates (Fig. 2). 2 Concept and design 2.1 Semiconductor Assembly The heart of the power module is a half bridge, built by two 600V / 200A Infineon IGBTs and two 600V / 200A Infineon Diodes. The semiconductors are assembled in a sandwich structure (Cross section Fig. 1). The chip is bonded at top and at bottom to the substrate, for example by soldering. For the prototype SnAg solder was used, alternatively sintering at low temperatures is thinkable. As substrate an aluminium Nitride (AlN) DCB substrate is used. Its low CTE minimizes thermo-mechanical stress on solder and chip, furthermore its low thermal resistance provides good cooling performance. Fig. 2: Double sided assembly Due to the pressure of the cooling media on both sides of the power module no additional base plate is necessary. The calculated thermal resistance of the proposed sandwich assembly and a comparison to a high performance single side cooling is shown in Tab. 1. The single side cooled assembly is built up using a AlN substrate and a AlSiC base plate.
3 The whole sandwich structure has a height of 2.6cm. The terminals are positioned at the overlapping sides of the DCBs. Tab. 1: Material data for thermal resistance calculation of standard module and sandwich assembly. Chip area: 100mm 2, Heat spreading angle: 45 Material thermal conductivity Thickness thermal Resistance Standard Assembly Sandwich Assembly Solder Cu AlN Cu solder AlSiC SnAg Cu AlN Cu Fig. 4: X-Ray picture of test assembly. The dark shadows are shortcuts caused by yielding solder during soldering process 2.2 General setup Rth in [K/W] AlSiC solder Cu AlN Cu Solder To reach full integration a cooling housing assembled with an intermediate current capacitor and driver circuit have been designed. The cooling housing is shown in Fig Standard Assembly Sandwich Assembly Fig. 3: Percentage share in thermal resistance of standard and sandwich assembly A challenge in the assembly of a double side cooled power module is the bonding of the semiconductors to the substrate at top and at bottom of the chip coincidentally. The soldering process has to provide full contact of the active areas, homogenous thickness of the solder and no voids. Yielding of the solder during the soldering process has to be avoided using solder resist and proportioning the amount of solder accurately. Fig. 4 shows an X-ray picture of a test assembly where solder causes shortcuts due to uncontrolled yielding. The process has been optimized. Another point to pay attention for is the dielectric strength. Without any additional measures the voltage of difference 600V would occur between areas not more than 80 µm apart. Increasing the distance by etching the copper layer in these areas is a appropriate solution. Fig. 5: Cooling housing Left- explosion drawing Right- mounted 1 DC-link capacitor 2 electrical terminals 3 cooling housing top 4 cooling housing bottom 5 cooling media terminal 6 cooling path tool The design of the DCB has foreseen terminals at the edges to be connected from the side. The upper and the bottom side are completely used as cooling areas.
4 The cooling housing consists of the bottom and the top part. The bottom part is shown in Fig. 6. Both housing sides have connections for the cooling medium so the two elements can be connected in series or in parallel. A challenge in design is the sealing of the cooling housing. A rubber ring is mounted in a sealing trench, which encloses the area to be cooled (Fig. 6). The top and the bottom side of the cooling housing are screwed together to press the sealing rubber onto the cooling area. To avoid mechanical stress onto the semiconductors, bar spacers are used between the DCB-plates. The electrical connections between the sandwich and the terminals are provided by soldered metal sheets acting as mechanical stress relief. The heat transition to the cooling media determines the main part of the thermal resistance in high performance cooling systems. Several concepts of optimizing this interface are being discussed, like Pin Fin [10] or Shower Power [8]. These concepts apply different strategies to minimize the thermal resistance between power module and coolant: 1.) increasing the interface area of coolant and power module and / or 2.) causing turbulences in the coolant. At the same time when reducing the thermal resistance of power modules and coolant, the homogeneity of the cooling performance has to be considered as well. A temperature gradient over the power module is to be avoided. Complexity of manufacturing the cooler, pressure drop over the cooler and flow rate distinguish the different cooling methods. Pin Fin cooling, for example provides simple cooler manufacturing, low pressure drop and high flow rates. The disadvantage in most Pin Fin- applications is a temperature gradient of the power module. Micro channel cooler are characterised by an optimised cooling performance, but a high cooler complexity and a high pressure drop are the disadvantages. To avoid a temperature gradient, Danfoss has developed a cooling method called Shower Power. A temperature gradient is avoided by a fast discharge of coolant. Meander structures of the cooling path cause turbulences in the coolant for low thermal resistance. Because of the simplicity of the Danfoss - cooler structure, low pressure drop and the fact that a temperature gradient is avoided, Shower Power has been used in this prototype. It is realised using a tool determining the cooling path (Fig. 7). The cooling method simply can be changed by exchanging the cooling path tool. The use of a cooling path tool emphasises the flexibility of the power module. The power module can be easily accommodated to different applications. Fig. 6:Bottom of cooling housing 2.3 Coolant interface Fig. 7: Cooling path tool using Shower Power concept [4] 4 Thermal Characterisation Describing the thermal properties of a module several parameters have to be taken into account. Next to the thermal resistance the pressure drop of the cooling path, flow rate, chip area and the whole cooled area have to be looked at. The pressure drop is measured versus flow rate as well as the thermal resistance of the module. With the information of the pressure drop of the cooler and the thermal resistance the thermal performance can be validated. 4.1 Pressure drop The pressure drop in dependence of the flow rate is shown in Fig. 8. The graph relates to an assembly, where top and bottom cooling path are connected in parallel. The top and bottom cooling path are exactly equally designed. Only one side of the cooling path has therefore double the pressure drop at a known
5 flow rate. The schematic contains two different circuits: an electric circuit and a cooling circuit. The electric circuit is shown in red, and the cooling circuit in blue (Fig. 9). The temperature of the coolant is the reference temperature T ref. The diode voltage is monitored during and after the power loss step. With the knowledge of the junction temperature T j, the loss power P and the reference temperature T ref the thermal impedance can be calculated using equation (1). Z th T j ( t) Tref ( t) = (1) P The results are shown in Fig. 10. Fig. 8: Pressure drop vs. flow rate for water 4.2 Thermal Impedance The thermal impedance is measured by using the JEDEC standard [7]. For temperature measurement the forward voltage drop of a diode at a constant forward current is used. The diode forward voltage shows a nearly linear dependency on the temperature. The loss power is initiated through the same diode to make sure that the measurement point is exactly at the hot spot. While using the diode as temperature sensor the junction temperature T j can be measured properly. A loss power pulse heats the module to thermal steady state. Directly after the loss power is disconnected the forward diode voltage is monitored. To avoid transient oscillations due to hard switching a dummy path is used, see Fig. 9. Fig. 11: Measurement results, chip area 44,47mm² The curves for the thermal impedance in Fig. 11 refer to the assembly described above. To make the results more comparable pressure drop, flow rate, cooled area and chip area have to be considered as well. This is done in four steps: First step: Relation between R th and flow rate. Out of Fig. 11 the relation of the thermal resistance and the flow rate can be extracted. The result is shown in Figure 10. The chip area is transformed to 100mm 2 with equation (2) [5]. Fig. 9: Experiment setup for thermal characterisation schematic Z Z th1 th2 A2 = A 1 K (2) The Mosfet T2 and the dummy diode D2 are used to draw the heating current, when no current flows through the DUT. Thereby the current source providing the heating current can settle to steady state before measuring, which keeps transient oscillations at the minimum [6]. For materials with a high thermal conductivity the parameter K is nearly 1.
6 Fig. 12: Rth vs flow rate for different chip areas Second step: Considering the flow rate f and the pressure drop p information about the needed power effort for cooling can be won. Equation (3), (4) and (5) show the relationship of flow rate f and pressure drop p. Fig. 13: Rth vs cooling effort for a chip area of 100 mm² f 3 L 6 m = ˆ = 16,66 10 (3) min s F 5 N p = ˆ bar = = 10 A m (4) 2 Nm f p = 1,66 = s 1, 66 [ W ] ˆ (5) f p is the effort to be invested for pumping a wanted flow rate through a cooler. In the graph (figure 11 & 12) the product f p is named with cooling effort. The relationship of f and p, shown in Fig. 8 has to be known for the used coolant. Third step: Norming the cooled area to 100mm 2 leads to Fig. 14. In the last step the complete cooled area has to be considered. To get comparable information the pumping effort per area is plotted versus flow rate. The result is shown in Fig. 14. Fig. 14: Pumping effort per area versus flow fate / Rth for a chip area of 100mm² To compare two different power modules and their thermal properties, information of Fig. 13 and Fig. 14 have to taken into account. Fig. 13 & Fig. 14 show that especially for low pumping effort (flow rate > 1 l/min) a very good cooling performance can be achieved. 5. Reliability Aspects Thermo mechanical stress due to load changes causes fatigue of materials. Different CTEs of assembly materials cause different expansions during a temperature rise. Mechanical tension in material causes creeping of solder and in worst case chinks, which lead to power module failure. Fig. 15 shows different CTEs of standard materials used in power module assembly.
7 CTE 10-6 /K Si Cu AlN Al2O3 Al Fig. 15: Different CTEs of standard materials used for power modules [11] Especially the high CTE of copper causes problems in reliability. Copper is used on the one hand on the DCB for electrical connection of the semiconductors and on the other hand as a base plate. Standard power modules need a copper base plate to guarantee mechanical strength. The mismatch of expansions during temperature change is the reason for solder fatigue [12]. Due to the fact that the presented power module is cooled from both sides with the same flow rate, forces onto the power module eliminate each other. Therefore a base plate is not necessary and this failure mechanism has no more relevance. The Direct Copper Bonding (DCB) process creates a very tight connection between substrate and copper. As its resulting CTE is close to the one of AlN, high stress on the solder connection between chip and DCB is avoided. Therefore solder fatigue in this interconnection are not expected. The lack of wire bonds promises an improved reliability as well. 6. Conclusion A prototype of a double side cooled power module has been assembled and characterized. Thermal resistance is improved by 40% compared to single side cooled assemblies. The cooling effort is shown to be low for a very high cooling performance. The simplicity of the assembly promises an improved reliability due to the lack of a base plate and wire bonds. Most promising application for this kind of assembly are inverters for automotive traction, which allow reduced system costs due to less semiconductors needed to handle the same power. [3] KLAKA, S, Eine Niedertemperatur- Verbindungstechnik zum Aufbau von Leistungshalbleitermodulen. Dissertation TU Braunschweig [4] LÜCHINGER, C.; OFTREBO, K.; HAUMANN, S.: Power Ribbon TM An alternative interconnect technology for small power packages. Speech and Proceedings of the 40th IMAPS International Symposium on Microelectronics. November 11-15, 2007 in San Jose, CA, USA. S [5] KONRAD, SVEN Ein Beitrag zur Auslegung und Integration Spannungsgespeister IGBT Wechselrichter. ISLE Verlag, 1997, ISBN [6] THIES WERNICKE, SIBYLLE DIECKERHOFF, STE- PHAN GUTTOWSKI, HERBERT REICHL, Measurement Techniques for the Thermal Characterization of Power Modules, Fraunhofer Institut IZM Berlin [7] JEDEC Standard: Thermal Impedance Measurement for Insulated Gate Bipolar Transistors, JEDEC Solid state Technology Association 2004 [8] OLESEN KLAUS, Liquid cooled power modules for automotives, Danfoss Silicon Power GmbH [9] SIBYLLE DIECKERHOFF, STEPHAN GUTTOWSKI, HERBERT REICHL, Performance Comparsion of Advanced Power Electronic Packages for Automotie Applications, Fraunhofer IZM Berlin, 2006 [10] RICHARD C. CHU, ROBERT E. SIMMONS, MICHAEL J, ELLSWORTH, ROGER R. SCHMIDT, VINCENT COZZOLINO, Review of Cooling Technologies for Computer Products, IBM Corporation, 2004 [11] NICOLAI, U.; REIMANN, T.; PETZOLDT, J.; LUTZ, J.: Applikationshandbuch für IGBT- und MOS- FET-Leistungsmodule. Semikron GmbH. Nürnberg 1998 [12] SCHUETZE,T; BERG, H.; SCHILLING, O. : The new 6.5kV IGBT module: a reliable device for medium voltage applications. Eupec GmbH. PCIM Nürnberg Literature [1] SCHNEIDER-RAMELOW, M.; et al.: Leistungselektronikmodule Aufbau- und Verbindungstechnik. Tutorials auf der SMT Hybrid Packaging 2004, 2005 und 2006 in Nürnberg. [2]
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