Lecture 6. Through-Wafer Interconnect. Agenda: Through-wafer Interconnect Polymer MEMS. Through-Wafer Interconnect -1. Through-Wafer Interconnect -2
|
|
|
- Collin Hutchinson
- 6 years ago
- Views:
Transcription
1 Agenda: EEL6935 Advanced MEMS (Spring 2005) Instructor: Dr. Huikai Xie Lecture 6 Through-wafer Interconnect EEL6935 Advanced MEMS 2005 H. Xie 1/21/ Motivations: Wafer-level packaging CMOS 3D Integration Chemical Sensors Proximity sensors Fabrication Processes: Through-hole contacts DRIE or Wet etching or Porous silicon Conduction provided by Diffusion Metal deposition/plating Polysilicon Thermomigration, or temperature gradient zone melting Silicon plug Through-Wafer Interconnect EEL6935 Advanced MEMS 2005 H. Xie 2 Through-Wafer Interconnect -1 DRIE Through-Hole plus Cu Electroplating Through-Wafer Interconnect -2 DRIE Through-Hole plus Doped Poly-Si (1) E.M. Chow et al, U. Florida/Stanford, JMEMS, vol.11 (2002) Frontside DRIE Si Backside DRIE Si J. H. Wu et al, MIT, IEEE Transactions on electron devices, 51(11), November 2004 EEL6935 Advanced MEMS 2005 H. Xie 3 Thermal oxide Doping BHF glass removal EEL6935 Advanced MEMS 2005 H. Xie 4
2 Through-Wafer Interconnect -2 DRIE Through-Hole plus Doped Poly-Si (2) Oxide Doping Through-Wafer Interconnect -2 DRIE Through-Hole plus Doped Poly-Si (3) Oxide passivation to fill vias Metallization Pattern signal poly-si N+ poly Signal N+ poly Shield Bulk Silicon Pattern shield poly-si Oxide E.M. Chow et al, U. Florida/Stanford, JMEMS, vol.11 (2002) EEL6935 Advanced MEMS 2005 H. Xie 5 EEL6935 Advanced MEMS 2005 H. Xie 6 Through-Wafer Interconnect -3 Isolated Silicon Plug (1) Through-Wafer Interconnect -3 Isolated Silicon Plug (2) Six-wafer combustion chamber for a microengine (MIT) A. Mehra et al, MIT, J. Vac. Sci. Technol. B 18(5), Sep-Oct 2000 EEL6935 Advanced MEMS 2005 H. Xie 7 A. Mehra et al, MIT, J. Vac. Sci. Technol. B 18(5), Sep-Oct 2000 EEL6935 Advanced MEMS 2005 H. Xie 8
3 Polymer: SU-8 Polymer Materials: SU-8, PMMA, BCB, PDMS, Parylene, Liquid crystal polymer, Applications: Properties: Transparent Optical MEMS High aspect ratio Biocompatible BioMEMS Flexible Low processing CMOS Integration temperature Easy spin-on deposition Packaging Planarization Microfluidics: microchannels, lab-on-a-chip, utas Wafer Bonding Packaging: epoxy, BCB Biocompatible coating RF applications: Antennas, varactors, etc. Fuel Cells Data Storage EEL6935 Advanced MEMS 2005 H. Xie 9 SU-8 is a negative, epoxy-type, near-uv photoresist (365 nm). Can be as thick as 2 mm Aspect ratios up to 25 have been demonstrated with a standard UV-lithography. Originally developed, and patented by IBM-Watson Rechearch Center (Yorktown Height-USA). In 1996 the material has been adapted for MEMS applications during a collaboration between EPFL-Institute of Microsystems and IBM-Zurich. The main part is the EPON SU8 epoxy from Shell Chemicals. It is a highly functionalized molecule with 8 epoxy groups. The polymerization is done by a cationic photopolymerization mechanism EEL6935 Advanced MEMS 2005 H. Xie 10 SU-8: Processing SU-8 Microstructures Spin-coating: over 1mm thickness achievable Soft bake: 95 C; 25 minutes for 100µm thick layers, 180 minutes for 200 µm Exposure: near-uv (365nm); continuous long-time high-dose exposure causes hard-skin on the SU8 surface; Stepwise exposures (expose, then cool down, then expose, cool down again, ) Post exposure bake: 95 C for 15 minutes, or 50 C for 1 hour; lower temperature baking yields lower residual stress. Development: room temperature; development time depends on thickness Hard bake (not required): 200 C; increase internal stresses or even results in cracks. SU-8 Stripping High-pressure water jets High temperature ashing: in an inert gas Chemical etching: e.g. fuming nitric acid Plasma etching SF6/O2 plasma, nickel as mask (Hong et al, DTIP 03) EEL6935 Advanced MEMS 2005 H. Xie 11 Star structure with aspect ratio of 14.5 EPEL/IBM (1997) EEL6935 Advanced MEMS 2005 H. Xie 12
4 SU-8 Example Devices All-photoplastic, Soft Cantilever Cassette Probe for Scanning Force Microscopy (SFM) SU-8 Example Devices Single-lever Scanning Force Microscopy (SFM) Probe IBM Zurich/U. Neuchâtel EEL6935 Advanced MEMS 2005 H. Xie 13 IBM Zurich EEL6935 Advanced MEMS 2005 H. Xie 14 SU-8 Example Devices Polymer RF MEMS Scanning Near-field Optical Microscopy (SNOM) Probe Micromachined Inductor With SU-8 With SU-8 stripped 50µm-thick SU-8 e.g., Q~20.5 at 4.45GHz, 2.6nH IBM Zurich in collaboration with Profs. N.F. de Rooij and F. Marquis-Weible EEL6935 Advanced MEMS 2005 H. Xie 15 Prof. M. Allen s group at Georgia Tech EEL6935 Advanced MEMS 2005 H. Xie 16
5 Polymer for High-Density Data Storage Millipede MEMS-based High-density Scanningprobe Data Storage Gray-tone lithography A method for fabricating structures in SU-8 photoresist having smoothly varying elevations has been developed at U. of Washington by M. Afromowitz team. Gray-scale structures up to 1 mm in height may be fabricated with one exposure step. 0.5Tb/in 2 1Tb/in 2 Writing: Thermal softening; tip pressing Indentation 1 Reading: thermal conductance Indentations: 25nm apart 1Tb/in 2 Erasing: nearby pressing Polymer bits Parallel Processing Vettiger,Despont, Eleftheriou et al of IBM Zurich EEL6935 Advanced MEMS 2005 H. Xie 17 These exceedingly linear SU-8 ramps (transparent in visible light, but opaque in this SEM) have lengths of 2.6 mm and maximum elevations of 0.5 mm EEL6935 Advanced MEMS 2005 H. Xie 18 Term Project The objective of this project is to find MEMS solutions for some practical problems and/or develop new MEMS designs. 1.Form teams (Jan. 28) Up to three students per team 2. Project proposal (Feb. 18) - Problem statement (motivation) - Your proposed solution(s) - To be accomplished tasks - Project schedule 3. Proposal presentation (Feb. 18) 8 minutes presentation + 2 minutes questions 4. Progress presentation (Mar. 18) 8 minutes presentation + 2 minutes questions 5. Final presentation (Apr. 18&20) 15 minutes presentation + 3 minutes questions 6. Final report (due Apr. 26) EEL6935 Advanced MEMS 2005 H. Xie 19 Project#1 Presentation Time: 1/26, 12:50pm Place: PSY 287 Adrian Steve Yawei Jessica Maojiao He Julio Shane Hongwei Deyou Eric Bryan Ankur Project #1 Poly-SiC MELO EFAB SOI Gray-scale lithography Black silicon Dissolved wafer process Porous silicon molding? Sol gel 5 minutes presentation + 2 minutes questions EEL6935 Advanced MEMS 2005 H. Xie 20
Lecture 5. SOI Micromachining. SOI MUMPs. SOI Micromachining. Silicon-on-Insulator Microstructures. Agenda:
EEL6935 Advanced MEMS (Spring 2005) Instructor: Dr. Huikai Xie SOI Micromachining Agenda: SOI Micromachining SOI MUMPs Multi-level structures Lecture 5 Silicon-on-Insulator Microstructures Single-crystal
Fabrication Technology, Part II
EEL5225: Principles of MEMS Transducers (Fall 2003) Fabrication Technology, Part II Agenda: Process Examples TI Micromirror fabrication process SCREAM CMOS-MEMS processes Wafer Bonding LIGA Reading: Senturia,
Lecture 7 CMOS MEMS. CMOS MEMS Processes. CMOS MEMS Processes. Why CMOS-MEMS? Agenda: CMOS MEMS: Fabrication. MEMS structures can be made
EEL6935 Advanced MEMS (Spring 2005) Instructor: Dr. Huikai Xie CMOS MEMS Agenda: Lecture 7 CMOS MEMS: Fabrication Pre-CMOS Intra-CMOS Post-CMOS Deposition Etching Why CMOS-MEMS? Smart on-chip CMOS circuitry
Surface Micromachining
Surface Micromachining Outline Introduction Material often used in surface micromachining Material selection criteria in surface micromachining Case study: Fabrication of electrostatic motor Major issues
Preface Preface to First Edition
Contents Foreword Preface Preface to First Edition xiii xv xix CHAPTER 1 MEMS: A Technology from Lilliput 1 The Promise of Technology 1 What Are MEMS or MST? 2 What Is Micromachining? 3 Applications and
EECS130 Integrated Circuit Devices
EECS130 Integrated Circuit Devices Professor Ali Javey 9/13/2007 Fabrication Technology Lecture 1 Silicon Device Fabrication Technology Over 10 15 transistors (or 100,000 for every person in the world)
MEMS Fabrication. Beyond Integrated Circuits. MEMS Basic Concepts
MEMS Fabrication Beyond Integrated Circuits MEMS Basic Concepts Uses integrated circuit fabrication techniques to make mechanical as well as electrical components on a single chip. Small size 1µm 1mm Typically
Lecture 1A: Manufacturing& Layout
Introduction to CMOS VLSI Design Lecture 1A: Manufacturing& Layout David Harris Harvey Mudd College Spring 2004 Steven Levitan Fall 2008 1 The Manufacturing Process For a great tour through the IC manufacturing
Chapter 3 Silicon Device Fabrication Technology
Chapter 3 Silicon Device Fabrication Technology Over 10 15 transistors (or 100,000 for every person in the world) are manufactured every year. VLSI (Very Large Scale Integration) ULSI (Ultra Large Scale
Lecture 2: CMOS Fabrication Mark McDermott Electrical and Computer Engineering The University of Texas at Austin
Lecture 2: CMOS Fabrication Mark McDermott Electrical and Computer Engineering The University of Texas at Austin Agenda Last module: Introduction to the course How a transistor works CMOS transistors This
Polymer-based Microfabrication
Polymer-based Microfabrication PDMS SU-8 PMMA Hydrogel 1 Soft Lithography Developed by Whitesides, et. al A set of techniques for microfabrication based on the use of lithography, soft substrate materials
Today s Class. Materials for MEMS
Lecture 2: VLSI-based Fabrication for MEMS: Fundamentals Prasanna S. Gandhi Assistant Professor, Department of Mechanical Engineering, Indian Institute of Technology, Bombay, Recap: Last Class What is
Alternative MicroFabrication and Applications in Medicine and Biology
Alternative MicroFabrication and Applications in Medicine and Biology Massachusetts Institute of Technology 6.152 - Lecture 15 Fall 2003 These slides prepared by Dr. Hang Lu Outline of Today s Materials
Welcome MNT Conference 1 Albuquerque, NM - May 2010
Welcome MNT Conference 1 Albuquerque, NM - May 2010 Introduction to Design Outline What is MEMs Design General Considerations Application Packaging Process Flow What s available Sandia SUMMiT Overview
Wireless implantable chip with integrated Nitinol-based pump for radio-controlled local drug delivery
Electronic Supplementary Material (ESI) for Lab on a Chip. This journal is The Royal Society of Chemistry 2014 Electronic Supplementary Information Wireless implantable chip with integrated Nitinol-based
ECE321 Electronics I
ECE321 Electronics I Lecture 19: CMOS Fabrication Payman Zarkesh-Ha Office: ECE Bldg. 230B Office hours: Tuesday 2:00-3:00PM or by appointment E-mail: payman@ece.unm.edu Slide: 1 Miller Effect Interconnect
6.777J/2.732J Design and Fabrication of Microelectromechanical Devices Spring Term Solution to Problem Set 2 (16 pts)
6.777J/2.732J Design and Fabrication of Microelectromechanical Devices Spring Term 2007 By Brian Taff (Adapted from work by Feras Eid) Solution to Problem Set 2 (16 pts) Issued: Lecture 4 Due: Lecture
9/4/2008 GMU, ECE 680 Physical VLSI Design
ECE680: Physical VLSI Design Chapter II CMOS Manufacturing Process 1 Dual-Well Trench-Isolated CMOS Process gate-oxide TiSi 2 AlCu Tungsten SiO 2 p-well poly n-well SiO 2 n+ p-epi p+ p+ 2 Schematic Layout
Introduction to CMOS VLSI Design. Layout, Fabrication, and Elementary Logic Design
Introduction to CMOS VLSI Design Layout, Fabrication, and Elementary Logic Design CMOS Fabrication CMOS transistors are fabricated on silicon wafer Lithography process similar to printing press On each
CMOS Technology. Flow varies with process types & company. Start with substrate selection. N-Well CMOS Twin-Well CMOS STI
CMOS Technology Flow varies with process types & company N-Well CMOS Twin-Well CMOS STI Start with substrate selection Type: n or p Doping level, resistivity Orientation, 100, or 101, etc Other parameters
Supporting Information: Model Based Design of a Microfluidic. Mixer Driven by Induced Charge Electroosmosis
Supporting Information: Model Based Design of a Microfluidic Mixer Driven by Induced Charge Electroosmosis Cindy K. Harnett, Yehya M. Senousy, Katherine A. Dunphy-Guzman #, Jeremy Templeton * and Michael
Multiple-height Microstructures Fabricated by ICP-RIE and Embedded Masking Layers
Paper Multiple-height Microstructures Fabricated by ICP-RIE and Embedded Masking Layers Student Member Makoto Mita (IIS., Univ. of Tokyo & CREST/JST ) Student Member Yoshio Mita (IIS., Univ. of Tokyo)
Lecture #18 Fabrication OUTLINE
Transistors on a Chip Lecture #18 Fabrication OUTLINE IC Fabrication Technology Introduction the task at hand Doping Oxidation Thin-film deposition Lithography Etch Lithography trends Plasma processing
PROCESS FLOW AN INSIGHT INTO CMOS FABRICATION PROCESS
Contents: VI Sem ECE 06EC63: Analog and Mixed Mode VLSI Design PROCESS FLOW AN INSIGHT INTO CMOS FABRICATION PROCESS 1. Introduction 2. CMOS Fabrication 3. Simplified View of Fabrication Process 3.1 Alternative
HIGH-ASPECT-RATIO, ULTRATHICK, NEGATIVE-TONE NEAR-UV PHOTORESIST FOR MEMS APPLICATIONS
HGH-ASPECT-RATO, ULTRATHCK, NEGATVE-TONE NEAR-UV PHOTORESST FOR MEMS APPLCATONS M. Despont', H. Lorenz2, N. Fahrni2, J. Bruggerl, P. Renaud2 and P. Vettiger' lbm Research Division, Zurich Research Laboratory,
Lecture 19 Microfabrication 4/1/03 Prof. Andy Neureuther
EECS 40 Spring 2003 Lecture 19 Microfabrication 4/1/03 Prof. ndy Neureuther How are Integrated Circuits made? Silicon wafers Oxide formation by growth or deposition Other films Pattern transfer by lithography
UT Austin, ECE Department VLSI Design 2. CMOS Fabrication, Layout Rules
2. CMOS Fabrication, Layout, Design Rules Last module: Introduction to the course How a transistor works CMOS transistors This module: CMOS Fabrication Design Rules CMOS Fabrication CMOS transistors are
Chapter 2 Manufacturing Process
Digital Integrated Circuits A Design Perspective Chapter 2 Manufacturing Process 1 CMOS Process 2 CMOS Process (n-well) Both NMOS and PMOS must be built in the same silicon material. PMOS in n-well NMOS
General Introduction to Microstructure Technology p. 1 What is Microstructure Technology? p. 1 From Microstructure Technology to Microsystems
General Introduction to Microstructure Technology p. 1 What is Microstructure Technology? p. 1 From Microstructure Technology to Microsystems Technology p. 9 The Parallels to Microelectronics p. 15 The
Soft Lithography: MIMIC. Micro Contact Printing. Microtransfer Molding. Soft Lithography: Replica Molding. Soft Lithography.
Can We Measure Everything? Microfabrication Using Polymers Dr. Bruce K. Gale ENGR 494C and 594C Polymers for Microfabrication Examples diverse PDMS PMMA Polyurethane Polyimide Polystyrene Disadvantages
Czochralski Crystal Growth
Czochralski Crystal Growth Crystal Pulling Crystal Ingots Shaping and Polishing 300 mm wafer 1 2 Advantage of larger diameter wafers Wafer area larger Chip area larger 3 4 Large-Diameter Wafer Handling
Fabrication Technology, Part I
EEL5225: Principles of MEMS Transducers (Fall 2003) Fabrication Technology, Part I Agenda: Oxidation, layer deposition (last lecture) Lithography Pattern Transfer (etching) Impurity Doping Reading: Senturia,
Polymer Microfabrication (Part II) Prof. Tianhong Cui, Mechanical Engineering ME 8254
Polymer Microfabrication (Part II) Prof. Tianhong Cui, Mechanical Engineering ME 8254 Other Polymer Techniques Embossing Low cost High throughput Structures as small as 25 nm Injection molding Features
Microfabrication of Integrated Circuits
Microfabrication of Integrated Circuits OUTLINE History Basic Processes Implant; Oxidation; Photolithography; Masks Layout and Process Flow Device Cross Section Evolution Lecture 38, 12/05/05 Reading This
Complexity of IC Metallization. Early 21 st Century IC Technology
EECS 42 Introduction to Digital Electronics Lecture # 25 Microfabrication Handout of This Lecture. Today: how are Integrated Circuits made? Silicon wafers Oxide formation by growth or deposition Other
PHYS 534 (Fall 2008) Process Integration OUTLINE. Examples of PROCESS FLOW SEQUENCES. >Surface-Micromachined Beam
PHYS 534 (Fall 2008) Process Integration Srikar Vengallatore, McGill University 1 OUTLINE Examples of PROCESS FLOW SEQUENCES >Semiconductor diode >Surface-Micromachined Beam Critical Issues in Process
Lecture 10: MultiUser MEMS Process (MUMPS)
MEMS: Fabrication Lecture 10: MultiUser MEMS Process (MUMPS) Prasanna S. Gandhi Assistant Professor, Department of Mechanical Engineering, Indian Institute of Technology, Bombay, 1 Recap Various VLSI based
This Appendix discusses the main IC fabrication processes.
IC Fabrication B B.1 Introduction This Appendix discusses the main IC fabrication processes. B.2 NMOS fabrication NMOS transistors are formed in a p-type substrate. The NMOS fabrication process requires
Soft Fabrication and Polymers
Introduction to BioMEMS & Medical Microdevices Soft Fabrication and Polymers Companion lecture to the textbook: Fundamentals of BioMEMS and Medical Microdevices, by Prof., http://saliterman.umn.edu/ R012408
We are moving to 155 Donner Lab From Thursday, Feb 2 We will be able to accommodate everyone!
-Spring 006 Digital Integrated Circuits Lecture 4 CMOS Manufacturing Process Design Rules EECS141 1 Good News! We are moving to 155 Donner Lab From Thursday, Feb We will be able to accommodate everyone!
Surface Micromachining
Surface Micromachining Micro Actuators, Sensors, Systems Group University of Illinois at Urbana-Champaign Outline Definition of surface micromachining Most common surface micromachining materials - polysilicon
EE 5344 Introduction to MEMS. CHAPTER 3 Conventional Si Processing
3. Conventional licon Processing Micromachining, Microfabrication. EE 5344 Introduction to MEMS CHAPTER 3 Conventional Processing Why silicon? Abundant, cheap, easy to process. licon planar Integrated
Dr. Lynn Fuller Webpage:
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Microelectromechanical Systems (MEMs) Process Integration Dr. Lynn Fuller Webpage: http://people.rit.edu/lffeee 82 Lomb Memorial Drive Rochester,
UV15: For Fabrication of Polymer Optical Waveguides
CASE STUDY UV15: For Fabrication of Polymer Optical Waveguides Master Bond Inc. 154 Hobart Street, Hackensack, NJ 07601 USA Phone +1.201.343.8983 Fax +1.201.343.2132 main@masterbond.com CASE STUDY UV15:
IC/MEMS Fabrication - Outline. Fabrication
IC/MEMS Fabrication - Outline Fabrication overview Materials Wafer fabrication The Cycle: Deposition Lithography Etching Fabrication IC Fabrication Deposition Spin Casting PVD physical vapor deposition
Fabrication Process. Crystal Growth Doping Deposition Patterning Lithography Oxidation Ion Implementation CONCORDIA VLSI DESIGN LAB
Fabrication Process Crystal Growth Doping Deposition Patterning Lithography Oxidation Ion Implementation 1 Fabrication- CMOS Process Starting Material Preparation 1. Produce Metallurgical Grade Silicon
CS/ECE 5710/6710. N-type Transistor. N-type from the top. Diffusion Mask. Polysilicon Mask. CMOS Processing
CS/ECE 5710/6710 CMOS Processing Addison-Wesley N-type Transistor D G +Vgs + Vds S N-type from the top i electrons - Diffusion Mask Mask for just the diffused regions Top view shows patterns that make
Mikrosensorer. Microfabrication 1
Mikrosensorer Microfabrication 1 Literature Introductory MEMS Fabrication and Applications Thomas M. Adams and Richard A. Layton Available as ebook on http://www.lub.lu.se/en/search/lubsearch.html This
Chapter 2 MOS Fabrication Technology
Chapter 2 MOS Fabrication Technology Abstract This chapter is concerned with the fabrication of metal oxide semiconductor (MOS) technology. Various processes such as wafer fabrication, oxidation, mask
EEC 118 Lecture #5: MOS Fabrication. Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation
EEC 118 Lecture #5: MOS Fabrication Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation Announcements Lab 3 this week, report due next week HW 3 due this Friday at 4
Outline. Introduction to the LIGA Microfabrication Process. What is LIGA? The LIGA Process. Dr. Bruce K. Gale Fundamentals of Microfabrication
Outline Introduction to the LIGA Microfabrication Process Dr. Bruce K. Gale Fundamentals of Microfabrication What is LIGA? The LIGA Process Lithography Techniques Electroforming Mold Fabrication Analyzing
EE 143 CMOS Process Flow
EE 143 CMOS rocess Flow CT 84 D D G Sub G Sub S S G D S G D S + + + + - MOS Substrate Well - MOS Substrate EE 143 CMOS rocess Flow CT 85 hotoresist Si 3 4 SiO 2 Substrate selection: moderately high resistivity,
FABRICATION ENGINEERING MICRO- NANOSCALE ATTHE AND. Fourth Edition STEPHEN A. CAMPBELL. of Minnesota. University OXFORD UNIVERSITY PRESS
AND FABRICATION ENGINEERING ATTHE MICRO- NANOSCALE Fourth Edition STEPHEN A. CAMPBELL University of Minnesota New York Oxford OXFORD UNIVERSITY PRESS CONTENTS Preface xiii prrt i OVERVIEW AND MATERIALS
Surface micromachining and Process flow part 1
Surface micromachining and Process flow part 1 Identify the basic steps of a generic surface micromachining process Identify the critical requirements needed to create a MEMS using surface micromachining
Lecture 22: Integrated circuit fabrication
Lecture 22: Integrated circuit fabrication Contents 1 Introduction 1 2 Layering 4 3 Patterning 7 4 Doping 8 4.1 Thermal diffusion......................... 10 4.2 Ion implantation.........................
Deep Lithography for Microfabrication
Deep Lithography for Microfabrication Part 2: UV Deep Lithography (UVDL) Luiz O. S. Ferreira Mechanical Engineering Faculty Campinas State University UNICAMP Campinas SP - BRAZIL lotavio@fem.unicamp.br
Chapter 4 : ULSI Process Integration (0.18 m CMOS Process)
Chapter : ULSI Process Integration (0.8 m CMOS Process) Reference. Semiconductor Manufacturing Technology : Michael Quirk and Julian Serda (00). - (00). Semiconductor Physics and Devices- Basic Principles(/e)
MEMS Surface Fabrication
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING MEMS Surface Fabrication Dr. Lynn Fuller webpage: http://people.rit.edu/lffeee Electrical and Microelectronic Engineering Rochester Institute
ECE 659. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, Digital EE141 Integrated Circuits 2nd Manufacturing.
Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic Manufacturing Process July 0, 00 1 CMOS Process 1 A Modern CMOS Process gate-oxide TiSi AlCu Tungsten
Low-temperature, Simple and Fast Integration Technique of Microfluidic Chips by using a UV-curable Adhesive
Low-temperature, Simple and Fast Integration Technique of Microfluidic Chips by using a UV-curable Adhesive Supplementary Information Channel fabrication Glass microchannels. A borosilicate glass wafer
Micromachining vs. Soft Fabrication
Introduction to BioMEMS & Medical Microdevices Silicon Microfabrication Part 1 Companion lecture to the textbook: Fundamentals of BioMEMS and Medical Microdevices, by Prof., http://saliterman.umn.edu/
The Physical Structure (NMOS)
The Physical Structure (NMOS) Al SiO2 Field Oxide Gate oxide S n+ Polysilicon Gate Al SiO2 SiO2 D n+ L channel P Substrate Field Oxide contact Metal (S) n+ (G) L W n+ (D) Poly 1 3D Perspective 2 3 Fabrication
CMOS Fabrication. Dr. Bassam Jamil. Adopted from slides of the textbook
CMOS Fabrication Dr. Bassam Jamil Adopted from slides of the textbook CMOS Fabrication CMOS transistors are fabricated on silicon wafer Lithography process similar to printing press On each step, different
Micro-Electro-Mechanical Systems (MEMS) Fabrication. Special Process Modules for MEMS. Principle of Sensing and Actuation
Micro-Electro-Mechanical Systems (MEMS) Fabrication Fabrication Considerations Stress-Strain, Thin-film Stress, Stiction Special Process Modules for MEMS Bonding, Cavity Sealing, Deep RIE, Spatial forming
4. Process Integration: Case Studies
Case Study #2: FCantilevered Microgripper Surface Machined MEMS Case Study #2: FCantilevered Microgripper Sandia Lucent Sandia Integrated Accelerometers Optomechanical Systems Integrated Sensors 1 Bulk
High aspect ratio tapered hollow metallic microneedle arrays with microfluidic interconnector
Microsyst Technol (2007) 13: 231 235 DOI 10.1007/s00542-006-0221-0 TECHNICAL PAPER Kabseog Kim Æ Jeong-Bong Lee High aspect ratio tapered hollow metallic microneedle arrays with microfluidic interconnector
EE40 Lec 22. IC Fabrication Technology. Prof. Nathan Cheung 11/19/2009
Suggested Reading EE40 Lec 22 IC Fabrication Technology Prof. Nathan Cheung 11/19/2009 300mm Fab Tour http://www-03.ibm.com/technology/manufacturing/technology_tour_300mm_foundry.html Overview of IC Technology
Micro Fabrication : Soft Lithography
Micro Fabrication : Soft Lithography Last Class: 1. Electrowetting on Dielectric (EWOD) 2. Setup in EWOD 3. Basic Manipulations : Mixing Splitting, Translation 4. Optoelectrowetting (OEW) Today s Contents:
Uncrosslinked SU-8 as a sacrificial material
INSTITUTE OFPHYSICS PUBLISHING JOURNAL OF MICROMECHANICS AND MICROENGINEERING J. Micromech. Microeng. 15 (2005) N1 N5 doi:10.1088/0960-1317/15/1/n01 TECHNICAL NOTE Uncrosslinked as a sacrificial material
Mechanically Flexible Interconnects with Highly Scalable Pitch and Large Stand-off Height for Silicon Interposer Tile and Bridge Interconnection
Mechanically Flexible Interconnects with Highly Scalable Pitch and Large Stand-off Height for Silicon Interposer Tile and Bridge Interconnection Chaoqi Zhang, Hyung Suk Yang, and Muhannad S. Bakir School
Lecture 0: Introduction
Lecture 0: Introduction Introduction Integrated circuits: many transistors on one chip. Very Large Scale Integration (VLSI): bucketloads! Complementary Metal Oxide Semiconductor Fast, cheap, low power
ASIM-X MEMS-Specific Design Rules
ASIM-X MEMS-Specific Design Rules Version 2 Revised April 5, 2006. This is a beta version, subject to change. Revised by G. K. Fedder, Carnegie Mellon University. 1 Process Overview ASIM-X, an acronym
FABRICATION OF CMOS INTEGRATED CIRCUITS. Dr. Mohammed M. Farag
FABRICATION OF CMOS INTEGRATED CIRCUITS Dr. Mohammed M. Farag Outline Overview of CMOS Fabrication Processes The CMOS Fabrication Process Flow Design Rules EE 432 VLSI Modeling and Design 2 CMOS Fabrication
3.155J / 6.152J Micro/Nano Processing Technology TAKE-HOME QUIZ FALL TERM 2005
3.155J / 6.152J Micro/Nano Processing Technology TAKE-HOME QUIZ FALL TERM 2005 1) This is an open book, take-home quiz. You are not to consult with other class members or anyone else. You may discuss the
Manufacturing Process
Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic Manufacturing Process July 30, 2002 1 CMOS Process 2 A Modern CMOS Process gate-oxide TiSi 2 AlCu Tungsten
GLM General information. Technical Datasheet
GLM 2060 Nanocomposite SU-8-negative tone photo-epoxy for layers from 6.0 to 50µm Technical Datasheet Gersteltec Sarl. Générale Guisan 26, 1009, Pully Switzerland Switzerland / Israel / Taiwan Contact:
FABRICATION PROCESSES FOR MAGNETIC MICROACTUATORS WITH POLYSILICON FLEXURES. Jack W. Judy and Richard S. Muller
FABRICATION PROCESSES FOR MAGNETIC MICROACTUATORS WITH POLYSILICON FLEXURES Jack W. Judy and Richard S. Muller Berkeley Sensor & Actuator Center (BSAC) Department of EECS, University of California, Berkeley,
EE 330 Lecture 8. IC Fabrication Technology Part II. - Oxidation - Epitaxy - Polysilicon - Interconnects
EE 330 Lecture 8 IC Fabrication Technology Part II - Oxidation - Epitaxy - Polysilicon - Interconnects Review from Last Time MOS Transistor Bulk Source Gate Drain p-channel MOSFET Lightly-doped n-type
Department of Electrical Engineering. Jungli, Taiwan
Chapter 3 Fabrication of CMOS Integrated Circuits Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan Background Outline The CMOS Process Flow Design Rules Latchup
EE 330 Lecture 9. IC Fabrication Technology Part II. -Oxidation -Epitaxy -Polysilicon -Planarization -Resistance and Capacitance in Interconnects
EE 330 Lecture 9 IC Fabrication Technology Part II -Oxidation -Epitaxy -Polysilicon -Planarization -Resistance and Capacitance in Interconnects Review from Last Time IC Fabrication Technology Crystal Preparation
Mostafa Soliman, Ph.D. May 5 th 2014
Mostafa Soliman, Ph.D. May 5 th 2014 Mostafa Soliman, Ph.D. 1 Basic MEMS Processes Front-End Processes Back-End Processes 2 Mostafa Soliman, Ph.D. Wafers Deposition Lithography Etch Chips 1- Si Substrate
Method For Stripping Copper In Damascene Interconnects >>>CLICK HERE<<<
Method For Stripping Copper In Damascene Interconnects Damascene, or acid copper plating baths, have been in use since the mid 19th century on decorative items and machinery.1,2 The process generally uses
Bulk MEMS Fabrication Details Dr. Lynn Fuller, Casey Gonta, Patsy Cadareanu
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Bulk MEMS Fabrication Details Dr. Lynn Fuller, Casey Gonta, Patsy Cadareanu Webpage: http://people.rit.edu/lffeee 82 Lomb Memorial Drive Rochester,
EE 330 Lecture 8. IC Fabrication Technology Part II. - Masking - Photolithography - Deposition - Etching - Diffusion
EE 330 Lecture 8 IC Fabrication Technology Part II?? - Masking - Photolithography - Deposition - Etching - Diffusion Review from Last Time Technology Files Provide Information About Process Process Flow
Chapter 3 CMOS processing technology
Chapter 3 CMOS processing technology (How to make a CMOS?) Si + impurity acceptors(p-type) donors (n-type) p-type + n-type => pn junction (I-V) 3.1.1 (Wafer) Wafer = A disk of silicon (0.25 mm - 1 mm thick),
ELEC 3908, Physical Electronics, Lecture 4. Basic Integrated Circuit Processing
ELEC 3908, Physical Electronics, Lecture 4 Basic Integrated Circuit Processing Lecture Outline Details of the physical structure of devices will be very important in developing models for electrical behavior
FABRICATION OF MICRONEEDLES
Journal of Marine Science and Technology, Vol. 18, No. 2, pp. 243-248 (2010) 243 FABRICATION OF MICRONEEDLES Yu-Tang Chen*, Chin-Chun Hsu**, Chieh-Hsiu Tsai**, and Shung-Wen Kang** Key words: microneedles,
ECE520 VLSI Design. Lecture 7: CMOS Manufacturing Process. Payman Zarkesh-Ha
ECE520 VLSI Design Lecture 7: CMOS Manufacturing Process Payman Zarkesh-Ha Office: ECE Bldg. 230B Office hours: Wednesday 2:00-3:00PM or by appointment E-mail: pzarkesh@unm.edu Slide: 1 Review of Last
3. Overview of Microfabrication Techniques
3. Overview of Microfabrication Techniques The Si revolution First Transistor Bell Labs (1947) Si integrated circuits Texas Instruments (~1960) Modern ICs More? Check out: http://www.pbs.org/transistor/background1/events/miraclemo.html
TEMPERATURE-DEPENDENT REFRACTIVE INDICES OF OPTICAL PLANAR WAVEGUIDES
TEMPERATURE-DEPENDENT REFRACTIVE INDICES OF OPTICAL PLANAR WAVEGUIDES Aiman Kassir a, Abang Annuar Ehsan b, Noraspalelawati Razali b, Mohd Kamil Abd Rahman a and Sahbudin Shaari b Faculty of Applied Sciences,
FABRICATION OF SWTICHES ON POLYMER-BASED BY HOT EMBOSSING. Chao-Heng Chien, Hui-Min Yu,
Stresa, Italy, 26-28 April 2006 FABRICATION OF SWTICHES ON POLYMER-BASED BY HOT EMBOSSING, Mechanical Engineering Department, Tatung University 40 Chung Shan N. Rd. Sec. 3 Taipei, Taiwan ABSTRACT In MEMS
Using PDMS Micro-Transfer Moulding for Polymer Flip Chip Packaging on MEMS
Using PDMS Micro-Transfer Moulding for Polymer Flip Chip Packaging on MEMS Edward K.L. Chan, Cell K.Y. Wong, M. Lee, Matthew M.F. Yuen, Yi-Kuen Lee Department of Mechanical Engineering Hong Kong University
A High Speed Surface Illuminated Si Photodiode. Using Microstructured Holes for Absorption. Enhancements at nm wavelength
A High Speed Surface Illuminated Si Photodiode Using Microstructured Holes for Absorption Enhancements at 900 1000 nm wavelength Supporting Information Yang Gao, Hilal Cansizoglu, Soroush Ghandiparsi,
Microfabrication of Heterogeneous, Optimized Compliant Mechanisms SUNFEST 2001 Luo Chen Advisor: Professor G.K. Ananthasuresh
Microfabrication of Heterogeneous, Optimized Compliant Mechanisms SUNFEST 2001 Luo Chen Advisor: Professor G.K. Ananthasuresh Fig. 1. Single-material Heatuator with selective doping on one arm (G.K. Ananthasuresh)
SUPPLEMENTAL INFORMATION: 1. Supplemental methods 2. Supplemental figure legends 3. Supplemental figures
Supplementary Material (ESI) for Lab on a Chip This journal is The Royal Society of Chemistry 2008 A microfluidics-based turning assay reveals complex growth cone responses to integrated gradients of substrate-bound
Manufacturing Process
CMOS Manufacturing Process CMOS Process 1 A Modern CMOS Process gate-oxide TiSi AlCu Tungsten SiO n+ p-well p-epi poly n-well p+ SiO p+ Dual-Well Trench-Isolated CMOS Process Circuit Under Design V DD
User Fees for the 4D LABS Fabrication Facility
User Fees for the 4D LABS Fabrication Facility 1. Clean Room Fees Service Clean Room access: Includes use of all Clean Room tools except for those in the groups listed below Group I tools: Plasma reactors
EE C245 ME C218 Introduction to MEMS Design Fall 2011
Lecture Outline EE C245 ME C218 Introduction to MEMS Design Fall 2011 Prof. Clark T.-C. Nguyen Dept. of Electrical Engineering & Computer Sciences University of California at Berkeley Berkeley, CA 94720
NanoSystemsEngineering: NanoNose Final Status, March 2011
1 NanoSystemsEngineering: NanoNose Final Status, March 2011 The Nanonose project is based on four research projects (VCSELs, 3D nanolithography, coatings and system integration). Below, the major achievements
4/10/2012. Introduction to Microfabrication. Fabrication
Introduction to Microfabrication Fabrication 1 MEMS Fabrication Flow Basic Process Flow in Micromachining Nadim Maluf, An introduction to Microelectromechanical Systems Engineering 2 Thin Film Deposition