ION-IMPLANTED PHOTORESIST STRIPPING USING SUPERCRITICAL CARBON DIOXIDE

Transcription

1 ION-IMPLANTED PHOTORESIST STRIPPING USING SUPERCRITICAL CARBON DIOXIDE K. Saga, H. Kuniyasu, and T. Hattori, M. B. Korzenski*, P.M. Visintin*, T. H. Baum* Sony Corporation Atsugi JAPAN Advanced Technology Materials, Inc. * 7 Commerce Drive, Danbury, CT 681 ABSTRACT We have investigated the removal of ion-implanted photoresists using supercritical carbon dioxide (SCCO 2 ) /chemical additive formulations. Characterization of the ion-implanted surface of the processed samples via SEM and XPS analysis revealed that with supercritical carbon dioxide/co-solvent formulations, efficient stripping of ion-implanted photoresists can be achieved while avoiding silicon recess and dopant consumption in the fabrication of ultra shallow junction of CMOS transistors. INTRODUCTION Advanced CMOS devices for the 45 nm node and beyond require high drive currents and ultra shallow junctions to satisfy the circuit specification in terms of speed and static leakage. Influence of silicon recess and dopant consumption while stripping photoresists used for fabrication of source/drain extension on junction profile has become critical. Various ions are implanted with various different dose level using photoresist masks many times for the formation of the source / drain extension of various different MOS transistors. Currently, oxygen plasma ashing followed by sulfuric acid/hydrogen peroxide processing has been used for the photoresist stripping. Silicon dioxide formed with such plasma and chemical oxidation process is etched off by the subsequent cleaning step with SC1, causing silicon recess of ultra shallow junction, as shown in Fig.1. Figure 2 shows cross-sectional SEM and TEM images of a gate electrode and source/drain extension before and after conventional photoresist stripping and subsequent aqueous cleaning in SC1. The silicon recess including dopant consumption observed was approximately 1 nm. Such a silicon recess of source/drain extension causes detrimental effects on 2 nmshallow junctions. To avoid the silicon recess, photoresist removal processes without the use of oxidizing species are required. Supercritical carbon dioxide (CO 2 ) has been proposed to remove particulate contamination [1], oxide film for fabrication of highaspect ratio structures [2], and post-dielectric-etch residues on via hole and trench formation for Cu/low-k interconnects [3]. In this paper, we have demonstrated the stripping of post-ion-implant photoresists using supercritical CO 2 without generating the silicon recess. ECS Transactions Vol. 1 No

2 NMOS PMOS Offset spacer Gate S/D Extension STI Plasma O 2 ashing followed by SPM + SC1 clean Figure 1. Schematic illustration of silicon recess and dopant consumption by conventional photoresist stripping method using oxidation in the fabrication of ultra shallow junction of CMOS transistors. (a) Gate Poly Si Gate Poly Si Silicon dioxide Adhesive Silicon dioxide Amorphous ionimplanted layer Si-substrate (b) Gate Poly Si Silicon dioxide Adhesive 1.8nm Silicon dioxide Si-substrate Figure 2. Cross-sectional SEM (left) and TEM (right) images of a gate electrode and source/drain extension before (a) and after (b) 8 times repeated photoresist ashing in oxygen plasma and aqueous stripping in sulfuric acid/hydrogen peroxide and subsequent aqueous cleaning by SC ECS Transactions Vol. 1 No. 3

3 EXPERIMENTAL METHODS The samples used in this study were 15 x 15 mm silicon wafers with the 1.3 nmthick chemical oxide films. mask patterns, 1-micron-wide, were prepared on the surface of the chemical oxide films with.3 micron pitch on silicon surfaces with 7 nm-thick, 254 nm positive photoresist made of polystylene derivatives. Unpatterned photoresist films were also prepared on silicon substrate with the same polymer as blanket photoresist samples. Arsenic ions were implanted on the surface of wafers with a dose range of 2 x 1 13 to 2 x 1 15 /cm 2. First, approximately twenty different co-solvents were tested using the blanket photoresist samples at atmospheric pressure to determine the most efficient for bulk photoresist removal. The co-solvents tested belong to the following solvent categories: polar protic, dipolar aprotic and non-polar solvents. The wafers were then processed with SCCO 2 containing the optimized co-solvent (1 wt% in SCCO 2 ) solution at 4 C to 7 C and 11. to 27.6 MPa for 5 to 2 minutes. A chelating agent was added in the co-solvent to enhance stripping the densely patterned photoresist and PR crust. Figure 3 shows a schematic diagram of the high-pressure system used in this study. The system is composed mainly of: (1) two high-pressure 316 stainless steel vessels, one serving as a dynamic mixer/mass exchanger (MIX) while the second is the wafer cleaning chamber (WCC). (2) A high-pressure gas booster (GB) to maintain a constant flow and/or pressure of the supercritical fluid, and (3) an HPLC sample pump (SP) to deliver the co-solvent/chemical modifier solutions to the mass exchanger. In a typical cleaning experiment, a sample wafer (15 15 mm) was loaded into a 1.5 in. ID stainless steel wafer cleaning chamber with adjustable volume (25-1 ml). High purity carbon dioxide (99.999%; Tech Air) from a gas cylinder is fed through a gas booster and subsequently chilled through a cooling cylinder (CC) to insure that the CO 2 is cooled and can be easily compressed by the high-pressure CO 2 pump (CP) before introduction into the CO 2 heater. The heated CO 2 and co-solvent are then delivered to the mixing chamber (MIX) via separate delivery lines and can be mixed either in a dynamic or static mode before being transferred to the wafer-cleaning chamber (WCC). GB BPR Exhaust SPT CC CH MIX WCC CP SP SC CO 2 Cylinder GB: gas booster CC: C O 2 cooler CP: C O 2 pump CH: C O 2 heater MIX: C O 2 /co-solvent m ixer WCC: wafer cleaning chamber SP: sam ple pum p SC: sam ple cylinder BPR: back pressure regulator SPT: separator Figure 3. Schematic diagram of the continuous flow SCCO 2 cleaning apparatus. ECS Transactions Vol. 1 No

4 In the cleaning chamber, the pressure is adjusted by a backpressure regulator (BPR) to the desired level and controlled to within.14 MPa. The CO 2 heater, mixer and cleaning chamber are heated using electrical resistance tapes, that are controlled by a multi-loop temperature controller and provide a stable temperature to within ± 1 C. In addition, each pressurized vessel is equipped with a pressure transducer to monitor the pressure inside the vessel. After cleaning was complete, the SCCO 2 /chemical solution was purged from each individual chamber separately, as to not contaminate the processed wafer from chemical remaining in the mass exchanger, and vented into a high pressure trap to collect any residual chemicals and/or wafer residue during the phase separation induced by the venting process. After processing, photoresist stripping efficiency was evaluated with optical microscopy, scanning electron microscope (SEM) and X-ray photoelectron spectroscopy (XPS). The ion-implanted surface of the silicon wafers was analyzed with XPS and atomic force microscope (AFM) to estimate the thickness of silicon dioxide and the depth of etched silicon, respectively. RESULTS AND DISCUSSIONS It was determined that polar protic co-solvents yielded the best results for complete removal of the unpatterned photoresist on wafer surfaces, regardless of the arsenic-ion dose level, at atmospheric pressure. Using the optimized polar protic co-solvent, the patterned wafers were processed in supercritical CO 2 at 7 C and 2.7 MPa for 5-2 min. Figure 4 shows the dependence of the photoresist / PR crust removal rate as a function of processing time. The photoresist stripping efficiency is strongly dependant on the implant-ion concentration level in the photoresist, which illustrates that the stripping efficiency increases almost linearly as process time increases. The photoresist implanted with lower dose-levels is removed at a much higher rate than the highly implanted samples. Even highly implanted photoresist can be removed from the blanket photoresist samples with co-solvent alone in supercritical CO 2 for 2 min. Figure 4. removal efficiency as a function of time and ion dose-level. 28 ECS Transactions Vol. 1 No. 3

5 The reason why the PR crust was comparatively easily removed from the blanket samples is that the SCCO 2 /co-solvent solution got into the interfacial soft resist layer between hard crust and silicon at periphery the edge of the blanket substrates. In contrast, the densely patterned photoresists are difficult to remove with co-solvent alone in supercritical CO 2, as shown in Fig. 5. The bulk photoresist is completely removed in the densely patterned regions after treatment with the SCCO 2 /co-solvent formulations; however, the hardened crust still remains. PR crust remaining Bulk photoresist removed Before processing After processing Figure 5. SCCO 2. SEM images of the photoresist before/after processing in co-solvent alone in Figure 6 shows XPS C1s and As3d spectra of the hard crust of ion-implanted photoresists prior to cleaning. Some of C-C bonds change into >C=O or O-C=O bonds and some carbons form As-C bonds with arsenic at the upper layer of the photoresist as an increase in the ion dose level and as a decrease in the ion-dose energy. It means that highly implanted photoresists are hardended, forming the crust by the reaction of the implanted cation with the photoresist polymer. Therefore, co-solvents alone are ineffective for removing the ion-implant hardened photoresist crust on densely patterned areas of the wafer, particularly for highly-doped samples Normalized Intensity x 1 13 /cm 2, 2keV 2 x 1 14 /cm 2, 2keV 2 x 1 15 /cm 2, 2keV c/s x 1 13 /cm 2, 2keV 2 x 1 14 /cm 2, 2keV 2 x 1 15 /cm 2, 2keV 2 x 1 15 /cm 2, 5keV As-O As-C Binding Energy (ev) Figure 6. XPS C1s (left) and As3d (right) spectral signatures of the hard crust of ionimplanted photoresists Binding Energy (ev) 4 38 ECS Transactions Vol. 1 No

6 Masked region Ionimplanted region Masked region Before processing After processing Figure 7. SEM images of the ion-implanted surface before/after processing in a cosolvent / a chelator in SCCO 2 at 7 C, 27.6 MPa for 6 min. The densely patterned photoresists implanted with arsenic of dosage levels 2 x 1 14 /cm 2 were completely stripped by adding small amounts of chelators at 7 C, 27.6 MPa, for 6min. There is virtually no etching of the ion-implanted region of the silicon surface observed, as shown in Fig. 7. It is believed that the addition of small amounts of chelators may aid in the removal of the hardened ion-implanted crust from the silicon/silicon dioxide surface by chelating and extracting the ion-implanted constituents. This may allow the formation of SCCO 2 -soluble species that can aid in the dissolution of the implanted photoresist crust. Figure 8 shows the main plot effect for photoresist removal efficiency and etching prevention effect obtained by design of experiments (DOE). Lower pressure and shorter processing time is enough to satisfy both photoresist removal efficiency and etching prevention. On the other hand, there are trade-off on both process temperature and chemical concentration. Figure 9 shows an AFM topograph after stripping photoresists with cosolvent/chelator in SCCO 2 at 7 C, 27.6 MPa, for 6min, and line profile between the surface implanted with arsenic ions with a dosage level of 2 x 1 14 /cm 2 and the surface which had been masked with photoresist. The AFM line profile measurements revealed that the ion-implanted surface was not etched, but the level of the ion-implanted surface was kept slightly higher than that of the masked surface after processing with a chelator and a co-solvent in SCCO 2 at the optimized condition. 282 ECS Transactions Vol. 1 No. 3

7 removal efficiency Etching prevention effect Time (min) Temp ( C ) Pressure (MPa) Chemical (vol.%) Effect Levels Figure 8. Main plot effect for photoresist removal efficiency and etching prevention effect. Masked region Ion-implanted region AFM topograph Line profile Figure 9. AFM topograph and line profile of the surface after photoresist stripping with co-solvent/chelator in SCCO 2. Figure 1 shows XPS Si 2p spectra for the ion-implanted surfaces processed with the SCCO 2 formulation at 7 C, 27.6 MPa, for 6 min or and ion-implanted surfaces processed with an oxygen plasma ash followed by treatment with a surfuric acid / hydrogen peroxide mixture. The estimated thickness of the silicon oxide of control wafers, wafers processed with oxygen plasma ashing followed by the surfuric acid / hydrogen peroxide mixture, and wafers processed by the SCCO 2 formulation at 7 C, 27.6 MPa are 1.37 nm, 3.11 nm, and 1.16 nm, respectively. Oxygen plasma ashing and the surfuric acid / hydrogen peroxide mixture increased the thickness of the silicon oxide from 1.37 nm to 3.11 nm. In contrast, photoresist stripping using supercritical CO 2 containing a co-solvent and a chelator did not increase the thickness of the silicon oxide, but slightly decreased it to 1.16 nm. It should be noted that the photoresist strip in SCCO 2 does not oxidize the ion-implanted surface, avoiding the silicon loss and dopant consumption due to the etching of the silicon oxide by SC1. ECS Transactions Vol. 1 No

8 Intensity (counts) O 2 Plasma ash + wet strip Control SCCO 2 strip Si-O Si Binding Energy (ev) Figure 1. XPS Si 2p spectra for the silicon surfaces processed in SCCO 2 formulation or ashed in oxygen plasma and surfuric acid / hydrogen peroxide mixture. CONCLUSIONS We have successfully shown that supercritical carbon dioxide/co-solvent formulations efficiently strip ion-implanted photoresists while avoiding silicon recess and dopant consumption in the fabrication of ultra shallow junction of CMOS transistors. removal using supercritical fluid is also environmentally benign and thus it is applicable to numerous photoresist-stripping steps in the fabrication of CMOS transistors. ACKNOWLEDGEMENTS The authors gratefully acknowledge support for this work accomplished through ATMI Japan K. K. REFERENCES [1] M. Korzenski, C. Xu, T. Baum, K. Saga, H. Kuniyasu, and T. Hattori, in Cleaning Technology in Semiconductor Device Manufacturing VIII, J. Ruzyllo, T. Hattori, R. L. Opila, and R. E. Novak, Editors, PV 23-26, p.222, The Electrochemical Society Meeting Proceedings Series, Pennington, NJ (24). [2] K. Saga, H. Kuniyasu, T. Hattori, K. Yamada and T. Azuma, in Proceedings of Ultra Clean Processing of Silicon Surfaces, pp , Scitec Publications, Switzland, 25. [3] R. B. Turkot Jr, V. S. RamchandraRao, S. A. Iyer, and S. C. Clark, in Cleaning Technology in Semiconductor Device Manufacturing VIII, J. Ruzyllo, T. Hattori, R. L. Opila, and R. E. Novak, Editors, PV 23-26, p.254, The Electrochemical Society Meeting Proceedings Series, Pennington, NJ (24). 284 ECS Transactions Vol. 1 No. 3